Patents Represented by Attorney Osha & May L.L.P.
  • Patent number: 6842057
    Abstract: A method and apparatus stores a voltage potential generated by a delay locked loop in order to reduce the time required for the delay locked loop to recover from a lost clock state. A clock path is arranged to carry a clock signal. The delay locked loop operatively connects to the clock path where the delay locked loop is arranged to generate a voltage potential dependent on a phase difference between the clock signal and a delayed clock signal output of the delay locked loop. An analog state storage apparatus operatively connects to the delay locked loop and is arranged to store the voltage potential. Also, the analog state storage apparatus is arranged to output the stored voltage potential to the delay locked loop in response to a loss of at least one of the clock signal and the delayed clock signal.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: January 11, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Aninda K. Roy
  • Patent number: 6842858
    Abstract: A system for updating firmware of an electronic device includes a flash memory for storing a system control program to control the electronic device, and a RAM for storing the system control program and a writing control program to perform writing operation that the system program is loaded into the flash memory from the RAM. The system also includes a JTAG interface in conformity with the standard 1149.1 of IEEE (the Institute of Electrical and Electronics Engineers). The system stores the system control program and the writing control program into the RAM, and then executes the writing control program stored in the RAM to load the system control program into the flash memory. Thus, the firmware of the electronic device is updated.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: January 11, 2005
    Assignee: Funai Electric Co., Ltd.
    Inventor: Takuya Suzuki
  • Patent number: 6842351
    Abstract: A computer system uses a power distribution network arranged to propagate at least one voltage potential to an integrated circuit. A resonance detector is arranged to detect a power supply resonance. A damping circuit is operatively connected to the resonance detector and the power distribution network. The damping circuit resides external to the integrated circuit and dampens the power supply resonance under control of the resonance detector.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: January 11, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Aninda K. Roy, Brian W. Amick
  • Patent number: 6842015
    Abstract: A capacitance element electrode (E1) and a reference electrode (E31) are formed on a substrate (20) so as to be opposite to a displacement electrode (40). A dome-shaped movable switch electrode (E21) is disposed so as to be in contact with the reference electrode (E31) and at a distance from a fixed switch electrode (E11) formed inside the reference electrode (E31), and to cover the fixed switch electrode (E11). When an operation is applied to a detective member (30) and a portion of the movable switch electrode (E21) in the vicinity of its top is displaced to be brought into contact with fixed switch electrode (E11), a switch is turned ON. On the other hand, from a change in capacitance value of a capacitance element (C1) formed between the displacement electrode (40) and the capacitance element electrode (E1), the intensity of the force to the detective member (30) can be recognized.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: January 11, 2005
    Assignee: Nitta Corporation
    Inventor: Hideo Morimoto
  • Patent number: 6840430
    Abstract: A board piece 2 of the present invention comprises a non-thermoplastic resin film 11, a thermoplastic resin film 10 formed on the non-thermoplastic resin film 11 and a metal wiring 8 formed on the surface of the thermoplastic resin film 10. Metal wiring 8 is partially exposed on board piece 2 to form a contact 12. A low-melting metal coating 13 is formed on contact 12 and two board pieces 2a, 2b are pressed against each other under heating with contacts 12a, 12b thereof being in contact with each other so that thermoplastic resin films 10a, 10b soften to adhere board pieces 2a, 2b to each other and low-melting metal coatings 13a, 13b melt and then solidify to connect contacts 12a, 12b to each other. The region of metal wiring 8 not used for connection is wiring 17 connecting contacts 12 to each other and a cover film 19 can be provided on the surface thereof. Contacts 12a, 12b can also be connected by applying ultrasonic wave.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: January 11, 2005
    Assignee: Sony Chemicals, Corp.
    Inventors: Hideyuki Kurita, Masanao Watanabe, Toshihiro Shinohara, Mitsuhiro Fukuda, Yukio Anzai
  • Patent number: 6842061
    Abstract: A timing generating apparatus for generating a timing signal which changes at desired timing includes a first waveform generating unit for generating a first basic waveform whose value changes only at desired change timing of a basic frequency, a PLL for generating a sampling clock whose frequency is an integer multiple of the basic frequency and whose phase is more stable than the basic waveform based on a PLL input signal whose frequency is an integer multiple of the basic frequency or a reciprocal of an integer multiple thereof, a first sampling unit for outputting a first sampling signal which results from sampling the first basic waveform with the sampling clock, and an output unit for outputting the timing signal based on the first sampling signal.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: January 11, 2005
    Assignee: Advantest Corporation
    Inventors: Masakatsu Suda, Toshiyuki Okayasu
  • Patent number: 6838134
    Abstract: A recording sheet adaptable to print an image using pigment ink, on which a smear is hardly generated, is provided. A recording sheet includes an ink permeable layer prepared by adding 3-30 parts by weight of a nonionic surfactant including an amine compound as a main component to 30 parts by weight of a water-insoluble component including an inorganic filler and a binder as main components. Ink applied on such an ink permeable layer is directly absorbed into the layer in a depth direction without dispersing in a lateral direction. Therefore, any smear (banding) is hardly generated on a printed image formed on the recording sheet using ink.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: January 4, 2005
    Assignee: Sony Chemicals Corp.
    Inventors: Jun Takahashi, Akio Ito, Yukiko Murasawa, Hideaki Takahashi
  • Patent number: 6839901
    Abstract: A digital television system including a transmission means for transmitting digital audiovisual information on a plurality of channels and means for introducing in real time an event message concerning a live event broadcast on at least one channel into the datastream of at least one other channel, where the event message includes information regarding the occurrence of an event and the channel on which the event has occurred.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: January 4, 2005
    Assignee: Canal + Societe Anonyme
    Inventors: Guillaume De Saint Marc, Daniel Thomas
  • Patent number: 6837381
    Abstract: The present invention provides a composite reverse osmosis membrane as a polyamide membrane including a side chain amino group such as a residue of a polyvinyl alcohol-based amine compound represented by Formula 1. Such a membrane can remove organic impurities under a low pressure, providing an economical method for removal of impurities. An aqueous solution including a polyvinyl alcohol-based amine compound having a side chain amino group represented by Formula 1 is applied on a polysulfone-based ultrafiltration membrane as a microporous support. Next, trimesic acid chloride solution is applied causing interfacial polycondensation, which generates a reverse osmosis membrane. When this composite reverse osmosis membrane is evaluated by using a pH 6.5 aqueous solution including 500 mg/l of sodium chloride at an operation pressure of 5 kg/cm2 and at a temperature of 25° C., the permeable flux is at least 1.5 m3/m2·d, and the salt rejection is 80% or less.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: January 4, 2005
    Assignee: Nitto Denko Corporation
    Inventor: Masahiko Hirose
  • Patent number: 6834795
    Abstract: A simplified user authentication to a computer resource utilizing a smart card. When a new user is issued a smart card, he or she is also issued a user name (ID) and password to be used during a first use to activate the smart card. The user then connects the smart card and enters the user ID and password. The user is authenticated using the user ID and password and identifying information from the smart card. The network administration server then requests a public key from the workstation. The workstation instructs the smart card to generates public and private key. The public key is transmitted to the server. A digital certificate is created the smart card is activated. Once the smart card is activated a simplified login procedure can be used wherein connecting the smart card to a workstation initiates a login process not requiring use of a PIN number or other user input.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: December 28, 2004
    Assignees: Sun Microsystems, Inc., Netscape Communications Corporation
    Inventors: Brian Rasmussen, Matthew Harmsen
  • Patent number: 6835559
    Abstract: A process for producing an optical active &bgr;-amino alcohol, the method comprising the step of allowing at least one microorganism selected from the group consisting of microorganisms belonging to the genus Morganella and others, to act on an enantiomeric mixture of an &agr;-aminoketone or a salt thereof having the general formula (I): to produce an optical active &bgr;-amino alcohol with the desired optical activity having the general formula (II) described below in a high yield as well as in a highly selective manner:
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: December 28, 2004
    Assignee: Daiichi Fine Chemical Co., Ltd.
    Inventors: Keiji Sakamoto, Shinji Kita, Kazuya Tsuzaki, Tadanori Morikawa, Sakayu Shimizu, Michihiko Kataoka
  • Patent number: 6836235
    Abstract: A digitizer is provided which includes: N A/D converters for converting an analog signal output from an electronic device to digital signals at different sampling timings by turns (N is an integer equal to or larger than 2); and N digital filters for outputting corrected signals obtained by multiplying the digital signals output from the N A/D converters by correction coefficients, wherein the correction coefficients are based on phase errors between ideal sampling timings at which associated A/D converters are to sample the analog signal and actual sampling timings at which the N A/D converters sampled the analog signal, respectively.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: December 28, 2004
    Assignee: Advantest Corporation
    Inventor: Koji Asami
  • Patent number: 6836227
    Abstract: A digitizer module comprises an AD converter for sampling a pair of analog signals at a predetermined time interval and converting into a first and second digital signals respectively, a second signal frequency component calculating unit for calculating a second signal frequency component representing a component of each frequency of the second digital signal on the basis of the second digital signal, a skew frequency component calculating unit for calculating a skew frequency component representing a phase error of each frequency of the second digital signal corresponding to the first digital signal on the basis of a skew of a timing with which the pair of analog signals are sampled by the AD converter and a second signal frequency component correcting unit for correcting the second signal frequency component on the basis of the skew frequency component.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: December 28, 2004
    Assignee: Advantest Corporation
    Inventor: Koji Asami
  • Patent number: 6833670
    Abstract: An organic EL display comprises a first translucent substrate 1; an organic EL element 2, provided on top of the first translucent substrate 1, and formed by layering an anode, a photoemissive layer formed from a plurality of organic substances, and a cathode; and a second translucent substrate 31 which seals the organic EL element 2. The second translucent substrate 31 adopts a configuration comprising a depression 30 at the site facing the organic EL element 2.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: December 21, 2004
    Assignee: Nagase & Co., Ltd.
    Inventor: Yohei Mayuzumi
  • Patent number: 6834029
    Abstract: In a focusing servo apparatus for an optical pickup, an S-shaped wave of a focus error signal is measured at a point of time T1 to thereby calculate the time &Dgr;t1 required for shifting the position on the S-shaped wave from a local maximum value to a local minimum value. The speed of a lens relative to an optical disk is measured on the basis of the time &agr;t1. When the relative speed of the lens is higher than the speed allowed to lead the focus in, the motion of the lens is braked just before (a point of time T1′) the optical disk makes one rotation to thereby reduce the relative speed of the lens to make it possible to lead the focus in the optical disk steadily.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: December 21, 2004
    Assignee: Funai Electric Co., Ltd.
    Inventor: Minoru Hirashima
  • Patent number: 6833511
    Abstract: A molded interconnect device (MID) having a multilayer circuit of a reduced thickness, in which a layer-to-layer connection(s) is formed with high reliability, is provided as a multilayer circuit board. The multilayer circuit board comprises a substrate having a first surface and a second surface extending from an end of the first surface at a required angle relative to the first surface, and the multilayer circuit formed on the first surface and composed of a plurality of circuit layers. Each of the circuit layers is provided with a conductive layer having a required circuit pattern and an insulation layer formed on the conductive layer by film formation. The layer-to-layer connection of the multilayer circuit is made through a second conductive layer formed on the second surface of the substrate.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: December 21, 2004
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Yoshiyuki Uchinono, Kazuo Sawada, Yasufumi Masaki, Masahide Muto
  • Patent number: D500736
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: January 11, 2005
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Masaaki Isoda, Atsushi Sato
  • Patent number: D500292
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: December 28, 2004
    Assignee: Nichia Corporation
    Inventor: Masashi Ishida
  • Patent number: D500293
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: December 28, 2004
    Assignee: Nichia Corporation
    Inventor: Masashi Ishida
  • Patent number: D500294
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: December 28, 2004
    Assignee: Nichia Corporation
    Inventor: Masashi Ishida