Abstract: The present invention provides an LCD apparatus and a method for checking the joining accuracy thereof The LCD apparatus comprises an LCD panel, a printed circuit board and a package unit coupled to the LCD panel. On the printed circuit board, there is a plurality of first pins, a fir check pad and a second pad, wherein at least one fist pin is electrically connected to the first check pad and at least another first pin is electrically connected to the second check pad. There is a plurality of second pins on the package unit, wherein the second pins join the first pins on the printed circuit board correspondingly to connect the first pins electrically. To check the joining accuracy of the LCD apparatus, electric resistance is obtained by measuring the resistance between the first and second check pad with an ohmmeter. When the measured resistance is below a reference value, the assembly quality of the LCD is not qualified.
Abstract: A nose pad of eyeglasses includes a nose rack, a fastener and a pad; an axis is on the nose rack, a sleeve corresponding to the axis is on the fastener, an insertion hole is on the sleeve for the axis to insert. The open of the insertion hole is smaller than the diameter of the axis, users can install and remove them easily, and avoid scratches and breakage during installation and removal.
Abstract: A buckle assembly includes a fixing seat adapted to securely connected an object and having a hoop, a controlling bracket having a roller rotatably mounted therein, a fixing rod securely sandwiched between two side walls and adjacent to the baffle to correspond to the hoop and a pressing plate pivotally received in the controlling bracket. A spring is provided to provide a recovery force to the pressing plate. The second end of a secondary strap is extended through the adjusting ring to enclose the second roller such that when the adjusting ring is pulled, the pressing plate is detached from engagement with the roller to allow the secondary strap to slide on the roller to adjust a distance of the controlling bracket to the second end of the secondary strap.
Abstract: A method and an apparatus of loading a pre-load seed for a test code of a physical layer device (PHY). For a physical layer device including a scrambler and a Non-Return-to-Zero/Non-Return-to-Zero-Inverted (NRZ/NRZI) converter connected to the scrambler, where the NRZ/NRZI converter receives an NRZ signal outputted by the scrambler, and outputs an NRZI signal, the method includes the following steps. (a) Determine whether a plurality of starting bits of a frame are present. (b) Repeat from step (a) if the starting bits are not present. (c) Load the pre-load seed to the scrambler and transmitting the test code. (d) Set the NRZI signal in a high level when the NRZI signal is not in the high level. On the other hand, for a physical layer device having a descrambler, the method includes the steps of: (a) determining whether a plurality of starting bits of a frame are present; and (b) loading the pre-load seed to the descrambler to retrieve the test code.
Abstract: A portable scanning apparatus comprising a scanner and a feeder. The scanner is connected to a host by a USB line through which the power of the scanner is provided. The scanner includes an application specific integrated circuit (ASIC) and an image sensing module for controlling the scanning apparatus. The image sensing module is used for receiving image signals from the document which are further outputted to the ASIC. The scanner can be selectively combined with a feeder as a sheet-fed scanner or detached from the feeder as a hand-held one. The feeder includes a motor for controlling the rolling wheel of the feeder and battery for supplying the power of the feeder.
Abstract: A method for testing I/O ports of a computer motherboard under test. A non-volatile memory on the computer motherboard under test is provided with a test code for initializing the computer motherboard and testing its I/O ports, in which the test code includes a plurality of test routines corresponding to the I/O ports to be tested. Upon power-up or reboot, the computer motherboard under test is booted from the test code in the non-volatile memory. One of the I/O ports is selected from an interactive display menu, and then a CPU on the computer motherboard under test executes the corresponding test routine for the selected I/O port to test it. If there is an abnormal signal pin in the selected I/O port, a failure message is displayed to indicate which signal pin of the selected I/O port is not operating correctly. Otherwise, a pass message is displayed.
Abstract: To improve the edge breakdown caused by edge electrical field at the tunnel oxide of high-density flash memory, a bird's beak is formed at the edge of the active region of the flash memory to prevent the corner of the tunnel oxide layer formed later on the active region from being excessively sharp, which will result in localized intense electrical field, and further lead to breakdown caused by the edge electrical field.
Abstract: Electrical connection of a measuring socket to an IC package, to measure electrical characteristics of the IC package, is realized by bringing a measuring pin of a measuring arm of the measuring socket into contact with an end surface of a distal end of a lead of the IC package. Accordingly, a problem of solder plated to the lead becoming attached to and deposited on an upper side of a socket pin and shaved off by the distal end of the lead, and thereby producing solder residue, is solved. This problem occurs when electrical connection to an IC package is conventionally realized by bringing the distal end of the lead of the IC package into contact with a distal end of the socket pin.
Abstract: The specification discloses a cancellation circuit that suppresses electromagnetic interference in a high speed circuit using a function generator so as to utilize differential signals to cancel the magnetic field and to couple with the electric field without affecting the quality of signals. The differential signals are generated from a clock pin of the function generator, which is phase shifted by a phase shifter and passes through a microstrip antenna or a stripline antenna so as to emit electromagnetic waves with inversed phases, canceling the originally existent electromagnetic waves.
Abstract: A signal line connector includes a locknut, a hollow cylindrical casing, the casing having a coupling neck mounted with a gasket ring and fitted into the locknut, a locating barrel fitted into the other end of the casing, the locating barrel having an inside annular flange, and a center holding down tube mounted in the casing and secured to the locknut by the casing, the center holding down tube having a barbed portion facing the inside annular flange of the center holding down tube and adapted to hold down the tubular outer conductor and outer insulative layer of a signal line against the inside wall of the locating barrel, keeping the center conductor of the signal line axially suspended in the locknut.
Abstract: A light source mechanism of a barcode scanner includes a laser diode as the point type light source, a collimating lens and a standing cylindrical lens in front of the laser diode. A mirror or a thin-film coating prism can be installed in front of the collimating lens to have the light beam from the collimating lens be reflected at least once to go out in horizontal direction. The reflected light beam from barcode passes through a condensing lens and is received by a linear receiver (CCD or CMOS sensor, for example) and is converted into electrical signals, and decoded by a circuit to get the data.
Abstract: A step-rotating device for rotatably connecting a first member and a second member. The step-rotating device includes a gasket movably connected to the first member and having a first surface with a hole, a base fixed on the second member and having a second surface, facing the first surface, with a shaft rotatably inserted into the hole and a plurality of annularly arranged recesses, and a plurality of rollers disposed between the gasket and the base.
Abstract: The invention provides a solution/device for controlling external parameters by use of the same data cable and specific software to transfer/receive messages and monitor/control external parameters in a system. Additionally, the invention is compatible with ATA/ATAPI by using the ATA protocol or side-band protocol to make a main system communicate with other device(s) through an ATA/ATAPI device's data cable. Also, the invention uses the system's data cables and a non-standard controlling sequence to transfer and receive messages by the same cable to connect with the external devices for monitoring/controlling external parameters. Hence, the number of data wires needed is reduced. Also, the invention can decrease the manufacture costs and get a better heating dissipation.
Abstract: A Viterbi detector for use in a partial response maximum likelihood (PRML) signal processing apparatus. The Viterbi detector can be used for different partial response (PR) equalizations with different parameters, and can be used for different PRML signal processing apparatuses such as high speed optical disk systems. The Viterbi detector includes an input buffer, a branch metric calculation unit, an add-compare-select circuit, a path memory unit, and a clock buffer. The Viterbi is designed based on a union trellis diagram relation obtained by combining trellis diagram relations associated with the PR equalizations with the parameters. According to the invention, the Viterbi detector has advantages of saving hardware space and conveniently changing PR equalizations with different parameters.
Abstract: A mechanism for removing probe covers from an ear thermometer includes a fastening portion, a connecting portion and a pushing portion. The fastening portion is mounted to the thermometer at a portion near the measuring probe. The connecting portion has one end connected to the fastening portion and the other end connected to the pushing portion. The pushing portion is located at rear end of the probe cover so that as the connecting portion or the pushing portion being pressed by user, the probe cover is removed from the probe.
Type:
Grant
Filed:
July 15, 2003
Date of Patent:
September 7, 2004
Assignee:
Norm Pacific Automation Corp.
Inventors:
Hung-Tsan Huang, Min-Teng Chu, Howard Lin
Abstract: Disclosed is a double layer block assembly comprising four single layer blocks, two first double layer blocks, two second double layer blocks, four outer stickers, and four inner stickers. An upper layer section of the assembly comprises two single layer blocks, two upper layers of two first double layer blocks, and two upper layers of two second double layer blocks. A lower layer section of the assembly comprises the other two single layer blocks, two lower layers of two first double layer blocks, and two lower layers of two second double layer blocks. The outer stickers are adhered to top and bottom surfaces of the assembly. The inner stickers are adhered between the upper and lower layer sections so that the assembly is able to turn about two parallel axes endlessly. A variety of shapes and colorful patterns for advertisement can be thus formed.
Abstract: This invention relates to a structure on a bi-color rust-proof barrier layer of a tool head, mainly used to form a surrounding recessed section marked with indication of a size, a model, a trademark and the like on a surface of a tool head (a metallic object) so that the structure on the rust-proof barrier layer painted with the different two colors is provided between the recessed section and the peripheral surface, thereby highlighting the indication marked at the recessed section so as to increase the distinctions of said object from other object.
Abstract: The present invention provides a clock signal feeding circuit that suppresses performance degradation under the worst operating conditions. A clock signal CLK is fed, via a delay buffer with a capacitor as a delay element, to a FF disposed in the upstream of a logic circuit block having the longest processing time, and a clock signal CLK is fed, via a delay buffer with a transistor as a delay element, to a FF disposed in the downstream of the logic circuit block having the longest processing time. If the processing time of the logic circuit block increases due to factors such as variations in operating environment, and thus outputting of data representing the operation result delays, the timing of the clock signals fed to the FFs also delays due to the same factors.
Abstract: The invention provides a method of manufacturing an optical-gate transistor. A BP buffer layer is formed on a silicone substrate first, and a first AIN layer is then formed for offsetting strain in the layers deposited on the first AIN layer. Subsequently, a GaN layer and an n-type AIN layer are successively deposited to form a hetero-junction at the interface. A selective epitaxy or anisotropic etching of a GaN-group material is conducted to form a prism-shaped, light-receiving layer with a cubic lattice. The prism-shaped, light-receiving layer focuses incident light to induce electrons in the n-type AIN layer, which then form a high-speed 2DEG in the GaN layer, thereby increasing the power and sensitivity of the transistor being controlled by illumination.
Type:
Grant
Filed:
August 7, 2003
Date of Patent:
September 7, 2004
Assignee:
Vtera Technology Inc.
Inventors:
Terashima Kazutaka, Shun-Hung Hsu, Chiung-Yu Chang, Mu-Jen Lai