Abstract: An image-forming apparatus includes a developing roller and a developing blade. The developing blade applies toner to the developing roller to form a thin layer of toner on the developing roller. The image-forming apparatus performs a printing operation that includes a paper-feeding period and a developing period following the paper-feeding period. The developing roller rotates relative to the developing blade at a first speed during the paper-feeding period and then at a lower second speed than during the developing period, thereby eliminating chance of white lines of occurring in a printed image. The developing roller may be rotated at a constant speed in each printing operation until the circumferential surface of the developing roller has traveled over a certain cumulative distance. When the surface has traveled over the first distance, the developing roller may be rotated at an increased speed over a certain distance.
Abstract: An automatic document feeder (ADF) capable of releasing jammed documents has a transmission mechanism that includes a removable transmission device. The removable transmission device is moved away and thus the transmission mechanism is disconnected when necessary. The disconnection of the transmission mechanism makes the releasing of the jammed documents much easier. The removable transmission device can be removed by the force for removing the jammed documents, or by using a spring, a leaf spring, or an electromagnetic switch.
Abstract: A material layer which contains nitrogen atoms is formed on a first wiring or at a side surface of a first wiring. When etching for forming a via hole is carried out, nitrogen atoms contained in the material layer bind with CF molecules, CF2 molecules, CF3 molecules and the like contained in an etching gas, and compounds thus formed adhere to a surface of a silicon dioxide layer at side walls and a bottom portion of a via hole. As a result, once the material layer is exposed during etching for forming a hole, thereafter, the etching rate decreases. Accordingly even if there is misalignment of a via hole pattern with respect to a first wiring pattern when the via hole pattern is formed by lithography, etching of the silicon dioxide layer does not proceed to an underlying silicon substrate. Thus, short circuits are not formed between the first wiring and the silicon substrate via a second wiring layer which is deposited later.
Abstract: An electronic data processing device receives first and second data sets representing first and second comparable digital images. It comprises registration means comprising a first module which calculates a main function representative of the correlation ratios between the data of the first and second sets, and a second module which determines a registration transformation between one of the images and the other from the main function.
Type:
Grant
Filed:
July 27, 1999
Date of Patent:
March 25, 2003
Assignee:
Inria Institut National de Recherche
Inventors:
Alexis Roche, Nicholas Ayache, Gregoire Malandain, Xavier Pennec
Abstract: In the case where the amplitude of the input signal is large, the duty ratio of the signal output from the last stage is greatly changed as compared with the input signal. In the present invention, in order to solve this problem, there is provided a cascade connection type inverter circuit in which the inverters at the odd-number stage is fed back to the input circuit of the inverter at the first stage via an impedance element, the circuit being characterized in that a switching means is connected for supplying to an input circuit of the inverter at the first stage a compensation current for compensating a disparity between the logical threshold value of the inverter at the first stage and the central voltage of the input signal when the voltage generated between the output terminal of the inverter at the first stage and the input terminal thereof exceeds a predetermined threshold value level.
Abstract: A load reduction system switches from a commercial power distribution system to an onsite power source when a fault in the commercial distribution system is detected, and reduces the drain on the on-site power source by effectively eliminating 240 volt loads such as an electric water heater or stove. This load reduction accomplished by shifting the phase of 120 volt AC power that is applied to a user line by approximately 180°, so that the potential difference between this user line and another user line that receives 120 volt AC power is reduced from 240 volts AC to a small value. Power can still be received by 120 volt loads from the two user lines and a further, neutral, user line. A load reduction system in accordance with the present invention may also be employed with a portable generator, for example, to permit selective removal of 240 volt loads while the generator continues to power 120 volt loads.
Abstract: A USB removable mechanism is built into a recess in a computer. The recess is sized to conform to a 3.5-inch floppy disk drive. An electronic device for I/O control or analog/digital conversion is detachably mounted in the mechanism. The electronic device comprises two rear USB connectors coupled to and secured to rear USB sockets in the recess for signal communication. A number of advantages are obtained such as easy assembly of one of a variety of electronic devices in the recess, easy replacement of the mounted electronic device, Plug and Play, portable, modular, mountable in an existing 3.5-inch floppy disk drive compartment of the computer without modification.
Abstract: A semiconductor. device comprises a semiconductor chip on which a plurality of grooves are defined, thus acting as a resisting member, the effect of which is to prevent the semiconductor chip from bending. Consequently, the thickness of the lower portion of the plastic layer becomes greater, thereby preventing cracks from occurring on the semiconductor chip.
Type:
Grant
Filed:
June 9, 1999
Date of Patent:
March 18, 2003
Assignee:
Oki Electric Industry Co., Ltd.
Inventors:
Etsuo Yamada, Kenji Nagasaki, Yasushi Shiraishi, Kazuhiko Sera
Abstract: A drive circuit drives a plurality of light emitting diodes (LED) in an LED array chip. The drive circuit includes a row of drive transistors that supply drive currents to corresponding LEDs, a control circuit that produces a control voltage for driving the drive devices, and a supply voltage electrode that extends along the row. The control circuit has a reference current transistor through which a predetermined reference current flows in accordance with a control voltage applied to the reference current transistor. The control voltage is also supplied to the individual drive devices to cause the drive currents to flow through the corresponding LEDs in reference to the reference current. The supply voltage electrode supplies a supply voltage to each of the drive transistors such that each drive transistor receives its supply voltage from a nearest location on the supply voltage electrode. The reference transistor receives its supply voltage from a substantially mid point of the supply voltage electrode.
Abstract: A trench 312a passing through an impurity area 301a of a circuit element formed at a semiconductor layer 306 of an SOI substrate 314 and extending to a conductive layer 311 formed at a semiconductor substrate 304 is provided. Inside the trench 312a, a conductor 310a for electrically connecting the impurity area 301a of the circuit element and the conductive layer 311 is formed. By adopting this structure, it becomes possible to promptly transmit a surge voltage applied through an external connector terminal 101 to the semiconductor substrate 304 to prevent breakdown at the buried insulator layer. Thus, the buried insulator layer in a semiconductor integrated circuit device having an SOI structure is protected by providing a protective element under the impurity area of the integrated circuit element to assure a high degree of reliability while enabling high-speed drive and higher integration.
Abstract: A circuit breaker for shutting off an AC electrical source from a phase wire and a neutral wire has the ability to detect an arc fault, ground fault and overload. The circuit breaker includes an arc fault circuit interrupter (AFCI), a ground fault circuit interrupter (GFCI), an overload circuit interrupter (OLCI), and trip circuitry. The AFCI, the GFCI and the OLCI are crossed between the phase wire and the neutral wire of the AC power line and detect the arc fault, ground fault and overload respectively. The trip circuitry is used for shutting off the AC source from the circuit breaker when at least one of the arc fault, ground fault and overload occurs. The circuit breaker is shut when the level of at least one of an arc fault trip signal, ground fault trip signal and overload trip signal is larger than a specified reference trip level.
Abstract: The present invention pertains to rotary internal combustion engines and essentially relates to an engine including a body that comprises an inner cylindrical cavity as well as side covers. The cavity comprises a rotor-piston which is concentrically mounted therein, which comprises side surfaces, radial protrusions and radial recesses on its peripheral surface, and which forms together with the body a plurality of segmented cavities. The side surfaces of the rotor-piston abut tightly with the side covers, while the radial protrusions at the peripheral surface of the rotor-piston abut tightly with the inner cylindrical surface of the body cavity. The combustion chamber is located beyond the limits of the inner cylindrical cavity and communicates with the latter through inlet and outlet channels provided with controlled slide valves.
Abstract: A method of forming a semiconductor device having reduced interconnect-line parasitic capacitance is provided. The method includes the following steps. First, a substrate is provided and a plurality of interconnect lines are formed on the substrate. A barrier layer is then formed. Next, the barrier layer is hardened and thinned so as to make the barrier layer having a thin-film attribute. Following that, a separation layer is formed by filling the space between and above the interconnect lines with a dielectric. Then, the dielectric is foamed. After that, an insulating layer is formed. Finally, the dielectric is condensed such that air gaps are formed in the separation layer.
Abstract: A method of remote booting of a client computer in a LAN. The client computer downloads the drivers and the operating systems needed from the server through a coupled PCI network interface card. The driver is provided with a detecting program. When the client computer downloads and executes the first operating system, a hardware interrupt signal is cleared and the booting procedures can be completed successfully.
Abstract: A safety syringe comprising a casing having a neck and a plunger having a distal portion, a weak portion, and a coupling portion covered by a hollow stopper having a membrane. The plunger is channeled in the casing and is moveable between an extended position and a compressed position. A needle holder, in the neck, contains a distally facing arrowhead and a proximally facing needle. Moving the plunger from an extended position to a compressed position, causes the arrowhead to puncture the membrane and engage the coupling portion. If the plunger is returned to the extended position, the needle is drawn into the casing and the distal portion of the plunger can be removed. If the plunger is re-compressed, the needle encounters a wall in the neck preventing the needle from exiting the casing. The syringe is easy to manufacture and prevents manufacturing burrs from being injected into patients.
Type:
Grant
Filed:
February 22, 2001
Date of Patent:
March 11, 2003
Inventors:
Xiping Wang, Bizhu Zhang, Xiaopeng Wang
Abstract: A CMOS active pixel of increased sensitivity includes a floating diffusion layer, a photo-diode, a reset circuit and an output circuit The floating diffusion layer is of a first dopant type and receives a signal charge. The photo-diode generates the signal charge depending on an energy inputted thereto and transfers the signal charge to the floating diffusion layer. The photo-diode has first and second lower diode dopant layers of the first dopant type and an upper diode dopant layer of a second dopant type. The polarity of the second dopant type is opposite to that of the first dopant type. The first and second lower diode dopant layers are formed to contact a lower portion of the upper diode dopant layer. The upper diode dopant layer and the first lower diode dopant layer are formed to contact the floating diffusion layer. The second lower diode dopant layer is formed to contact the first lower diode dopant layer.
Abstract: Transmission units such as packets of coded data are received in a transmission layer, converted to coding units, supplied to a coding layer, and decoded in the coding layer. Errors in arriving transmission units are detected in the transmission layer. The results of error detection in the transmission layer are used when the coding units are decoded in the coding layer, preferably by having the transmission layer provide the coding layer with error information explicitly indicating which of the coding units are free of errors and which are not.