Abstract: Disclosed herein are a hygienic band having a three-dimensional structure and a manufacturing method thereof. The hygienic band is inserted naturally along a corresponding curved surface of a user's body to be in close contact with the body, thus improving her dressing style without affecting her health, and preventing menstrual blood from leaking along the curved surface of the body. The hygienic band has a pad having an absorbent layer and a cover. A rear folded part is provided at a central region on a rear portion of the pad, and has first and second folded surfaces, each having the shape of a triangle which is inclined such that a rear portion thereof is higher. When she wears the hygienic band, the rear folded part protrudes inwards in the shape of a triangular pyramid and is inserted to be in close contact with a curved surface of her body.

Abstract: Provided is a composition for an oxide semiconductor thin film and a field effect transistor (FET) using the composition. The composition includes from about 50 to about 99 mol % of a zinc oxide (ZnO); from about 0.5 to 49.5 mol % of a tin oxide (SnOx); and remaining molar percentage of an aluminum oxide (AlOx). The thin film formed of the composition remains in amorphous phase at a temperature of 400° C. or less. The FET includes an active layer formed of the composition and has improved electrical characteristics. The FET can be fabricated using a low-temperature process without expensive raw materials, such as In and Ga.

Abstract: A lens array unit includes first and second lens array plates that oppose each other on opposite sides of a support member. Each of the lens array plates supports a set of lenses that are arranged in one direction and that have optical axes extending in a direction perpendicular to the one direction. The bending rigidity of the support member in the direction that the optical axes extend is higher than the bending rigidity of the first lens array plate in that direction.

Abstract: Disclosed is a field emission device. The field emission device includes: an anode substrate including an anode electrode formed on a surface thereof and a fluorescent layer formed on the anode electrode; a cathode substrate disposed opposite to and spaced apart from the anode substrate, and including at least one cathode electrode formed toward the anode substrate and a field emitter formed on each cathode electrode; and a gate substrate having one surface in contact with the cathode substrate, wherein the gate substrate include gate insulators surrounding the field emitters and having a plurality of openings exposing the field emitters, and a plurality of gate electrodes formed on the gate insulators around the openings and electrically isolated from one another.

Abstract: An overcurrent detection circuit (50 in FIG. 1) in a DC-DC converter is connected to a switching control circuit (1), and detects an inductor current flowing through an inductor (L) during the ON control of a switching element (Mn), so as to decide whether the inductor current has decreased down to a prescribed value. The switching control circuit (1) alters the switching timing of a control signal to extend the OFF state of a switching element (Mp) until the decrease of the inductor current to a predetermined magnitude is decided by the overcurrent detection circuit (50). Even when a delay is involved in an overcurrent detection operation, the DC-DC converter is still capable of overcurrent limitation.

Abstract: A three-dimensional surround scanning device and a method thereof are described, which are adopted to perform surround scanning on a scene area, so as to construct a three-dimensional model. The device includes an image acquisition element, a first moving mechanism, a range acquisition element, and a controller. The controller controls the image acquisition element, the range acquisition element, and the first moving mechanism to perform three-dimensional image acquisition, so as to obtain a two-dimensional image covering the scene area, depth information with three-dimensional coordinates, and corresponding position signals. The controller rearranges and combines the two-dimensional image, position signals, and depth information, so as to construct the three-dimensional model.

Abstract: A load driving circuit in which a load is connected to the connecting point of transistors as low-side and high-side main switch elements that have a totem pole structure and are connected between a pair of drive voltage supply lines. A protection circuit section is provided for the high-side transistor. In the protection circuit section, a resistor as a voltage control element is provided for a MOSFET as an overvoltage prevention switch and a capacitor is connected between the gate and the drain of the MOSFET.

Abstract: A passive optical network communication system transmits an optical time-division multiplexed signal from a central office through a passive optical coupler to a number of subscribers, and transmits optical encoded signals from the subscribers through the passive optical coupler to the central office. Optical encoded signals from different subscribers are separated by a decoding process performed at the central office. All operations can be synchronized with a clock signal which is generated at the central office and recovered from the optical time-division multiplexed signal by the subscribers' equipment. The communication range can be extended inexpensively by using a single high-power light source at the central office while using relatively low-power light sources at the subscribers' equipment.

Abstract: A de-interlacing method is applied to a to-be-de-interlaced field including display pixels of display lines and to-be-interpolated pixels of to-be-interpolated lines. First, a corresponding edge-direction value of each of edge pixels in the to-be-de-interlaced field is determined. Next, it is judged whether one of the display pixels near each to-be-interpolated pixel has a corresponding edge-direction value so that a judgement result is obtained. Then, a corresponding edge-direction value of each to-be-interpolated pixel is set according to the corresponding edge-direction values of specific display pixels of the display pixels near the to-be-interpolated pixel if the judgement result is affirmative. Finally, a corresponding display pixel pair of up and down display lines near each to-be-interpolated pixel is selected according to the corresponding edge-direction value of each to-be-interpolated pixel so that a luminance value and a chrominance value of the to-be-interpolated pixel are calculated.

Abstract: There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.

Abstract: An image processing apparatus is used for copying an original. A reading section reads an image of an original. An image forming section forms the image of the original on a medium. When an error detector has detected an error in the image processing apparatus, a network connecting section connects the image processing apparatus to a network so that a printer detector detects an external image forming apparatus connected to the network. Then, a selecting section selects the image forming apparatus connected to the network. The image forming apparatus is selected based on certain predetermined conditions. Then, an image transferring section transfers the image of the original to the image forming apparatus so that the image of the original is printed by the detected image forming apparatus.

Abstract: An optical transceiver which can effectively reduce optical output jitter when an error is made during designing and manufacturing of a printed circuit board (PCB), and a method of controlling optical output jitter using the optical transceiver are provided. The optical transceiver includes a transmitter unit including an equalizing (EQ) filter which can reduce jitter of a high speed electric signal; a control circuit which controls the EQ filter; a receiver unit which receives an optical signal; and a micro-controller which controls the transmitter unit and the receiver unit.

Abstract: A semiconductor light emitting device has a device body made of a group III nitride semiconductor having a major surface defined by a nonpolar plane. In the device body, a contact portion with an n-type electrode includes a crystal plane different from the major surface. For example, the contact portion may include a corrugated surface. More specifically, the contact portion may include a region having a plurality of protrusions parallel to a polar plane formed in a striped manner.

Abstract: An electromagnetic wave absorber includes a ground layer made of a metal conductor, a dielectric layer formed on the ground layer, and a unit cell pattern made of a resistive material, and formed on the dielectric layer. The unit cell pattern includes a fundamental patch having a regular square shape, in which a rectangular recess is formed on the center of each of the respective sides, the fundamental patch being located at the center of each of the unit cell pattern, and half cross dipole patches, which are respectively disposed at the four sides of the fundamental patch at a regular angle so as to be engaged with the recesses formed on the respective sides of the fundamental patch at a regular interval.

Abstract: In a router, a receiver receives a communication packet meant for a communication destination other than this router device. A calculator calculates a cost value for forwarding a communication packet to a destination by each of neighboring routers adjacent to the router. A next-router determiner selects a neighboring router as a next router based on the cost value calculated to supply the determined information and the communication packet to a transmitter, which transmits the communication packet to the destination based on the determined information. The calculator calculates the cost value based on the node degree of the neighboring routers and the number of hops of the communication packet from the neighboring routers to the destination.

Abstract: Provided are an apparatus for controlling power management of a DSP (Digital Signal Processor) and a power management system and method using the same. The power management system includes a command decoding device for decoding a program into which a PSM (Power Saving Mode) command and a general command are inserted and transmitting module information required for execution of a corresponding command to a power management control apparatus at the time of decoding the corresponding command; a pipeline control device for blocking and restarting the transmission of data through a pipeline upon receipt of a pipeline control signal (pipeline stall) from the power management control device; and the power management control apparatus for controlling power in respective modules by setting/resetting corresponding bits of a PSM status register and a PSM flag register in accordance with the PSM command and the general command decoded in the command decoding device.

Abstract: A print data forming apparatus has an authentication information setting unit which sets authentication information into a print job. A print processing apparatus has: a print job storing unit which receives and stores the print job in which the authentication information has been set; an operation panel control unit which receives the authentication information based on a print request; an authentication discriminating unit which compares the authentication information based on the print request received through the operation panel control unit with the authentication information of the stored print job, thereby discriminating whether or not they coincide; and a print job managing unit which, if they coincide, allows all print jobs having the authentication information that coincides with the authentication information based on the print request among the stored print jobs to be print-processed. A print system which can perform the authentication printing with high workability is obtained.

Abstract: A high-voltage-resistant MOS transistor having high electrical strength and a method for manufacturing the same, whereby to effectively decrease cost of manufacturing, are provided. The gate electrode includes a pair of separate opposition parts and a combination part sandwiched by the pair of opposition parts so that the opposition parts are opposed to each other so as not to overlap with the element region and the combination part overlaps with the element region. Each length of the opposition parts in a junction direction is longer than that of the combination part. The sidewall insulating film is formed so as to be continuous between the opposition parts and partially overlap with the element region. Therefore, the number of processes and a processing period for forming the MOS transistor can be decreased and uniformity of LDD lengths of the MOS transistors can be improved.

Abstract: Provided are a nitride semiconductor light emitting element which does not suffer a damage on a light emitting region and has a high luminance without deterioration, even though the nitride semiconductor light emitting element is one in which electrodes are disposed opposite to each other and an isolation trench for chip separation and laser lift-off is formed by etching; and a manufacturing method thereof. An n-type nitride semiconductor layer 2 has a step, formed in a position beyond an active layer 3 when viewed from a p side. Up to the position of this step A, a protective insulating film 6 covers a part of the n-type nitride semiconductor layer 2, the active layer 3, a p-type nitride semiconductor layer 4, the side of a p electrode 5 and a part of the top side of the p electrode 5.