Patents Represented by Attorney T

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  • Method of pore detection
    Patent number: 8315464
    Abstract: The a surface of an object is illuminated in sequence with a number of light beams, each of which is nearly tangential to the surface. Images of the surface are recorded for each light beam, and the images are analyzed to identify features such as depressions in the surface.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: November 20, 2012
    Assignee: Coherix
    Inventor: Claron Swonger
  • Method for fabricating semiconductor device
    Patent number: 8314030
    Abstract: A method for fabricating a semiconductor device through a chemical mechanical polishing (CMP) process is provided. The CMP process is performed by using a slurry. The semiconductor device fabrication method can ensure the reliability and economical efficiency of the device by performing a CMP process using a CMP slurry having a high polishing selectivity with respect to a target surface, an anti-scratch characteristic, and a high global planarization characteristic.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: November 20, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Jum-Yong Park, Noh-Jung Kwak, Yong-Soo Choi, Cheol-Hwi Ryu
  • Method for fabricating semiconductor device with buried gates
    Patent number: 8314021
    Abstract: A method for fabricating a semiconductor device includes: forming a thin film over trenches by using a first source gas and a first reaction gas; performing a first post-treatment on the thin film by using a second reaction gas; and performing a second post-treatment on the thin film by using a second source gas.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: November 20, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jik-Ho Cho, Seung-Jin Yeom, Seung-Hee Hong, Nam-Yeal Lee
  • Independently removable nucleic acid sequencing system and method
    Patent number: 8315817
    Abstract: A technique for sequencing nucleic acids in an automated or semi-automated manner is disclosed. Sample arrays of a multitude of nucleic acid sites are processed in multiple cycles to add nucleotides to the material to be sequenced, detect the nucleotides added to sites, and to de-block the added nucleotides of blocking agents and tags used to identify the last added nucleotide. Multiple parameters of the system are monitored to enable diagnosis and correction of problems as they occur during sequencing of the samples. Quality control routines are run during sequencing to determine quality of samples, and quality of the data collected.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: November 20, 2012
    Assignee: Illumina, Inc.
    Inventors: Robert C. Kain, David L. Heiner, Chanfeng Zhao, Kevin Gunderson
  • Internal voltage generator
    Patent number: 8314651
    Abstract: An internal voltage generator includes: a detection unit configured to detect a level of an internal voltage in comparison to a reference voltage; a first driving unit configured to discharge an internal voltage terminal, through which the internal voltage is outputted, in response to an output signal of the detection unit; a current detection unit configured to detect a discharge current flowing through the first driving unit; and a second driving unit configured to charge the internal voltage terminal in response to an output signal of the current detection unit.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: November 20, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Taek-Sang Song, Dae-Han Kwon, Jun-Woo Lee
  • Semiconductor chip and semiconductor wafer
    Patent number: 8314476
    Abstract: A semiconductor wafer includes at least one chip formed on a substrate, and a scribe line region surrounding the chip. The chip includes a device formation region, and a chip boundary region surrounding the device formation region and formed between the device formation region and the scribe line region. The chip boundary region includes a guard ring structure which physically separates the device formation region from the scribe line region. The guard ring structure includes a signal transfer element which transfers an electric signal between the device formation region and the scribe line region.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: November 20, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Jun-Gi Choi, Jong-Chern Lee
  • Method and apparatus for controlling UE emission in a wireless communication system
    Patent number: 8315217
    Abstract: Techniques for controlling the operation of user equipments (UEs) to mitigate emissions out of band are described. A base station may identify a UE potentially causing excessive emissions out of band due to transmission of control information and may schedule the UE to reduce the emissions out of band. In one design, the base station may schedule the UE to send control information on a Physical Uplink Shared Channel (PUSCH) instead of a Physical Uplink Control Channel (PUCCH). In another design, the base station may assign the UE with resources for the PUCCH to send control information. The assigned resources may be selected to mitigate the emissions out of band and may be (i) located within a target frequency range, (ii) located away from a frequency band to be mitigated with the emissions out of band, or (iii) obtained with a reuse scheme and have less inter-cell interference from other UEs.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: November 20, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Juan Montojo, Wanshi Chen, Peter Gaal, Arnaud Meylan
  • Self-expandable shape memory alloy stent and method for fabricating the same
    Patent number: 8313522
    Abstract: A self-expandable shape memory alloy stent includes first and second wires made of super-elastic shape memory alloy. The first wire extends downwardly from the top to the bottom of the stent without interlocking with itself but extends upwardly from the bottom to the top of the stent while interlocking with itself to leave a multiplicity of rhombic spaces. Similarly, the second wire extends downwardly from the top to the bottom of the stent without interlocking with itself but extends upwardly from the bottom to the top of the stent while interlocking with itself, in such a manner as to divide the rhombic spaces formed by the first wire into four small rhombic spaces. The first wire and the second wire are woven with each other in such a manner that the second wire passes alternately below and above the first wire at intersection points.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: November 20, 2012
    Assignees: Taewoong Medical Co., Ltd
    Inventors: Kyong-Min Shin, Kang-sun Hong
  • Treadmill belt with foamed cushion layer and method of making
    Patent number: 8308592
    Abstract: The present invention is directed to a treadmill belt with foamed cushion layer and method of making same. In one embodiment, the treadmill belt includes a fabric base layer and a foamed cushion layer foamed on and integral with the fabric base layer. The foamed cushion layer includes a thermoplastic composition and has a Shore A hardness of about 20 to about 80. In one example, the first foamed cushion layer is from about 0.05 inches to about 0.35 inches thick. The thermoplastic composition, prior to being foamed, includes about 1 part to about 5 parts of a foaming agent, e.g., a chemical foaming agent, based on 100 parts thermoplastic material, e.g., polyvinyl chloride. An outer wear layer is securely adhered on the foamed cushion layer to sandwich the foamed cushion layer between the fabric base layer and outer wear layer thereby defining the treadmill belt.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: November 13, 2012
    Assignee: Veyance Technologies, Inc
    Inventors: Peter E. Radding, Steven Wayne Mutch
  • Apparatus, system, and method for email response time estimation based on a set of recipients
    Patent number: 8312089
    Abstract: An apparatus, system, and method are disclosed to dynamically estimate a response time while composing an email. A recipient module determines a set of email recipients identified by a user. The set of email recipients comprises intended recipients of a new email message from the user. A response time identification module determines a response time trend for each email recipient. Each response time trend has information relating to previous email response times of an email recipient. An estimate module determines an estimated response time for the new email message based on the retrieved response time trends. A display module displays a visual representation of the response time to the user.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Lisa Seacat Deluca, Itzhack Goldberg, Ohad Greenshpan, Boaz Mizrachi
  • Method for forming buried word line in semiconductor device
    Patent number: 8309448
    Abstract: Provided is a method for forming a buried word line in a semiconductor device. The method includes forming a trench by etching a pad layer and a substrate, forming a conductive layer to fill the trench, planarizing the conductive layer until the pad layer is exposed, performing an etch-back process on the planarized conductive layer, and performing an annealing process in an atmosphere of a nitride-based gas after at least one of the forming of the conductive layer, the planarizing of the conductive layer, and the performing of the etch-back process on the planarized conductive layer.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Sun-Hwan Hwang, Se-Aug Jang, Kee-Joon Oh, Soon-Young Park
  • Identifying non-randomness in integrated circuit product yield
    Patent number: 8311659
    Abstract: A method of analyzing integrated circuit (IC) product yield can include storing, within a memory of a system comprising a processor, parametric data from a manufacturing process of an IC and determining a measure of non-random variation for at least one parameter of the parametric data using a pattern detection technique. The processor can compare the measure of non-random variation to a randomness criteria and selectively output a notification indicating that variation in the parameter is non-random according to the comparison of the measure of non-random variation to the randomness criteria.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: November 13, 2012
    Assignee: Xilinx, Inc.
    Inventors: Cinti X. Chen, Joe W. Zhao
  • Method and apparatus for managing a collection of portlets in a portal server
    Patent number: 8312170
    Abstract: The invention provides apparatus and methodology for displaying to a user a web portal for a web application, the web portal displaying a plurality of associated portlets, sharing information with each other, accessible by the user; including: a portal server for operating a web portal to provide access to the web application; a portlet application for operating on the portal server, for managing a collection of associated portlets; the portlet application includes: means to initiate portlets on requests of a user to access the web application; means to manage a portlet application session object for the portlets; and, a portlet application session object data store controlled by the portlet application session object for saving parameters from user requests for associating the portlets with the with the portlet application session object.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Joanna Ng, Rohit Kapoor, Leho Nigul
  • Multi-threaded deterministic router
    Patent number: 8312409
    Abstract: A method is described that includes: determining that nets of the circuit design comprise overlap, where the overlap indicates that at least two of the nets of the circuit design use a same routing resource; dividing the nets with overlap among a plurality of buckets, where for each bucket, a net of the bucket does not overlap any other net in the bucket; sequentially processing each bucket by unrouting and rerouting, via at least one processor, nets in the bucket; and storing routing information specifying routes for nets of the circuit design.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 13, 2012
    Assignee: Xilinx, Inc.
    Inventors: Gitu Jain, Vinay Verma, Taneem Ahmed, Sandor S. Kalman, Sanjeev Kwatra, Christopher H. Kingsley, Jason H. Anderson, Satyaki Das
  • Stacked semiconductor package
    Patent number: 8310062
    Abstract: A semiconductor package includes a wire board, a plurality of semiconductor chips configured to be stacked over the wire board and to be electrically coupled with the wire board, and at least one shielding unit configured to be formed between the plurality of semiconductor chips and to be maintained at a predetermined voltage.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jun-Ho Lee, Hyung-Dong Lee, Hyun-Seok Kim
  • Semiconductor device with buried bit lines interconnected to one-side-contact and fabrication method thereof
    Patent number: 8309416
    Abstract: A semiconductor device with reduced resistance of a buried bit line, and a method for fabricating the same. The method for fabricating a semiconductor device includes etching a semiconductor substrate to form a plurality of active regions which are separated from one another by trenches formed in between, forming a side contact on a sidewall of each active region, and forming metal bit lines, each filling a portion of a respective trench and connected to the side contact.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Eun-Shil Park, Yong-Seok Eun, Kee-Jeung Lee, Min-Soo Kim
  • High flow-low pressure irrigation system
    Patent number: 8308710
    Abstract: A high-flow low-pressure irrigation system for directing a fluid to and recovering the fluid from an area within a body, the irrigation system comprising a sheath defining a sheath lumen and a flexible catheter disposed in and through the sheath lumen. The catheter defines a catheter lumen and comprises a plurality of apertures at a distal portion that curls in a pigtail configuration. The fluid is directed and outputted to the body area through the catheter lumen and the apertures, and the outputted fluid is recovered and returned through the sheath lumen.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: November 13, 2012
    Assignee: Applied Medical Resources Corporation
    Inventors: Jaime Landman, Ralph V. Clayman, Richard C Ewers
  • Persistent synchronization within a media oriented systems transport network
    Patent number: 8311174
    Abstract: A method of processing data within a controller for a network can include, while frame lock is not established, detecting a first preamble and a second preamble within a data stream of the network (1210, 1235). Biphase units between the first preamble and the second preamble can be counted (1215). Frame lock can be acquired on the data stream responsive to determining that the first preamble and the second preamble are separated by a number of biphase units corresponding to a frame (1235). A synchronization signal indicating that frame lock has been acquired can be output responsive to acquiring frame lock on the data stream (1240).
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: November 13, 2012
    Assignee: Xilinx, Inc.
    Inventors: Robert Bellarmin Susai, Venkata Vamsi Krishna Dhanikonda
  • Strap attachment device
    Patent number: D670599
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: November 13, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Gad Shaanan, Dudley K. Fetzer, Kenneth W. Baar
  • Garden hose
    Patent number: D671196
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: November 20, 2012
    Assignee: Veyance Technologies, Inc
    Inventors: Anthony Montalvo, Robert H. Vogliano, Marc Borowczak