Patents Represented by Attorney Wells St. John P.S.
  • Patent number: 8208241
    Abstract: Methods of forming an oxide are disclosed and include contacting a ruthenium-containing material with a tantalum-containing precursor and contacting the ruthenium-containing material with a vapor that includes water and optionally molecular hydrogen (H2). Articles including a first crystalline tantalum pentoxide and a second crystalline tantalum pentoxide on at least a portion of the first crystalline tantalum pentoxide, wherein the first tantalum pentoxide has a crystallographic orientation that is different than the crystallographic orientation of the second crystalline tantalum pentoxide, are also disclosed.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: June 26, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Vassil Antonov
  • Patent number: 8207557
    Abstract: Some embodiments include cross-point memory structures. The structures may include a line of first electrode material extending along a first horizontal direction, a multi-sided container of access device materials over the first electrode material, a memory element material within the multi-sided container, and a line of second electrode material over the memory element material and extending along a second horizontal direction that is orthogonal to the first horizontal direction. Some embodiments include methods of forming memory arrays. The methods may include forming a memory cell stack over a first electrode material, and then patterning the first electrode material and the memory cell stack into a first set of spaced lines extending along a first horizontal direction. Spaced lines of second electrode material may be formed over the first set of spaced lines, and may extend along a second horizontal direction that is orthogonal to the first horizontal direction.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: June 26, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Scott Sills, Gurtej S. Sandhu
  • Patent number: 8206603
    Abstract: Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: June 26, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 8207570
    Abstract: Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: June 26, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Ramakanth Alapati, Ardavan Niroomand, Gurtej S. Sandhu
  • Patent number: 8207016
    Abstract: The invention includes semiconductor packages having grooves within a semiconductor die backside; and includes semiconductor packages utilizing carbon nanostructures (such as, for example, carbon nanotubes) as thermally conductive interface materials. The invention also includes methods of cooling a semiconductor die in which coolant is forced through grooves in a backside of the die, and includes methods of making semiconductor packages.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: June 26, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Gurtej S. Sandhu
  • Patent number: 8199556
    Abstract: Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: June 12, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Bhaskar Srinivasan, Gurtej S. Sandhu
  • Patent number: 8198172
    Abstract: Methods for fabricating integrated circuit devices on an acceptor substrate devoid of circuitry are disclosed. Integrated circuit devices are formed by sequentially disposing one or more levels of semiconductor material on an acceptor substrate, and fabricating circuitry on each level of semiconductor material before disposition of a next-higher level. After encapsulation of the circuitry, the acceptor substrate is removed and semiconductor dice are singulated. Integrated circuit devices formed by the methods are also disclosed.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: June 12, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Krishna K. Parat
  • Patent number: 8198129
    Abstract: A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR)3 to a substrate, where R is alkyl, and forming there-from antimony-comprising phase change material on the substrate. The phase change material has no greater than 10 atomic percent oxygen, and includes another metal in addition to antimony.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: June 12, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Timothy A. Quick, Eugene P. Marsh
  • Patent number: 8193381
    Abstract: A method of oxidizing hydroxymethylfurfural (HMF) includes providing a starting material which includes HMF in a solvent comprising water into a reactor. At least one of air and O2 is provided into the reactor. The starting material is contacted with the catalyst comprising Pt on a support material where the contacting is conducted at a reactor temperature of from about 50° C. to about 200° C. A method of producing an oxidation catalyst where ZrO2 is provided and is calcined. The ZrO2 is mixed with platinum (II) acetylacetonate to form a mixture. The mixture is subjected to rotary evaporation to form a product. The product is calcined and reduced under hydrogen to form an activated product. The activated product is passivated under a flow of 2% O2.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: June 5, 2012
    Assignee: Battelle Memorial Institute
    Inventors: Michael A. Lilga, Richard T. Hallen, Jianli Hu, James F. White, Michel J. Gray
  • Patent number: 8193382
    Abstract: A method of oxidizing hydroxymethylfurfural (HMF) includes providing a starting material which includes HMF in a solvent comprising water into a reactor. At least one of air and O2 is provided into the reactor. The starting material is contacted with the catalyst comprising Pt on a support material where the contacting is conducted at a reactor temperature of from about 50° C. to about 200° C. A method of producing an oxidation catalyst where ZrO2 is provided and is calcined. The ZrO2 is mixed with platinum (II) acetylacetonate to form a mixture. The mixture is subjected to rotary evaporation to form a product. The product is calcined and reduced under hydrogen to form an activated product. The activated product is passivated under a flow of 2% O2.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: June 5, 2012
    Assignee: Battelle Memorial Institute
    Inventors: Michael A. Lilga, Richard T. Hallen, Jianli Hu, James F. White, Michel J. Gray
  • Patent number: 8192903
    Abstract: Some embodiments include methods of forming photomasks. A stack of at least three different materials is formed over a base. Regions of the stack are removed to leave a mask pattern over the base. The mask pattern includes a pair of spaced-apart adjacent segments of the stack. A liner is formed to cover sidewalls of the segments. Some embodiments include photomasks. The photomasks may include a transparent base supporting a pair of spaced-apart adjacent features. The spaced-apart adjacent features may include sidewalls, with inner sidewalls of the spaced-apart features being adjacent one another, and spaced from one another by a gap. A coating layer of from about 5 Angstroms thick to about 50 Angstroms thick may be along the entirety of the sidewalls of the spaced-apart adjacent features. Some embodiments include methods of photolithographically patterning substrates.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: June 5, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Fei Wang
  • Patent number: 8193568
    Abstract: Some embodiments include memory cells that contain a dynamic random access memory (DRAM) element and a nonvolatile memory (NVM) element. The DRAM element contains two types of DRAM nanoparticles that differ in work function. The NVM contains two types of NVM nanoparticles that differ in trapping depth. The NVM nanoparticles may be in vertically displaced charge-trapping planes. The memory cell contains a tunnel dielectric, and one of the charge-trapping planes of the NVM may be further from the tunnel dielectric than the other. The NVM charge-trapping plane that is further from the tunnel dielectric may contain larger NVM nanoparticles than the other NVM charge-trapping plane. The DRAM element may contain a single charge-trapping plane that has both types of DRAM nanoparticles therein. The memory cells may be incorporated into electronic systems.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: June 5, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Arup Bhattacharyya
  • Patent number: 8188464
    Abstract: The present invention provides atomic layer deposition systems and methods that include metal compounds with at least one ?-diketiminate ligand. Such systems and methods can be useful for depositing metal-containing layers on substrates.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: May 29, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Timothy A. Quick
  • Patent number: 8187933
    Abstract: Some embodiments include dielectric structures. The structures include first and second portions that are directly against one another. The first portion may contain a homogeneous mixture of a first phase and a second phase. The first phase may have a dielectric constant of greater than or equal to 25, and the second phase may have a dielectric constant of less than or equal to 20. The second portion may be entirely a single composition having a dielectric constant of greater than or equal to 25. Some embodiments include electrical components, such as capacitors and transistors, containing dielectric structures of the type described above. Some embodiments include methods of forming dielectric structures, and some embodiments include methods of forming electrical components.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: May 29, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Noel Rocklein, Chris Carlson, Dave Peterson, Cunyu Yang, Praveen Vaidyanathan, Vishwanath Bhat
  • Patent number: 8189375
    Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: May 29, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Jun Liu
  • Patent number: 8187224
    Abstract: Operations performed by a medicine injector having a barrel with a receiving cavity to slidably receive a syringe subassembly for axial movement therein. Upon removal of a safety and release of a syringe driver, the syringe driver moves forward and injects the syringe needle. One or more penetration controls are shown for controlling injection needle penetration depth. In some forms of penetration control a sleeve and spring are used in the methods performed. This construction and a cushioning piece or pieces may be used to reduce the forces experienced by the syringe subassembly. A load distribution ring may further be used with a cushion, spring and guide ring which may be used to help distribute deceleration loading experienced by the syringe subassembly.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: May 29, 2012
    Assignee: Washington Biotech Corporation
    Inventor: Ronald E. Wyrick
  • Patent number: 8181437
    Abstract: A cable assembly comprises a cable having a main body, strands, a tail and a first cable end, an anchor, and a sleeve having a bore, a first end and a second end. The first end is positioned generally adjacent the anchor, the second end is positioned remote from the anchor, and the cable end is positioned in the bore. A cured adhesive is positioned in the bore, binding the sleeve to the cable, along with a rope insert which is positioned at least partially in the bore, wherein the cured adhesive holds the at least one rope insert in a fixed position with respect to the sleeve.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: May 22, 2012
    Assignee: Franklin Offshore International Pte. Ltd.
    Inventors: David Malcolm Glennie, Lew Kah Hoo
  • Patent number: 8183826
    Abstract: Battery charging control methods, electric vehicle charging methods, battery charging apparatuses and rechargeable battery systems. According to one aspect, a battery charging control method includes accessing information regarding a presence of at least one of a surplus and a deficiency of electrical energy upon an electrical power distribution system at a plurality of different moments in time, and using the information, controlling an adjustment of an amount of the electrical energy provided from the electrical power distribution system to a rechargeable battery to charge the rechargeable battery.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: May 22, 2012
    Assignee: Battelle Memorial Institute
    Inventors: Francis K. Tuffner, Michael C. W. Kintner-Meyer, Donald J. Hammerstrom, Richard M. Pratt
  • Patent number: 8183157
    Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: May 22, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Naraji B Rana, Nishant Sinha, Prashant Raghu, Jim J. Hofmann, Neil Joseph Greeley
  • Patent number: D661192
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: June 5, 2012
    Assignee: Paris Croissant Co., Ltd.
    Inventor: Jae Bok Hwang