Abstract: By creating a temperature profile across a polishing pad, a respective temperature profile may be obtained in a substrate to be polished, which may result in a respective varying removal rate across the substrate for a chemically reactive slurry material or for an electro-chemically activated polishing process. Hence, highly sensitive materials, such as material comprising low-k dielectrics, may be efficiently polished with a high degree of controllability.

Abstract: Superior contact elements may be formed in semiconductor devices in which sophisticated replacement gate approaches may be applied. To this end, a dielectric cap layer is provided prior to patterning the interlayer dielectric material so that any previously created cracks may be reliably sealed prior to the deposition of the contact material, while the removal of any excess portion thereof may be performed without an undue interaction with the electrode metal of the gate electrode structures. Consequently, a significantly reduced defect rate may be achieved.

Abstract: A static RAM cell may be formed on the basis of two double channel transistors and a select transistor, wherein a body contact may be positioned laterally between the two double channel transistors in the form of a dummy gate electrode structure, while a further rectangular contact may connect the gate electrodes, the source regions and the body contact, thereby establishing a conductive path to the body regions of the transistors. Hence, compared to conventional body contacts, a very space-efficient configuration may be established so that bit density in static RAM cells may be significantly increased.

Abstract: By recessing portions of the drain and source areas on the basis of a spacer structure, the subsequent implantation process for forming the deep drain and source regions may result in a moderately high dopant concentration extending down to the buried insulating layer of an SOI transistor. Furthermore, the spacer structure maintains a significant amount of a strained semiconductor alloy with its original thickness, thereby providing an efficient strain-inducing mechanism. By using sophisticated anneal techniques, undue lateral diffusion may be avoided, thereby allowing a reduction of the lateral width of the respective spacers and thus a reduction of the length of the transistor devices. Hence, enhanced charge carrier mobility in combination with reduced junction capacitance may be accomplished on the basis of reduced lateral dimensions.

Abstract: A multi-function multi-hole rig including multiple machines for accomplishing various rig functions, e.g., drilling machine(s), tripping machine(s), casing machine(s), cementing machine(s), workover machine(s), etc., for drilling, completing and/or working over multiple wellbores without moving the rig. Rig functions may be performed one after the other and/or simultaneously, while allowing other functions related to completion and production to continue simultaneously.

Abstract: A multi-function multi-hole rig is disclosed which, in certain aspects, includes multiple machines for accomplishing rig functions, e.g. drilling machine(s), tripping machine(s), casing machine(s), and/or cementing machine(s), for producing multiple usable wellbores one after the other. This abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure and is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims, 37 C.F.R. 1.72(b).

Abstract: In sophisticated semiconductor devices, a strain-inducing semiconductor alloy may be positioned close to the channel region by forming cavities on the basis of a wet chemical etch process, which may have an anisotropic etch behavior with respect to different crystallographic orientations. In one embodiment, TMAH may be used which exhibits, in addition to the anisotropic etch behavior, a high etch selectivity with respect to silicon dioxide, thereby enabling extremely thin etch stop layers which additionally provide the possibility of further reducing the offset from the channel region while not unduly contributing to overall process variability.

Abstract: A method for estimating a state of a process implemented by a tool for fabricating workpieces includes collecting metrology data associated with a subset of workpieces processed in the tool. The collecting exhibits an irregular pattern. Metrology data associated with a selected state observation is received for a selected run of the process. A tuning factor for the selected run is determined based on the irregular pattern. The selected state observation is discounted based on the determined tuning factor. A state estimate of the process is determined based on the discounted selected state observation. At least one process tool operable to implement the process is controlled based on the state estimate.

Abstract: The present invention provides a method involving a media server, a wireless network, and at least one media client associated with at least one air interface with the wireless network. The method includes accessing first information indicative of at least one state of the at least one media client. The first information is provided by the at least one media client. The method also includes accessing second information indicative of resources associated with the at least one air interface. The second information is provided by the wireless network. The method further includes providing at least one feedback parameter to the media server. The at least one feedback parameter is formed based on the first and second information.

Abstract: An adjustable valve is disclosed which includes a plug body having at least one flow path defined therein and a choke cage positioned proximate the plug body, the choke cage comprising a plurality of openings to permit a flow of a fluid therethrough, the choke cage adapted to be used to regulate the flow of fluid through the flow path in the plug body.

Abstract: The present disclosure is generally directed to centrifuge systems and methods for controlling centrifuge systems, wherein the systems in certain aspects are adapted for processing material, e.g., but not limited to drilling fluids with solids therein. One illustrative method includes providing a centrifuge system that is made up of, among other things, a bowl, a bowl motor system, a bowl variable frequency drive, a conveyor, a conveyor motor, a conveyor variable frequency drive, a pump, a pump motor, and a pump variable frequency drive. Additionally, the centrifuge system includes a control system that is adapted to control the bowl variable frequency drive, the conveyor variable frequency drive, and the pump variable frequency drive. The method includes controlling the centrifuge system in the G-force differential control mode by controlling the G-force on the bowl as the bowl is rotated by the bowl motor system so that the G-force on the bowl does not exceed a pre-set maximum G-force.

Abstract: By providing a surface modification process prior to or during a self-limiting deposition process, the per se highly conformal deposition behavior may be selectively changed so as to obtain reliable coverage at specific surface areas, while significantly reducing or suppressing a deposition above unwanted surface areas, such as the bottom of a via in advanced metallization structures of highly scaled semiconductor devices.

Abstract: A unified test structure which is applicable for all levels of a semiconductor device including a current path chain having a first half chain and a second half chain, wherein each half chain comprises lower metallization segments, upper metallization segments, an insulating layer between the lower metallization segments and the upper metallization segments, and connection segments. Each of the connection segments is electrically connected to a contact region of one of the lower metallization segments and to a contact region of one of the upper metallization segments to thereby electrically connect the respective lower metallization segment and the respective upper metallization segment, and the first half chain and the second half chain are of different configuration.

Abstract: In a manufacturing strategy for providing high-k metal gate electrode structures in an early manufacturing stage, process-related non-uniformities during and after the patterning of the gate electrode structures may be reduced by providing a superior surface topography. To this end, the material loss in the isolation region may generally be reduced and a more symmetrical exposure to reactive etch atmospheres during the subsequent removal of the growth mask may be accomplished by providing an additional etch mask when removing the growth mask from the active regions of N-channel transistors, after the growth of the threshold adjusting semiconductor material on the active regions of the P-channel transistors.

Abstract: The throughput of complex cluster tools of a semiconductor manufacturing environment may be determined for a desired manufacturing scenario on the basis of automatically generated throughput models. The throughput models may be established on the basis of rule messages with high statistical relevance.

Abstract: The present invention provides a method of providing a group paging message. One embodiment of the method includes providing a first message during a first portion of a predetermined time period. The first message includes information indicating a second portion of the predetermined time period during which at least one idle first mobile unit is to wake up and attempt to receive a second message from the base station(s). The embodiment of the method also includes providing a third message during a third portion of the predetermined time period. The third message includes information indicating the second portion of the predetermined time period during which at least one idle second mobile unit is to wake up and attempt to receive the second message. The third portion of the predetermined time period is different than the first portion.

Abstract: In one embodiment of the instant invention, a non-coherent transmission method for uplink control signals is provided. The transmission methodology uses a constant amplitude zero-autocorrelation (CAZAC) sequence for relatively short control signal lengths. The methodology includes creating a CAZAC sequence, truncating the CAZAC sequence into a plurality of segments; and transmitting each of the segments within a predetermined window of time.

Abstract: A three-dimensional double channel transistor configuration is provided in which a second channel region may be embedded into the body region of the transistor, thereby providing a three-state behavior, which may therefore increase functionality of conventional three-dimensional transistor architectures. The double channel three-dimensional transistors may be used for forming a static RAM cell with a reduced number of transistors, while also providing scalability by taking advantage of the enhanced controllability of FinFETS and nano pipe transistor architectures.

Abstract: A method, system, and apparatus for implementing a safe mode operation of an implantable medical system using impedance adjustment(s) are provided. A first impedance is provided to a lead. An indication of a possibility of a coupled energy is received. Based upon said indication, a second impedance associated with the lead to reduce the coupled energy is provided.

Abstract: For providing control of two-step or a multi-step deposition process, a method and a corresponding deposition system is provided comprising providing a deposition process having at least two sub-processes employing different sets of process parameters, wherein each set of process parameters comprises at least one process parameter. The method comprises controllably generating an actual value for at least one first process parameter by taking into account at least one previous value of the respective first process parameter, wherein each first process parameter is a process parameter of said at least two sets of process parameters.