Patents Represented by Attorney Williams, Morgan and Amerson
  • Patent number: 8105962
    Abstract: By providing a protection layer for suppressing stress relaxation in a tensile-stressed dielectric material during a dual stress liner approach, performance of N-channel transistors may be increased, while nevertheless maintaining a high degree of compatibility with conventional dual stress liner approaches.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: January 31, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Kai Frohberg, Frank Feustel, Thomas Werner, Uwe Griebenow
  • Patent number: 8101512
    Abstract: In a mesa isolation configuration for forming a transistor on a semiconductor island, an additional planarization step is performed to enhance the uniformity of the gate patterning process. In some illustrative embodiments, the gate electrode material may be planarized, for instance, on the basis of CMP, to compensate for the highly non-uniform surface topography, when the gate electrode material is formed above the non-filled isolation trenches. Consequently, significant advantages of the mesa isolation strategy may be combined with a high degree of scalability due to the enhancement of the critical gate patterning process.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: January 24, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Martin Gerhardt, Martin Trentzsch, Markus Forsberg, Manfred Horstmann
  • Patent number: 8101524
    Abstract: During the formation of a metal line in a low-k dielectric material, an upper portion of a trench formed in a capping layer and the low-k dielectric material is treated to provide enlarged tapering or corner rounding, thereby significantly improving the fill capabilities of subsequent metal deposition processes. In one particular embodiment, an additional etch process is performed after etching through the capping layer and the low-k dielectric layer and after resist removal.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: January 24, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kai Frohberg, Matthias Schaller, Massud Aminpur
  • Patent number: 8103478
    Abstract: By dividing a complex set of parameters of a production process in forming semiconductor devices into individual blocks, respective PCA models may be established for each block and may thereafter be combined by operating on summary statistics of each model block in order to evaluate the complete initial parameter set. Thus, compared to conventional strategies, a significant reduction of the size of the combined PCA model compared to a single PCA model may be obtained, while also achieving an enhanced degree of flexibility in evaluating various subsets of parameters.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: January 24, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Richard Good, Daniel Kost
  • Patent number: 8102785
    Abstract: The present invention provides a method of calibrating base station comprising a plurality of antennas and operating in an Orthogonal Frequency Division Multiplex (OFDM) and Time Division Duplex (TDD) mode. One embodiment of the method includes a method of calibrating a base station comprising a plurality of antennas for beamsteering forward link traffic data to a target mobile in a TDD wireless communication system. Each antenna is connected to a corresponding radio via a transmit/receive switch that is configured to switch between a receive path and a transmit path. The method includes transmitting a first signal from a first radio via a first cross-over cable coupled to the first radio and a second radio such that the first signal is received by the second radio. The method also includes transmitting a second signal from the second radio via a second cross-over cable coupled between the first and second radios such that the second signal is received by the first radio.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: January 24, 2012
    Assignee: Alcatel Lucent
    Inventors: Sudarshan A. Rao, Kam Hung Wu, Yifei Yuan
  • Patent number: 8103284
    Abstract: The present invention provides a method for reporting load measurements. The method may include providing information indicative of a first load associated with at least one first channel type to a first scheduling unit. The first load represents a difference between a second load associated with at least one second channel type and a third load.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: January 24, 2012
    Assignee: Alcatel Lucent
    Inventors: Jens Mueckenheim, Dimitris Vasilaras, George M. Warner
  • Patent number: 8097519
    Abstract: By removing material during the formation of trench openings of isolation structures in an SOI device, the subsequent implantation process for defining the well region for a substrate diode may be performed on the basis of moderately low implantation energies, thereby increasing process uniformity and significantly reducing cycle time of the implantation process. Thus, enhanced reliability and stability of the substrate diode may be accomplished while also providing a high degree of compatibility with conventional manufacturing techniques.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: January 17, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Maciej Wiatr, Markus Forsberg, Roman Boschke
  • Patent number: 8098643
    Abstract: In an H-ARQ system, when the AN is receiving packet data traffic on the RL from an AT and is generating ACKs and NAKs according to the ability of the AN to properly decode such data, the AN gates-off a DRCLock bit within in a sub-packet duration in which an ACK is transmitted on the FL MAC channel. When it receives an ACK, the AT ignores the non-transmitted DRCLock bit in a current sub-packet duration, and assumes that the DRC channel is “good”. When the AN sends a NAK to the AT, it also sends the DRCLock bit. When the AT receives a NAK in a sub-packet duration, it reads and processes whatever DRCLock bit is received during that sub-packet duration. When no data traffic is transmitted on the RL traffic channel, corresponding DRCLock bits are not gated-off by the AN and are transmitted to the AT. The AT then processes the received DRCLock bits. In an alternative embodiment, transmission of DRCLock is totally eliminated.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: January 17, 2012
    Assignee: Alcatel Lucent
    Inventors: Gang Li, Ming Lu, Jialin Zou
  • Patent number: 8098757
    Abstract: The present invention provides a method of windowing signals in a communication system. The method includes accessing at least one first signal associated with at least one of a plurality of orthogonal frequencies and applying a window function to the at least one first signal to form at least one second signal. The at least one second signal remains substantially orthogonal to signals associated with the plurality of orthogonal frequencies.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: January 17, 2012
    Assignee: Alcatel Lucent
    Inventors: Qi Bi, Sinan Gezici, Lei Song, Yifei Yuan
  • Patent number: 8097536
    Abstract: Metallization systems on the basis of copper and low-k dielectric materials may be efficiently formed by providing an additional dielectric material of enhanced surface conditions after the patterning of the low-k dielectric material. Consequently, defects such as isolated copper voids and the like may be reduced without significantly affecting overall performance of the metallization system.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: January 17, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Holger Schuehrer, Juergen Boemmels
  • Patent number: 8097542
    Abstract: In a dual stress liner approach, an intermediate etch stop material may be provided on the basis of a plasma-assisted oxidation process rather than by deposition so the corresponding thickness of the etch stop material may be reduced. Consequently, the resulting aspect ratio may be less pronounced compared to conventional strategies, thereby reducing deposition-related irregularities which may translate into a significant reduction of yield loss, in particular for highly scaled semiconductor devices.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: January 17, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Karsten Wieczorek, Manfred Horstmann, Peter Huebler, Kerstin Ruttloff
  • Patent number: 8095331
    Abstract: In a transaction-based verification environment for complex semiconductor devices, enhanced verification efficiency may be achieved by providing a transaction to machine code translator and an appropriate interface that enables access of the translated machine code instruction by a CPU under test. In this manner, transaction-based test environments may have a high degree of re-usability and may be used for verification on block level and system level.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 10, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Christian Haufe, Ingo Kuehn, David Larsen
  • Patent number: 8092609
    Abstract: We disclose a method of inverting sucrose, including (i) determining an initial solids concentration of an aqueous sucrose solution (solidsi), an initial bed volume (BVi) of a sucrose inversion resin system, a minimum target inversion percentage (invert %min), a maximum target inversion percentage (invert %max), a target maximum hydroxymethylfuran (HMF) concentration (HMFmax), a minimum target pH (pHmin), or a maximum target pH (pHmax); (ii) contacting the sucrose inversion resin system with the aqueous sucrose solution under conditions of aqueous solution flow rate in BVi/hr (ratep) and aqueous solution temperature in ° C.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: January 10, 2012
    Assignee: European Sugar Holdings S.A.R.L.
    Inventors: Robert Jansen, John Kerr, Anthony Baiada
  • Patent number: 8093634
    Abstract: By repeatedly applying a process sequence comprising an etch process and a selective epitaxial growth process during the formation of drain and source areas in a transistor device, highly complex dopant profiles may be generated on the basis of in situ doping. Further-more, a strain material may be provided while stress relaxation mechanisms may be reduced due to the absence of any implantation processes.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: January 10, 2012
    Assignee: Globalfoundries Inc.
    Inventors: Anthony Mowry, Andy Wei, Andreas Gehring, Casey Scott
  • Patent number: 8090095
    Abstract: A method, apparatus, and system are provided for controlling the power-mode of a telephonic device. An off-hook condition is detected. A power level for an operation of an electronic device is determined based upon detecting the off-hook condition. Determining the power level includes determining a frequency parameter and/or a pulse-width parameter of a power signal. The power signal is provided for an operation of the electronic device based upon the determined power level.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: January 3, 2012
    Assignee: Microsemi Semiconductor (U.S.) Inc.
    Inventors: Edward W. Cox, Ken D. Alton
  • Patent number: 8084354
    Abstract: During the fabrication of sophisticated metallization systems of semiconductor devices, material deterioration of conductive cap layers may be significantly reduced by providing a noble metal on exposed surface areas after the patterning of the corresponding via openings. Hence, well-established wet chemical etch chemistries may be used while not unduly contributing to process complexity.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: December 27, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Volker Kahlert, Christof Streck
  • Patent number: 8086216
    Abstract: One embodiment of the present invention provides a method for implementation in a policy control and charging rules functional entity in a wireless communication system. The method includes receiving, from at least one of a source policy and charging enforcement function in a source access network or a target policy and charging enforcement function in a target access network, information indicative of a mobile unit that has handed off from the source access network to the target access network. The method also includes establishing a first session for communicating policy and charging rules associated with the mobile unit. The first session is concurrent with a second session for communicating policy and charging rules associated with the mobile unit. The second session was previously established with the source policy and charging enforcement function in the source access network.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: December 27, 2011
    Assignee: Alcatel Lucent
    Inventors: Peretz M. Feder, Konstantin Livanos
  • Patent number: 8084088
    Abstract: Wafer-to-wafer thickness uniformity may be improved significantly in a process for depositing a silicon nitride layer in that the flow rate of the reactant and the chamber pressure are varied during a deposition cycle. By correspondingly adapting the flow rate and/or the chamber pressure before and after the actual deposition step, the process conditions may be more effectively stabilized, thereby reducing process variations, even after non-deposition phases of the deposition tool, such as a preceding plasma clean process or an idle period of the tool.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: December 27, 2011
    Assignee: Globalfoundries Inc.
    Inventors: Katja Huy, Hartmut Ruelke, Michael Turner
  • Patent number: 8084651
    Abstract: A process for the recovery of glycerol comprises contacting an aqueous feed composition that comprises water, glycerol, and at least one contaminant with a solvent extractant comprising at least one C5-C8 alkanol, optionally in admixture with at least one alkane, to form a first mixture, and separating the first mixture into a first solvent phase and a first aqueous phase. The first solvent phase comprises a majority (more than 50 wt %) of the solvent extractant and a majority of the glycerol that was present in the aqueous feed composition. The weight ratio in the first solvent phase of glycerol to a contaminant present is greater than the weight ratio of glycerol to the contaminant in the aqueous feed composition. The first aqueous phase comprises a majority of the water from the aqueous feed composition and at least some of the contaminant from the aqueous feed composition.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: December 27, 2011
    Assignee: Tate & Lyle Ingredients Americas LLC
    Inventors: Robert P. Jansen, Anthony Baiada, John Kerr
  • Patent number: 8086310
    Abstract: A method and an apparatus for projecting an end of service (EOS) and/or an elective replacement indication (ERI) of a component in an implantable device and for determining an impedance experienced by a lead associated with the implantable device. An active charge depletion of an implantable device is determined. An inactive charge depletion of the implantable device is determined. A time period until an end of service (EOS) and/or elective replacement indication (ERI) of a power supply associated with the IMD based upon the active charge depletion, the inactive charge depletion, and the initial and final (EOS) battery charges, is determined. Furthermore, to determine the impedance described above, a substantially constant current signal is provided through a first terminal and a second terminal of the lead. A voltage across the first and second terminals is measured. An impedance across the first and second terminals is determined based upon the constant current signal and the measured voltage.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: December 27, 2011
    Assignee: Cyberonics, Inc.
    Inventors: Randolph K. Armstrong, Albert W. Guzman, Huan D. Nguyen