Patents Assigned to Advanced Semiconductor Engineering
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Publication number: 20200381348Abstract: A semiconductor device package includes a first dielectric layer, a conductive pad and an electrical contact. The first dielectric layer has a first surface and a second surface opposite to the first surface. The conductive pad is disposed within the first dielectric layer. The conductive pad includes a first conductive layer and a barrier. The first conductive layer is adjacent to the second surface of the first dielectric layer. The first conductive layer has a first surface facing the first surface of the first dielectric layer and a second surface opposite to the first surface. The second surface of the first conductive layer is exposed from the first dielectric layer. The barrier layer is disposed on the first surface of the first conductive layer. The electrical contact is disposed on the second surface of the first conductive layer of the conductive pad.Type: ApplicationFiled: May 30, 2019Publication date: December 3, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yung-Shun CHANG, Teck-Chong LEE
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Publication number: 20200365499Abstract: A semiconductor device package includes a first substrate, a second substrate, a first support element, a second support element and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The first substrate has a conductive pad adjacent to the first surface of the first substrate. The second substrate is disposed over the first surface of the first substrate. The first support element is disposed between the first substrate and the second substrate. The first support element is disposed adjacent to an edge of the first surface of the first substrate. The second support element is disposed between the first substrate and the second substrate. The second support element is disposed far away from the edge of the first surface of the first substrate. The electronic component is disposed on the second surface of the first substrate.Type: ApplicationFiled: May 17, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Nan LIN, Jen-Chieh KAO
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Publication number: 20200365478Abstract: A semiconductor package structure includes a package substrate, an encapsulant, at least one passage and at least one semiconductor element. The encapsulant is disposed on the package substrate and has a peripheral surface, and includes a first encapsulant portion and a second encapsulant portion spaced apart from the first encapsulant portion. The at least one passage is defined by the first encapsulant portion and the second encapsulant portion, and the passage has at least one opening in the peripheral surface of the encapsulant. The at least one semiconductor element is disposed on the package substrate and exposed in the passage.Type: ApplicationFiled: May 17, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: I-Chia LU, Mao-Sung HSU
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Publication number: 20200365485Abstract: A thermal conductive device includes a first conductive plate, a second conductive plate, a plurality of wicks and a fluid. The first conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The second conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The first portion and the second portion of the first conductive plate are respectively connected to the first portion and the second portion of the second conductive plate to define a chamber. The plurality of wicks are disposed within the chamber. The fluid is disposed within the chamber.Type: ApplicationFiled: May 15, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ian HU, Chih-Pin HUNG, Meng-Kai SHIH
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Publication number: 20200365544Abstract: A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.Type: ApplicationFiled: May 15, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi-Han CHEN, Hung-Yi LIN
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Publication number: 20200363594Abstract: A semiconductor module includes a photonic integrated circuit and a receptacle. The photonic integrated circuit includes a substrate, a waveguide disposed on the substrate, and a recess in the substrate and having a first width. The receptacle is bonded to a top surface of the substrate and aligning with the recess. The receptacle and the recess jointly form a cavity, and the receptacle has a second width greater than the first width. A method for manufacturing the semiconductor module is also disclosed.Type: ApplicationFiled: May 15, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Mei-Ju LU, Chi-Han CHEN, Zong-Yu YANG, Pei-Jung YANG
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Publication number: 20200365500Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, a lower encapsulant and an intermediate layer. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The lower encapsulant surrounds a lateral peripheral surface of the lower conductive structure. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure to bond the upper conductive structure and the lower conductive structure together. The upper conductive structure is electrically connected to the lower conductive structure.Type: ApplicationFiled: May 13, 2019Publication date: November 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wen Hung HUANG
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Publication number: 20200357730Abstract: A semiconductor package structure includes a wiring structure, a semiconductor module, a protection layer and a plurality of outer conductive vias. The wiring structure includes at least one dielectric layer and at least one redistribution layer. The semiconductor module is electrically connected to the wiring structure. The semiconductor module has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The protection layer covers the lateral surface of the semiconductor module and a surface of the wiring structure. The outer conductive vias surround the lateral surface of the semiconductor module, electrically connect to the wiring structure, and extend through a dielectric layer of the wiring structure and the protection layer.Type: ApplicationFiled: May 10, 2019Publication date: November 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Pin TSAI, Man-Wen TSENG, Yu-Ting LU
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Publication number: 20200359502Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.Type: ApplicationFiled: July 29, 2020Publication date: November 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Fan CHEN, Chien-Hao WANG
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Publication number: 20200350282Abstract: A semiconductor package device includes a transparent carrier, a first patterned conductive layer, a second patterned conductive layer, and a first insulation layer. The transparent carrier has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface of the transparent carrier. The first patterned conductive layer has a first surface coplanar with the third surface of the transparent carrier. The second patterned conductive layer is disposed on the first surface of the transparent carrier and electrically isolated from the first patterned conductive layer. The first insulation layer is disposed on the transparent carrier and covers the first patterned conductive layer.Type: ApplicationFiled: July 17, 2020Publication date: November 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yung-Shun CHANG, Teck-Chong LEE
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Publication number: 20200350254Abstract: A conductive structure includes a core portion, a plurality of electronic devices and a filling material. The core portion defines a cavity. The electronic devices are disposed in the cavity of the core portion. The filling material is disposed between the electronic devices and a sidewall of the cavity of the core portion.Type: ApplicationFiled: April 30, 2019Publication date: November 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wen Hung HUANG
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Publication number: 20200350223Abstract: A semiconductor device package includes a dielectric layer, a package body and a protection structure. The dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The package body is disposed on the first surface of the dielectric layer. The package body covers a first portion of the lateral surface of the dielectric layer and exposes a second portion of the lateral surface of the dielectric layer. The protection structure is disposed on the second portion of the lateral surface of the dielectric layer.Type: ApplicationFiled: May 2, 2019Publication date: November 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Lin SHIH, Chih Cheng LEE
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Publication number: 20200350180Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and a second surface opposite to the first surface, an encapsulant, and an antenna. The encapsulant is disposed on the first surface of the carrier. The antenna is disposed on the encapsulant. The antenna includes a seed layer and a conductive layer.Type: ApplicationFiled: May 3, 2019Publication date: November 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: You-Lung YEN, Bernd Karl APPELT, Kay Stefan ESSIG
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Publication number: 20200350239Abstract: A semiconductor device package includes a carrier, a first conductive post and a first adhesive layer. The first conductive post is disposed on the carrier. The first conductive post includes a lower surface facing the carrier, an upper surface opposite to the lower surface and a lateral surface extended between the upper surface and the lower surface. The first adhesive layer surrounds a portion of the lateral surface of the first conductive post. The first adhesive layer comprises conductive particles and an adhesive. The first conductive post has a height measured from the upper surface to the lower surface and a width. The height is greater than the width.Type: ApplicationFiled: July 17, 2020Publication date: November 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Yu-Ying LEE
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Publication number: 20200350240Abstract: A wiring structure includes at least one upper conductive structure, a lower conductive structure and an intermediate layer. The upper conductive structure includes at least one upper dielectric layer, at least one upper circuit layer in contact with the upper dielectric layer, and at least one bonding portion electrically connected to the upper circuit layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonding the upper conductive structure and the lower conductive structure together. The upper conductive structure is electrically connected to the lower conductive structure.Type: ApplicationFiled: April 30, 2019Publication date: November 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wen Hung HUANG
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Publication number: 20200343336Abstract: The subject application relates to a semiconductor package device, which includes a first conductive layer; a semiconductor wall disposed on the first conductive layer; a first conductive wall disposed on the first conductive layer; and an insulation layer disposed on the first conductive layer and between the semiconductor wall and the first conductive wall.Type: ApplicationFiled: April 25, 2019Publication date: October 29, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shao Hsuan CHUANG, Huang-Hsien CHANG, Min Lung HUANG, Yu Cheng CHEN, Syu-Tang LIU
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Publication number: 20200343212Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure and an intermediate layer. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The at least one lower dielectric layer of the lower conductive structure is substantially free of glass fiber. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The upper conductive structure is electrically connected to the lower conductive structure.Type: ApplicationFiled: April 29, 2019Publication date: October 29, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wen Hung HUANG
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Publication number: 20200335858Abstract: A semiconductor device package includes a first glass carrier, a package body, a first circuit layer and a first antenna layer. The first circuit layer is disposed on the first surface of the first glass carrier. The first circuit layer has a redistribution layer (RDL). The package body is disposed on the first circuit layer. The package body has an interconnection structure penetrating the package body and is electrically connected to the RDL of the first circuit layer. The first antenna layer is disposed on the second surface of the first glass carrier.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH, Chen-Chao WANG, Teck-Chong LEE
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Publication number: 20200335452Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a package body and a shield. The substrate has a first surface and a second surface opposite to the first surface. The substrate defines a cavity from the second surface extending into the substrate. The first electronic component is disposed on the first surface of the substrate. The second electronic component is disposed within the cavity of the substrate. The package body is disposed on a portion of the first surface of the substrate and covers the first electronic component. The shield is disposed on external surfaces of the package body.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Li-Hua TAI, Pai-Chou LIU, Yun-Chih FEI, Wen-Pin HUANG, Sheng-Hong ZHENG
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Publication number: 20200335458Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit layer, a first package body, a first antenna and an electronic component. The circuit layer has a first surface and a second surface opposite to the first surface. The first package body is disposed on the first surface of the circuit layer. The first antenna penetrates the first package body and is electrically connected to the circuit layer. The electronic component is disposed on the second surface of the circuit layer.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH
