Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.

Abstract: A semiconductor device package is provided, which includes a semiconductor device, a redistribution layer, an under bump metallurgy (UBM) structure, a passivation layer and a protection layer. The semiconductor device has an active surface. The redistribution layer is disposed on the active surface of the semiconductor device and electrically connected to the semiconductor device. The UBM structure is disposed on the redistribution layer. The passivation layer is disposed on the redistribution layer and surrounding the UBM structure and having a first surface. The protection layer is disposed on the redistribution layer and having a first surface. The first surface of the passivation layer is substantially coplanar with the first surface of the protection layer.

Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate.

Abstract: A semiconductor package device includes a circuit layer, a first set of stacked components, a first conductive wire, a space and an electronic component. The first set of stacked components is disposed on the circuit layer. The first conductive wire electrically connects the first set of stacked components. The space is defined between the first set of stacked components and the circuit layer. The space accommodates the first conductive wire. The electronic component is disposed in the space.

Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an adhesion layer and at least one outer via. The upper conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The adhesion layer is interposed between the upper conductive structure and the lower conductive structure to bond the upper conductive structure and the lower conductive structure together.

Abstract: A semiconductor device package includes a first semiconductor device having a first surface, an interconnection element having a surface substantially coplanar with the first surface of the first semiconductor device, a first encapsulant encapsulating the first semiconductor device and the interconnection element, and a second semiconductor device disposed on and across the first semiconductor device and the interconnection element.

Abstract: An acoustic device includes a first chamber, a first through hole, a vibration structure, and a separation structure. The first chamber includes a first end and a second end. The first through hole is defined at the first end of the first chamber. The vibration structure is disposed at the second end of the first chamber and is configured to transmit an acoustic wave away from the first chamber. The separation structure is disposed within the first chamber and divides the first chamber into a first sub-chamber and a second sub-chamber. The separation structure defines a second through hole connecting the first sub-chamber and the second sub-chamber.

Abstract: A semiconductor device package includes: (1) a conductive base comprising a sidewall, a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth; (2) a semiconductor die disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface, the second surface of the semiconductor die bonded to the bottom surface of the cavity; and (3) a first insulating material covering the sidewall of the conductive base and extending to a bottom surface of the conductive base.

Abstract: A semiconductor device package includes a metal carrier, a passive device, a conductive adhesive material, a dielectric layer and a conductive via. The metal carrier has a first conductive pad and a second conductive pad spaced apart from the first conductive pad. The first conductive pad and the second conductive pad define a space therebetween. The passive device is disposed on top surfaces of first conductive pad and the second conductive pad. The conductive adhesive material electrically connects a first conductive contact and a second conductive contact of the passive device to the first conductive pad and the second conductive pad respectively. The dielectric layer covers the metal carrier and the passive device and exposes a bottom surface of the first conductive pad and the second conductive pad. The conductive via extends within the dielectric layer and is electrically connected to the first conductive pad and/or the second conductive pad.

Abstract: A wiring structure includes an insulating layer and a conductive structure. The insulating layer has an upper surface and a lower surface opposite to the upper surface, and defines an opening extending through the insulating layer. The conductive structure is disposed in the opening of the insulating layer, and includes a first barrier layer and a wetting layer. The first barrier layer is disposed on a sidewall of the opening of the insulating layer, and defines a through hole extending through the first barrier layer. The wetting layer is disposed on the first barrier layer. A portion of the wetting layer is exposed from the through hole of the first barrier layer and the lower surface of the insulating layer to form a ball pad.

Abstract: A semiconductor package includes a semiconductor die, a plurality of conductive bumps, a shielding layer, an encapsulant and a redistribution layer. The semiconductor die has an active surface, a backside surface and a lateral surface. The conductive bumps are disposed on the active surface of the semiconductor die. The shielding layer is disposed on the lateral surface of the semiconductor die. The encapsulant covers the shielding layer, and has a first surface and a second surface opposite to the first surface. The redistribution layer is disposed on the first surface of the encapsulant and electrically connected to the semiconductor die through the conductive bumps. The shielding layer is electrically connected to the redistribution layer.

Abstract: A device package includes a first carrier, a lid and a chip. The first carrier includes a substrate having a first surface and a second surface opposite to the first surface. The substrate defines a through-hole extended from the first surface to the second surface. The through-hole includes a first opening proximal to the first surface, and a second opening proximal to the second surface. The first barrier dam is disposed on the first surface and surrounds the first opening of the through-hole. The second barrier dam is disposed on the second surface and surrounds the second opening of the through-hole. The lid is disposed on the first surface. The lid and the first carrier define a chamber. The chip is disposed on the first surface and in the chamber.

Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.

Abstract: A semiconductor package device includes a substrate, an electronic component, a ring frame, an encapsulant, a thermal conducting material and a lid. The electronic component is disposed on the substrate. The ring frame is disposed on the substrate and surrounds the electronic component. The encapsulant encapsulates the electronic component and a first portion of the ring frame. The encapsulant exposes a second portion of the ring frame. The encapsulant and the second portion of the ring frame define a space. The thermal conducting material is disposed in the space. The lid is disposed on the thermal conducting material and connects with the second portion of the ring frame.

Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.

Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, a metal support, a passive element, a plurality of signal vias, and a plurality of thermal structures. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The metal support is used for supporting the semiconductor die. The passive element is electrically connected to the semiconductor die. The signal vias are electrically connecting the passive element and the semiconductor die. The thermal structures are connected to the passive element, and the thermal structures are disposed on a periphery of the at least one wiring structure.

Abstract: An antenna package includes a patterned antenna structure and an encapsulant. The patterned antenna structure includes a first surface, a second surface opposite the first surface and a third surface extended between the first surface and the second surface. The encapsulant is disposed on the first surface of the patterned antenna structure. The third surface of the patterned antenna structure includes a first portion covered by the encapsulant and a second portion exposed from the encapsulant.

Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.

Abstract: A semiconductor package device includes a substrate having an upper surface; an antenna disposed on the upper surface of the substrate; a conductor disposed on the upper surface of the substrate and surrounding the antenna; and a package body covering the conductor and the upper surface of the substrate.

Abstract: A semiconductor device package includes a carrier; a sensor element disposed on or within the carrier; a cover disposed above the carrier and comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface; and a light transmissive element covering the penetrating hole, wherein the sensor element senses or detects light passing through the light transmissive element.