Patents Assigned to Advanced Semiconductor Engineering
  • SEMICONDUCTOR PACKAGE STRUCTURE, SEMICONDUCTOR WAFER LEVEL PACKAGE AND SEMICONDUCTOR MANUFACTURING PROCESS
    Publication number: 20200144143
    Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, an encapsulant and a plurality of conductive elements. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The encapsulant surrounds the semiconductor die. The encapsulant is formed from an encapsulating material, and a Young's Modulus of the encapsulant is from 0.001 GPa to 1 GPa. The conductive elements are embedded in the encapsulant, and are electrically connected to the at least one wiring structure.
    Type: Application
    Filed: November 1, 2018
    Publication date: May 7, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Dao-Long CHEN, Chih-Pin HUNG, Ming-Hung CHEN
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20200144185
    Abstract: A semiconductor device package includes a dielectric layer, a first conductive pattern and a first semiconductor device. The dielectric layer has a first surface, wherein a surface uniformity of the first surface is substantially equal to or less than 5%. The first conductive pattern is disposed on the first surface of the dielectric layer, wherein the first conductive pattern includes a first conductive trace, and a line width of the first conductive trace substantially ranges from about 0.5 ?m and about 2 ?m. The first semiconductor device is disposed on the first surface of the dielectric layer and electrically connected to the first conductive pattern.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 7, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200144168
    Abstract: A semiconductor packaging device includes a first patterned insulation layer, a patterned conductive layer, a semiconductor device and an encapsulant. The first patterned insulation layer has a first surface, a second surface opposite the first surface, and an island portion having the first surface. The first patterned insulation layer defines a tapered groove surrounding the island portion. The patterned conductive layer is disposed on the first surface of the island portion. The semiconductor device electrically connects to the patterned conductive layer. The encapsulant encapsulates the semiconductor device, the first patterned insulation layer and the patterned conductive layer.
    Type: Application
    Filed: November 6, 2018
    Publication date: May 7, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen-Long LU, Huang-Hsien CHANG
  • Wiring structure, electronic device and method for manufacturing the same
    Patent number: 10643937
    Abstract: A wiring structure includes an insulating layer and a conductive structure. The insulating layer has an upper surface and a lower surface opposite to the upper surface, and defines an opening extending through the insulating layer. The conductive structure is disposed in the opening of the insulating layer, and includes a first barrier layer and a wetting layer. The first barrier layer is disposed on a sidewall of the opening of the insulating layer, and defines a through hole extending through the first barrier layer. The wetting layer is disposed on the first barrier layer. A portion of the wetting layer is exposed from the through hole of the first barrier layer and the lower surface of the insulating layer to form a ball pad.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: May 5, 2020
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Hung Huang, Chien-Mei Huang, Yan Wen Chung
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200135604
    Abstract: A semiconductor package structure includes a patterned conductive layer with a front surface, a back surface, and a side surface connecting the front surface and the back surface. The semiconductor package structure further includes a first semiconductor chip on the front surface and electrically connected to the patterned conductive layer, a first encapsulant covering at least the back surface of the patterned conductive layer, and a second encapsulant covering at least the front surface of the patterned conductive layer, the side surface being covered by one of the first encapsulant and the second encapsulant.
    Type: Application
    Filed: October 29, 2018
    Publication date: April 30, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: You-Lung YEN
  • LOW FREQUENCY ELECTROMAGNETIC INTERFERENCE SHIELDING
    Publication number: 20200135657
    Abstract: A semiconductor package device includes a substrate, an insulation layer disposed on the substrate, and a shielding layer. The shielding layer includes an adhesive layer and a base layer. The adhesive layer is disposed between the base layer and the insulation layer. The adhesive layer and the base layer include a filler including at least a resin. The shielding layer passes a peeling test class of at least 3 B of a cross-cut method and the shielding effectiveness of the shielding layer is at least or equal to 30 dB.
    Type: Application
    Filed: October 31, 2018
    Publication date: April 30, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Pin Chuan WANG
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200135599
    Abstract: A semiconductor chip structure includes a substrate having a top surface, a bottom surface, and a lateral surface connecting the top surface and the bottom surface. The lateral surface includes a first portion having a first surface roughness and being in proximity to the top surface, and a second portion having a second surface roughness and being in proximity to the bottom surface. The first surface roughness is greater than the second surface roughness. A method for manufacturing the semiconductor chip structure is also provided.
    Type: Application
    Filed: October 24, 2018
    Publication date: April 30, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia Lun LIANG, Shang Ju LEE
  • SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200135675
    Abstract: A semiconductor package device includes a first conductive structure, a second conductive structure and a dielectric layer. The first conductive structure has a tapered portion. The second conductive structure surrounds the tapered portion of the first conductive structure and is in direct contact with a side wall of the tapered portion of the first conductive structure. The dielectric layer surrounds the tapered portion of the first conductive structure and is in direct contact with the side wall of the tapered portion of the first conductive structure.
    Type: Application
    Filed: October 25, 2018
    Publication date: April 30, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200127366
    Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure.
    Type: Application
    Filed: April 4, 2019
    Publication date: April 23, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Guo-Cheng LIAO, Yi Chuan DING
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200126881
    Abstract: A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.
    Type: Application
    Filed: October 3, 2019
    Publication date: April 23, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Guo-Cheng LIAO, Yi Chuan DING
  • SEMICONDUCTOR DEVICE PACKAGE, ELECTRONIC ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20200118912
    Abstract: A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.
    Type: Application
    Filed: January 31, 2019
    Publication date: April 16, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE, Chun Chen CHEN, Chen Yuang CHEN
  • CONDUCTIVE LID AND SEMICONDUCTOR DEVICE PACKAGE
    Publication number: 20200118905
    Abstract: A conductive lid includes a body including a first portion extended from the body and bent toward a first direction; a second portion extended from the body and bent toward the first direction; and a third portion extended from the second portion and bent toward a second direction different from the first direction.
    Type: Application
    Filed: October 10, 2018
    Publication date: April 16, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsin-En CHEN
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20200118968
    Abstract: A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.
    Type: Application
    Filed: December 10, 2019
    Publication date: April 16, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Ming HUNG, Meng-Jen WANG, Tsung-Yueh TSAI, Jen-Kai OU
  • WIRING STRUCTURE, SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20200118936
    Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.
    Type: Application
    Filed: October 16, 2018
    Publication date: April 16, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming Hsien CHU, Chi-Yu WANG
  • SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200118970
    Abstract: A semiconductor package device includes a transparent carrier, a first patterned conductive layer, a second patterned conductive layer, and a first insulation layer. The transparent carrier has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface of the transparent carrier. The first patterned conductive layer has a first surface coplanar with the third surface of the transparent carrier. The second patterned conductive layer is disposed on the first surface of the transparent carrier and electrically isolated from the first patterned conductive layer. The first insulation layer is disposed on the transparent carrier and covers the first patterned conductive layer.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Teck-Chong LEE
  • SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20200111761
    Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.
    Type: Application
    Filed: October 3, 2019
    Publication date: April 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: An-Nong WEN, Ching-Han HUANG, Ching-Ho CHANG
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200111752
    Abstract: A semiconductor package including a substrate having a surface, and a conductive element on the first surface and electrically coupled to the substrate. The conductive element has a principal axis forming an angle less than 90 degrees with the surface.
    Type: Application
    Filed: October 8, 2018
    Publication date: April 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Jenchun CHEN
  • SEMICONDUCTOR DEVICE PACKAGES AND STACKED PACKAGE ASSEMBLIES INCLUDING HIGH DENSITY INTERCONNECTIONS
    Publication number: 20200111671
    Abstract: A semiconductor device package includes: a redistribution stack including a dielectric layer defining a first opening; and a redistribution layer (RDL) disposed over the dielectric layer and including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending from the first portion of the first trace, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, the first opening in the dielectric layer has a maximum width along the first transverse direction, and the maximum width of the second portion of the first trace is less than the maximum width of the first opening.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: John Richard HUNT, William T. Chen, Chih-Pin HUNG, Chen-Chao WANG
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200111760
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.
    Type: Application
    Filed: September 25, 2019
    Publication date: April 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Che HUANG, Ching-Han HUANG, An-Nong WEN, Po-Ming HUANG
  • SEMICONDUCTOR PACKAGE STRUCTURE AND ASSEMBLY STRUCTURE
    Publication number: 20200111728
    Abstract: A semiconductor package structure includes a vapor chamber, a plurality of electrical contacts, a semiconductor die and an encapsulant. The vapor chamber defines an enclosed chamber for accommodating a working liquid. The electrical contacts surround the vapor chamber. The semiconductor die is disposed on the vapor chamber, and electrically connected to the electrical contacts through a plurality of bonding wires. The encapsulant covers a portion of the vapor chamber, portions of the electrical contacts, the semiconductor die and the bonding wires.
    Type: Application
    Filed: September 23, 2019
    Publication date: April 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-En CHEN, Ian HU, Hung-Hsien HUANG