Patents Assigned to Advantest
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Patent number: 9584114Abstract: A semiconductor switch is configured to conduct or cutoff a signal path from its first terminal to its second terminal. An enhancement-type first transistor is arranged between the first terminal and the second terminal. A first bias circuit is connected to apply a gate voltage VG that corresponds to a control signal VCNT to the gate of the first transistor when the power supply voltages VDD and VSS are supplied. A second bias circuit is connected such that a voltage that corresponds to the lower voltage of the voltages at the first terminal and the second terminal is applied to the gate of the first transistor when the power supply voltages VDD and VSS are not supplied.Type: GrantFiled: June 3, 2015Date of Patent: February 28, 2017Assignee: ADVANTEST CORPORATIONInventors: Yoshiyuki Hata, Taku Sato, Masahiko Takikawa
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Patent number: 9583854Abstract: To provide a connector wherein ground terminals can be designed easily, which not only suppresses the occurrence of impedance mismatch and crosstalk, but which does not lead to interferences between contacting portions. A ground terminal for a connector has a cylindrical main body. A plurality of contacting portions, for contacting a circuit board, are formed on the bottom edge of the cylindrical main body. The ground terminal has, as contacting portions, inner contacting portions and outer contacting portions. The inner contacting portions extend toward the inside of the cylindrical main body and in the downward direction, and the outer contacting portions extend toward the inside of the cylindrical main body and in the downward direction.Type: GrantFiled: May 11, 2011Date of Patent: February 28, 2017Assignees: Molex Japan Co., Ltd., Advantest CorporationInventors: Ryo Uesaka, Jun Watanabe, Akinori Mizumura, Hirotaka Wagata
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Patent number: 9575726Abstract: A bit sequence generator for generating a bit sequence defined by a generating function and an initial state of the generating function comprising a plurality of state machines and a multiplexer. Each state machine of the plurality of state machines generates a time-interleaved bit sequence, wherein a state machine generates a bit of the time-interleaved bit sequence for a current time step based on at least one bit generated by the state machine for a preceding time step, the generating function of the bit sequence to be generated, and the initial state of the generating function and independent from a time-interleaved bit sequence generated by another state machine of the plurality of state machines. Further, a multiplexer selects successively one bit from each generated time-interleaved bit sequence in a repetitive manner to obtain the bit sequence defined by the generating function and the initial state of the generating function.Type: GrantFiled: August 3, 2010Date of Patent: February 21, 2017Assignee: Advantest CorporationInventor: Jochen Rivoir
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Patent number: 9575117Abstract: Testing stacked devices. In accordance with a first method embodiment, a primary circuit assembly is accessed from a first circuit assembly carrier. The primary circuit assembly is placed into a test fixture. A secondary circuit assembly is accessed from a second circuit assembly carrier. The secondary circuit assembly is placed into the test fixture on top of the primary circuit assembly. The primary circuit assembly is tested in conjunction with said secondary circuit assembly while coupled together.Type: GrantFiled: April 18, 2013Date of Patent: February 21, 2017Assignee: ADVANTEST CORPORATIONInventors: Ling Qi, Tung Sheng Hsieh
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Patent number: 9568498Abstract: A printed circuit board has first terminals for contacting terminals of a socket, second terminals for contacting terminals of a test fixture of an automatic test equipment, which are adapted for contacting the terminals of the socket of a device under test, transmission lines for connecting the first terminals and the terminals, and an extracting circuit electrically coupled to one of the transmission lines and configured to extract the signal being exchanged between the device under test and the automatic test equipment. The extracting circuit has a resistor or an electrical resistor network, wherein a loss added on the signal being exchanged between the device under test and the automatic test equipment over the one transmission line due to the presence of the printed circuit board is smaller than 6 dB.Type: GrantFiled: May 1, 2014Date of Patent: February 14, 2017Assignee: Advantest CorporationInventors: Jose Antonio Alves Moreira, Marc Moessinger
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Patent number: 9568422Abstract: Provided is a light beam incident device including an off-axis parabolic mirror that receives parallel light beams and converges the parallel light beams at one point on an object to be measured, and an incident-side light reception surface of a mirror that feeds the parallel light beams to the off-axis parabolic mirror. An angle (incident angle) between the object to be measured and converged light beams obtained by converging the parallel light beams changes in accordance with a light reception portion at which the off-axis parabolic mirror receives the parallel light beams. The incident side light reception surface of the mirror can change the light reception portion by moving with respect to the off-axis parabolic mirror.Type: GrantFiled: March 4, 2013Date of Patent: February 14, 2017Assignee: ADVANTEST CORPORATIONInventors: Tomoyu Yamashita, Akiyoshi Irisawa
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Patent number: 9563527Abstract: A server stores multiple configuration data which respectively provide different functions to a test system. A tester hardware is configured to be capable of changing at least a part of its functions according to the configuration data stored in nonvolatile memory included in the tester hardware. A control program is installed on an information processing apparatus. The control program provides the information processing apparatus with (i) a function of displaying multiple configuration data candidates on a display when the test system is set up, and (ii) a function of writing the configuration data selected by the user to the nonvolatile memory of the tester hardware.Type: GrantFiled: June 3, 2014Date of Patent: February 7, 2017Assignee: ADVANTEST CORPORATIONInventor: Tomoyuki Yamane
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Patent number: 9557372Abstract: In one embodiment, an automated test equipment (ATE) system includes a tester having a tester electronics module, an application specific electronics module, and a tester-to-device under test (DUT) interface mount. The tester electronics module has a first electronics interface configured to electrically connect to a tester-to-DUT interface when the tester-to-DUT interface is coupled to the tester-to-DUT interface mount. The application specific electronics module has a second electronics interface and a third electronics interface. The second and third electronics interfaces are configured to electrically connect to the tester-to-DUT interface when the tester-to-DUT interface is coupled to the tester-to-DUT interface mount. The application specific electronics module is configured to communicate with the tester electronics module via the second electronics interface, and with at least one DUT via the third electronics interface.Type: GrantFiled: October 29, 2010Date of Patent: January 31, 2017Assignee: ADVANTEST CORPORATIONInventors: Edmundo De La Puente, Ken Hanh Duc Lai
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Patent number: 9558852Abstract: System and method of selecting defective columns in NAND memory devices for repair. After locating the defective blocks and defective columns in a NAND memory device, a weight value is calculated for each defective block by dividing a total number of defective blocks that would be inherently repaired as a result of repairing the respective defective block by a number of defective data columns in the respective defective block. A defective block with the greatest weight value is selected for repair in which the defective columns in the selected block are substituted by redundant columns. Other defective blocks with defective columns having the same column addresses with the defective columns in the selected defective block are automatically selected for repair as well. Remaining defective columns are selected for repair by iteratively updating weight values and selecting a defective block that has the greatest weight value among the remaining defective blocks.Type: GrantFiled: April 15, 2015Date of Patent: January 31, 2017Assignee: Advantest CorporationInventors: Xinguo Zhang, Ze'ev Raz, Yang Liu
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Patent number: 9554291Abstract: Systems and methods of generating an RF stimulus signal with different power levels for IC testing. A DC modulating signal is used to power modulate a radio frequency (RF) carrier signal and thereby generate an RF stimulus signal at varying power levels. The DC modulating signal includes a sequence of DC waveforms at different voltage levels. A DC voltage transition in the modulating signal instantaneously triggers the transition of an output power in the RF stimulus signal. Reference waveforms that can cause a known response pattern in a DUT may be added at the beginning of the modulating signal for data calibration purposes.Type: GrantFiled: February 4, 2015Date of Patent: January 24, 2017Assignee: Advantest CorporationInventor: Jason Smith
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Patent number: 9551693Abstract: A photoacoustic wave measurement device includes: (a) a pulsed-light outputter that outputs a pulsed light; (b) an arrangement member disposed between a pulsed-light output end of the pulsed-light outputter and a measurement object, the arrangement member being adapted to allow the pulsed light to pass therethrough; and (c) a photoacoustic wave detector that receives a photoacoustic wave generated by the measurement object by the pulsed light and that converts the photoacoustic wave into an electric signal, the photoacoustic wave measurement device being adapted to receive the electric signal from a photoacoustic wave sensor in which the photoacoustic wave detector is farther from the measurement object than the pulsed-light output end.Type: GrantFiled: May 2, 2013Date of Patent: January 24, 2017Assignee: ADVANTEST CORPORATIONInventors: Taiichiro Ida, Yasushi Kawaguchi
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Patent number: 9537384Abstract: To provide a power supply noise reduction circuit and a power supply noise reduction method that do not require circuit elements to be increased in size and do not cause voltage drop in a power supply voltage. A power supply noise reduction circuit 10 that reduces noise included in a constant voltage output that is output from a power supply 2 to a load includes a first resistor 20 that is inserted into a power supply line L1 extending from the power supply 2 to the load, a filter 31 that is coupled to a load terminal of the first resistor 20 and outputs a first voltage that is obtained by reducing the noise from the constant voltage output, and a unity gain amplifier 32 that drives the first voltage output from the filter 31 and outputs the driven first voltage to the load terminal of the first resistor 20.Type: GrantFiled: November 12, 2010Date of Patent: January 3, 2017Assignee: ADVANTEST CORPORATIONInventor: Toshiyuki Sato
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Patent number: 9535112Abstract: Increase in number of valves complicates the configuration and control. A temperature control apparatus for controlling a temperature of a device, includes; a heat exchange section exchanging heat with the device; a main flow path causing a fluid to flow; a sub flow path causing, to flow, a fluid having a temperature different from a temperature of the fluid flowing through the main flow path; a mixture flow path merging the fluids from the main flow path and the sub flow path and causing the merged fluids to flow to the heat exchange section; and a flow rate adjusting section adjusting an amount of a fluid flowing from the sub flow path to the mixture flow path, in relation to the fluid flowing through the main flow path.Type: GrantFiled: August 29, 2014Date of Patent: January 3, 2017Assignee: ADVANTEST CORPORATIONInventors: Hirotaka Sasaki, Tsuyoshi Yamashita, Noboru Masuda
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Patent number: 9506948Abstract: A fixture unit assuredly fits a fixed unit including a gap portion including a first wall surface and a second wall surface opposing each other. Provided are a fixture unit and a fixture apparatus including a fitting pin fitting a gap portion of a fixed unit, the gap portion including a first wall surface and a second wall surface opposing each other, where the fitting pin includes: a fixed pin inserted to the gap portion to contact the first wall surface; a moving pin inserted to the gap portion to be pressed on the second wall surface; and a base to which the fixed pin is fixed, and the moving pin includes a bottom portion in an arc form with a center being a central axis of movement, and the bottom portion fitting slidably with respect to a concave portion provided for the base.Type: GrantFiled: August 29, 2014Date of Patent: November 29, 2016Assignee: ADVANTEST CORPORATIONInventors: Yuya Yamada, Mitsunori Aizawa
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Patent number: 9495266Abstract: System and method of systems and methods of controlling an IC test equipment in response to verbal commands issued by test equipment users. A control apparatus according to the present disclosure includes a speech detection device operable to detect verbal commands and test control software configured to control operations of the test equipment. The control software is added with verbal command recognition capabilities. Program action commands defined in the test control software are associated with respective recognizable verbal commands. Upon a recognizable verbal command is detected, it is interpreted into the corresponding program action command which triggers the intended test program actions. The control apparatus may also have a gesture detection device, through which user gesture commands can be detected and interpreted into corresponding program actions commands.Type: GrantFiled: May 15, 2014Date of Patent: November 15, 2016Assignee: ADVANTEST CORPORATIONInventors: Keith Schaub, Hui Yu, Minh Diep
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Patent number: 9494671Abstract: A method of error correction in automated test equipment (ATE) is presented. The method comprises calibrating the ATE using a calibration board, wherein the calibration board comprises a reference voltage. The calibrating comprises: (a) measuring the reference voltage using a reference channel and each of a plurality of channels in the ATE; (b) recording a series of differential voltage measurement values obtained from the measuring in a calibration module; and (c) calculating a respective correction factor for each of the plurality of channels utilizing the series of differential voltage measurement values. The method further comprises obtaining a measured voltage value for a DUT connected to a first channel in the ATE, wherein the first channel is one of the plurality of channels. Finally, the method comprises correcting the measured voltage value using a respective correction factor for said first channel.Type: GrantFiled: November 8, 2013Date of Patent: November 15, 2016Assignee: ADVANTEST CORPORATIONInventor: Thien Ngo
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Patent number: 9484116Abstract: At least one general-purpose server is connected to a PE module via Ethernet (trademark). A control unit of the PE module controls a PE circuit and multiple fail memory in a real-time manner, temporarily stores fail information stored in the multiple fail memory, performs data processing on the fail information, and transfers the fail information thus processed to the general-purpose server. Each general-purpose server is controlled according to a computer program so as to perform redundancy analysis for a DUT based on the data received from the PE module.Type: GrantFiled: August 17, 2015Date of Patent: November 1, 2016Assignee: ADVANTEST CORPORATIONInventors: Masaaki Kosugi, Takashi Ohguro, Michisuke Sakamoto, Toshiro Fujii, Takahiro Honma, Hideto Omori
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Patent number: 9478396Abstract: Provided is a charged particle beam exposure apparatus configured as follows. An electron beam emitted from an electron gun is deformed by an asymmetric illumination optical system to have an elongated section. The electron beam is then applied to a beam shaping aperture plate provided with a plurality of apertures arranged in a line, thereby generating a plurality of electron beams. Exposure of a predetermined pattern is performed on a semiconductor substrate by moving a stage device in a direction orthogonal to line patterns on the semiconductor substrate and turning the plurality of electron beams on or off in synchronization with the movement of the stage device by use of a blanker plate and a final aperture plate.Type: GrantFiled: December 5, 2014Date of Patent: October 25, 2016Assignee: Advantest Corp.Inventors: Shinichi Hamaguchi, Masaki Kurokawa, Shinji Sugatani, Akio Yamada
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Patent number: 9478313Abstract: System and method for implementing a memory test language compiler. The compiler includes a fast semantic processor for interpreting programming patterns in a test program, including converting stateful patterns into stateless patterns, and a device access timing generation module for generating an output based on the stateless patterns. The fast semantic processor can generate a closure for a device access line as the output. In the state of the closure, each device access line is in a closed state. A functor is formed from the interdependency of the variables and the loop dependency and a cache is used to handle recursive variables. The functor is propagated to device access lines as output, wherein the functor references the cache when needed.Type: GrantFiled: July 16, 2014Date of Patent: October 25, 2016Assignee: ADVANTEST CORPORATIONInventors: Huachun Cui, Kazi Iftekhar Ahmed
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Patent number: 9466540Abstract: Provided is a detection apparatus that detects process variation in a plurality of comparators that each output a comparison result obtained by comparing a signal level of an input signal to a reference level, the detection apparatus comprising a signal input section that inputs the input signal and the reference level in common to the comparators, and sequentially changes the signal level of the input signal; and a detecting section that detects, for each signal level, a number of comparison results that indicate a predetermined result, from among the comparison results of the comparators, and detects the process variation based on a distribution of the number of comparison results that indicate the predetermined result.Type: GrantFiled: January 29, 2013Date of Patent: October 11, 2016Assignees: ADVANTEST CORPORATION, THE UNIVERSITY OF TOKYOInventors: Takahiro Yamaguchi, Satoshi Komatsu, Kunihiro Asada, James Sumit Tandon