Patents Assigned to Agere Systems
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Patent number: 7813694Abstract: A secondary satellite radio or broadcast channel is used to broadcast advertisement clips (e.g., audio clips) to a receiver for subsequent decoding and playback. The receiver is configured for different tiers of service, e.g., one that delivers substantially advertising-free content and another that delivers content that includes more significant amounts of advertising. The content delivered to both is the same content; however, for the service tier that includes more advertising, the advertisements broadcast on the secondary channel are interleaved into the content, preferably in such a way that the continuity of the content being delivered is not compromised.Type: GrantFiled: February 27, 2008Date of Patent: October 12, 2010Assignee: Agere Systems Inc.Inventors: David A Fishman, Raymond K Jones, Eric Zhong
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Patent number: 7813065Abstract: Various embodiments of the present invention provide systems and methods for performing modified rate burst demodulation. For example, a method for performing modified rate burst demodulation is disclosed. The method includes receiving a data input that includes a synchronization pattern, an information pattern, and a demodulation pattern. A periodic boundary is established along with a phase and frequency of a sampling clock based at least in part on the synchronization pattern. The information pattern is processed using the sampling clock to determine a location fix. The sampling clock is phase shifted by a skew amount and a phase shifted sampling clock is provided. The demodulation pattern is processed using the phase shifted sampling clock.Type: GrantFiled: April 29, 2008Date of Patent: October 12, 2010Assignee: Agere Systems Inc.Inventors: Viswanath Annampedu, Venkatram Muddhasani, Xun Zhang
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Patent number: 7813422Abstract: In one embodiment, a receiver has an equalizer, a tap-averaging block, a delay buffer, and a filter. The equalizer receives an input signal from upstream processing and generates sets of filter coefficients. Each set of filter coefficients is adaptively generated by 1) filtering the received signal to generate an equalized signal, 2) calculating an error of the equalized signal, and 3) generating a new set of coefficients based on the error of the equalized signal. The sets of filter coefficients are output to the tap-averaging block, which averages groups of the sets of filter coefficients to generate sets of averaged filter coefficients, where each averaged set is output to the filter. The filter receives a time-delayed version of the input signal from the delay buffer and applies the current set of averaged filter coefficients to the time-delayed signal. The filtered signal is then output to downstream processing.Type: GrantFiled: February 23, 2007Date of Patent: October 12, 2010Assignee: Agere Systems Inc.Inventors: Matthew E. Cooke, Adriel P. Kind, Long Ung
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Patent number: 7813285Abstract: A method is disclosed for controlling the flow of packets aggregated from multiple logical ports over a transport link. A directed flow control indicator is provided to the transmitting end station that causes a detected congestion condition. The directed flow control indicator causes the transmitting end station to suspend the transmission of further packets. The linear expansion header of the Generic Framing Procedure (GFP) linear mapping scheme is extended to include the flow control indicator, such as a bit indicating a potential overload condition. A directed flow control indication can be provided in one or more packets sent to the transmitting end station over the transport network without increasing the network overhead. If packets are not being sent to the appropriate transmitting end station, a packet generator can generate one or more packets with the flow control indicator to inform the appropriate transmitting end station of the congestion condition.Type: GrantFiled: August 1, 2008Date of Patent: October 12, 2010Assignee: Agere Systems Inc.Inventors: Mark A. Bordogna, Sundararajan Cidambara, Adam B. Healey
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Patent number: 7809343Abstract: An improved multi-channel receiver for satellite broadcast applications or the like. In an exemplary embodiment, an AGC loop, under the control of an AGC processor, controls the gain of an analog sub-receiver adapted to simultaneously receive multiple signals to achieve a desired AGC setpoint signal intensity from the sub-receiver. Multiple digital demodulators, coupled to the sub-receiver by an analog-to-digital converter (ADC), demodulate the multiple received signals. The AGC controller, based upon which of the received signals are being demodulated, selects the desired AGC setpoint from a table of setpoints. The AGC controller may also provide selective power control to circuitry in the receiver and select the resolution of the ADC. The controller updates the AGC loop with step values selected from a group of values by an AGC control algorithm. Different groups of step values may be used by the controller depending on whether the signals are fading or not.Type: GrantFiled: April 25, 2007Date of Patent: October 5, 2010Assignee: Agere Systems Inc.Inventors: Yhean-Sen Lai, Jie Song, Zhenyu Wang, Jinguo Yu
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Patent number: 7809046Abstract: In one embodiment, a timing-offset estimator calculates a correlation value for each sample of an OFDM signal having a cyclic prefix for each OFDM symbol. The correlation value is provided to a tapped delay line that applies a separate weight to each of 2V correlation values, where V is the length of the cyclic prefix and the weights are based on a triangular weighting scheme that increases linearly from the first value, peaks at the Vth value, and decreases linearly to the 2Vth value. A stream of combined, squared correlation values is generated by combining and squaring the 2V weighted correlation values for each sample of the OFDM signal. For each cyclic prefix of the OFDM signal, a timing-offset estimate is determined based on a detected peak value in the stream of combined, squared correlation values. A timing-offset estimator with triangular weighting scheme may be implemented using recursive processing.Type: GrantFiled: October 3, 2007Date of Patent: October 5, 2010Assignee: Agere Systems Inc.Inventors: Syed Mujtaba, Xiaowen Wang
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Patent number: 7808068Abstract: Embodiments of the invention include a temperature sensor method for providing an output voltage response that is linear to the temperature of the integrated circuit to which the temperature sensor belongs and/or the integrated circuit die on which the temperature sensor resides. The output voltage of the temperature sensor has an adjustable gain component and an adjustable voltage offset component that both are adjustable independently based on circuit parameters. The inventive temperature sensor includes an offset circuit that diverts a portion of current from the scaled PTAT current before the current is sourced through the output resistor. The offset circuit includes a bandgap circuit arrangement, a voltage to current converter arrangement, and a current mirror arrangement that are configured to provide a voltage offset adjustable based on independent circuit parameters such as resistor value ratios and transistor device scaling ratios.Type: GrantFiled: September 11, 2008Date of Patent: October 5, 2010Assignee: Agere Systems Inc.Inventor: Paul Hartley
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Patent number: 7808991Abstract: An apparatus for transporting data in a network-based data communication system includes a first network node comprising a first port couplable to at least a second network node for transferring data in a first format between the first and second network nodes. The first network node further includes a processor operatively coupled to the first port, the processor being configurable to receive one or more frames of data and/or transmit one or more frames of data, the frames of data having an overhead processing portion that is otherwise standard. The processor uses only a subset of the overhead processing portion and is configured such that utilizing only the subset of the overhead processing portion of the one or more data frames enables one or more functional blocks to be eliminated from the first network node, the one or more functional blocks being otherwise required for implementing substantially all of the overhead processing portion of the one or more data frames.Type: GrantFiled: July 30, 2004Date of Patent: October 5, 2010Assignee: Agere Systems Inc.Inventors: Seong-Hwan Kim, James Mark Sepko, John Sotir
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Patent number: 7808329Abstract: Methods and apparatus are provided for improved phase linearity in a multi-phase based clock/timing recovery system. Averaging and interpolation techniques improve phase linearity in a multi-phase clock system. A multi-phase output clock is generated in accordance with one aspect of the invention by generating a plurality of clocks each having a substantially similar frequency and a different phase; applying each of the plurality of clocks to at least one corresponding amplifier such as a differential pair circuit; and summing an output of the corresponding amplifiers to generate the multi-phase output clock. A multiple-stage averaging operation can provide further linearity improvements.Type: GrantFiled: August 7, 2008Date of Patent: October 5, 2010Assignee: Agere Systems Inc.Inventors: Kameran Azadet, Fuji Yang
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Patent number: 7804869Abstract: A semiconductor device comprises an n-side waveguide layer, an active layer in contact with the n-side waveguide layer and a p-side waveguide layer in contact with the active layer. An electron blocking layer is in contact with the p-side waveguide layer and comprises a first composition of two elements from group III of the periodic table and an element from group V of the periodic table. A cladding layer includes a cladding sublayer that is in contact with the electron blocking layer. The cladding sublayer comprises a second composition of two elements from group III of the periodic table and an element from group V of the periodic table. The second composition is different from the first composition.Type: GrantFiled: May 22, 2006Date of Patent: September 28, 2010Assignee: Agere Systems Inc.Inventor: Joseph Michael Freund
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Patent number: 7805313Abstract: For a multi-channel audio signal, parametric coding is applied to different subsets of audio input channels for different frequency regions. For example, for a 5.1 surround sound signal having five regular channels and one low-frequency (LFE) channel, binaural cue coding (BCC) can be applied to all six audio channels for sub-bands at or below a specified cut-off frequency, but to only five audio channels (excluding the LFE channel) for sub-bands above the cut-off frequency. Such frequency-based coding of channels can reduce the encoding and decoding processing loads and/or size of the encoded audio bitstream relative to parametric coding techniques that are applied to all input channels over the entire frequency range.Type: GrantFiled: April 20, 2004Date of Patent: September 28, 2010Assignee: Agere Systems Inc.Inventors: Christof Faller, Juergen Herre
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Patent number: 7804888Abstract: A back-up solution is presented for a DSL modem that guarantees essentially uninterrupted data connections in the event of a failure in the DSL connection. When a DSL data connection fails, e.g., due to changes of the local loop characteristics in the high frequency band, a voice-band modem is used in conjunction with an amplitude modulator/demodulator to keep the data connection uninterrupted by shifting the voice-band modem signal up to DSL frequencies, transmitting the data at this higher frequency over the local loop between the subscriber and a DSLAM, and then shifting the voice-band modem signal back to a “normal” frequency and demodulating this signal using the voice-band modem before it enters the data network. Since the frequency band used is at a frequency higher than that of voice communications, the subscriber can continue to use the local loop to conduct voice communications or any other communications that require use of the voice band frequencies, such as facsimile and V.Type: GrantFiled: August 4, 2005Date of Patent: September 28, 2010Assignee: Agere Systems Inc.Inventor: Jinguo Yu
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Patent number: 7804291Abstract: A semiconductor test device includes a test circuit having contacts for applying an electrical signal and measuring electrical parameters of the test circuit. The semiconductor test device also includes an integrally formed heating circuit comprising at least one circuit meander positioned adjacent the test circuit for raising a temperature within a portion of the test circuit.Type: GrantFiled: February 12, 2007Date of Patent: September 28, 2010Assignee: Agere Systems Inc.Inventors: Seung H. Kang, Lisa E. Mullin, Subramanian Karthikeyan, Sailesh M. Merchant
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Patent number: 7801063Abstract: A method and apparatus are disclosed for reducing a transmission rate for retransmission of a current frame in a wireless communication system. The reduced transmission rate increases the probability that the current frame is correctly transmitted and acknowledged. The transmission rate is progressively reduced for the current frame to avoid the expiration of the frame's retry count, while not affecting the transmission rate of subsequent frames. The next frame should be transmitted at the highest rate permitted by the signal quality. A disclosed retry count expiry avoidance algorithm increases the reliability of a retransmission by lowering the transmission rate for the current frame when an acknowledgement is not received. When an acknowledgement is not received, the transmitting station proceeds to a retransmitting state where the transmitting station first attempts to retransmit the frame at the same rate.Type: GrantFiled: September 25, 2003Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventors: Gerrit Willem Hiddink, Leo Monteban
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Patent number: 7801164Abstract: Improved timeout table mechanism are disclosed. By way of example, a method for providing timeout delays for data queues in a processing system includes the following steps. A timeout structure is maintained. The timeout structure includes two or more groups, each group including two or more bins, each bin having a range of timeout delay values associated therewith, each group having a weight associated therewith, the weight of each group being based on a rate and a quantity of queues assignable to each group. A timeout delay value to be assigned to a data queue in the processing system is selected.Type: GrantFiled: April 27, 2006Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventors: Christopher Koob, Ali A. Poursepanj, David P. Sonnier
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Patent number: 7801200Abstract: Various systems and methods for code dependency reduction are disclosed herein. For example, one method includes receiving an un-encoded data set that is represented as an array of columns and rows. In addition, two groups of data bits traversing the un-encoded data set at respective angles are formed. Based at least in part on the aforementioned groups of data sets, an angle at which a third group of data bits will traverse the un-encoded data set is identified, and a third group of data bits traversing the un-encoded data set at the third angle is formed.Type: GrantFiled: July 31, 2006Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventor: Weijun Tan
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Patent number: 7802245Abstract: Improved techniques are disclosed for performing an in-service upgrade of software associated with a network or packet processor. By way of example, a method of performing an in-service upgrade of code, storable in a memory associated with a packet processor and executable on the packet processor, from a first code version to a second code version, includes the following steps. A first step includes preparing for the upgrade by generating one or more write operations to effectuate the code upgrade from the first code version to the second code version. A second step includes updating the code from the first code version to the second code version by propagating the one or more write operations to the packet processor. A third step includes cleaning up after the updating step by reclaiming one or more memory locations available after the update step. As such, the storage of only a single version of the code in the memory associated with the packet processor is required.Type: GrantFiled: April 27, 2006Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventors: David P. Sonnier, Narender Reddy Vangati
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Patent number: 7800226Abstract: A method for forming a metal silicide region in a silicon region of a semiconductor substrate. The method comprises forming a metal layer over the silicon region, then in succession forming a titanium and a titanium nitride layer thereover. As the substrate is heated to form the silicide, the titanium getters silicon dioxide on the surface of the silicon region and the titanium nitride promotes the formation of a smooth surface at the interface between the silicide layer and the underlying silicon region.Type: GrantFiled: June 22, 2007Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventors: Yuanning Chen, Maxwell Walthour Lippitt, III, William M. Moller
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Patent number: 7801144Abstract: A network processor comprises an input interface, an output interface, a switch coupled between the input and output interfaces, and a plurality of processing elements coupled to respective bidirectional ports of the switch. Such processing elements include, in an illustrative embodiment, a scheduler, a security engine, a classification engine, a stream editor, etc. Information associated with a given packet received via the input interface is sequentially processed through multiple ones of the processing elements in a serial processing order based on switching operations of the switch. In the illustrative embodiment, the switch can permit any desired interconnection of the various processing elements so as to achieve a particular packet processing flow appropriate for a given application.Type: GrantFiled: March 31, 2006Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventor: Paul Allen Langner
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Patent number: 7800879Abstract: Embodiments of the invention provide methods and apparatus for managing temperature in integrated circuits. In accordance with an aspect of the invention, an integrated circuit comprises a monitored region defined by three or more edges. What is more, the integrated circuit comprises at least two temperature sensors for each of the three or more edges. The temperature sensors are arranged along the three or more edges such that each edge has substantially the same arrangement of temperature sensors. Thermal management of the integrated circuit may be accomplished by modifying functional aspects of the integrated circuit in response to measurements provided by the temperature sensors.Type: GrantFiled: July 27, 2006Date of Patent: September 21, 2010Assignee: Agere Systems Inc.Inventor: Vivian Ryan