Abstract: An auto-nulled bandgap reference system employing a substrate bandgap reference circuit with primary and auxiliary amplifiers and a switching circuit which in a first mode develops a voltage to null the offset and noise errors of the auxiliary amplifier and then in the second mode uses the nulled auxiliary amplifier to develop a voltage to null the offset and noise errors of the primary amplifier; and a strobe circuit including an output storage device and a strobe control circuit for periodically powering up a bandgap reference circuit to charge the output storage device and powering down the bandgap reference circuit to conserve power.

Abstract: A system and method is provided for code independent switching in a digital-to-analog converter (DAC). A synchronous digital circuit is triggered by a synchronizing clocking signal and develops a digital data signal. A circuit arrangement provides the synchronizing clock a constant load at every clocking cycle, thereby assuring a data independent load. By providing a data independent load to the synchronizing clock at every clocking cycle, third harmonic distortion is advantageously reduced.

Abstract: Methods and devices for calculating the position of a movable device are disclosed. The device may include multiple optical detectors (ODs) and the movable device may include light sources. Optics may be above the ODs. A controller may calculate the position of the light source based on data from the ODs and properties of the optics. The device may be a game console, and the light source may be a game controller. The roles of the OD and light sources may be interchanged. The rotation of the movable device may be determined using multiple light sources and/or multiple ODs on the movable device. The movable device may calculate its position and transmit it to a console. The light sources may be modulated by time or frequency to distinguish between the light sources. There may be two or more movable devices. There may be two or more consoles.

Abstract: An output switch driving capability booster which may effectively reduce a propagation delay in an output switch with an independently controllable output transition change rate. A delay controller coupled to the output switch may be used to control the propagation delay. The delay controller may have a switch which may be switched on and off approximately simultaneously with the output switch, and a resistance device which may be adjusted to reduce the propagation delay.

Abstract: Methods and devices for calculating the position of a movable device are disclosed. A console and movable device may include light detector(s) and light sources. A light source of the console may emit light that is detected by light detector(s) of the movable device. The moveable device may respond by emitting light synchronous with the received light. The console may calculate the position of the movable device by calculating the time for the light emitted from the movable device to strike the light detector(s) of the console. The rotation of the movable device may be calculated using multiple light sources and/or multiple light detector(s). The movable device may calculate its position and transmit it to a console. Multiple light sources may be distinguished using encoding or modulation of time and/or frequency. The roles of the light detectors(s) and light sources may be switched.

Abstract: A high-definition multimedia interface circuit uses a high-definition multimedia interface encoder to produce a plurality of channels of data. An output circuit, connected to the high-definition multimedia interface encoder, produces a plurality of channels of high frequency data from the data produced by the high-definition multimedia interface encoder. A multiplexer selects a channel for sampling, and a capacitive coupler capacitively couples the multiplexer to a sampling circuit. The sampling circuit produces sampled data corresponding to the high frequency data having a clock rate less than a clock rate of the high frequency data. A test circuit compares the sampled data with the data produced by the high-definition multimedia interface encoder.

Abstract: The intercept of a logarithmic amplifier is temperature stabilized by generating a signal having the form H log H where H is a function of temperature such as T/T0. The first H factor is cancelled, thereby generating a correction signal having the form Y log H. The cancellation may be implemented with a transconductance cell having a hyperbolic tangent function. The H log H function may be generated by a pair of junctions biased by one temperature-stable current and one temperature-dependent current. The pair of junctions and the transconductance cell may be coupled together in a translinear loop. A user-accessible terminal may allow adjustment of the correction signal for different operating frequencies.

Abstract: An SAR ADC provides increased immunity to noise introduced by time varying noise components provided on reference potentials (VREF). Reference voltage noise contributions are canceled by introducing a reference voltage component to a pair of binary weighted capacitor arrays (NDAC and PDAC) during bit trials, which are presented to a differential comparator as a common mode signal and rejected. During sampling, select elements in either the PDAC or the NDAC also obtain a reference voltage contribution. Although the sampled VREF signal may have a noise contribution, the noise is fixed at the time of bit trials, which can improve performance. Generally, the scheme provides a 50% reduction in noise errors over the prior art for the same VREF noise. Additional embodiments described herein can reduce noise errors to 25% or even 12.5% over prior art systems.

Abstract: In one embodiment, a configurable timing generator outputs at least one timing signal. The configurable timing generator comprises a first timing generator configurable to output the at least one timing signal so that the at least one timing signal is adaptable to a plurality of applications. In one embodiment, a configurable parameter storage unit comprising a parameter storage area configurable so as to store a plurality of parameters at least partially defining a desired plurality of waveform hierarchy elements, where the desired plurality of waveform hierarchy elements enable the definition of a waveform. In one embodiment, a method of constructing a waveform for a configurable timing generator, the method comprising acts of constructing a first pattern waveform, where the first pattern waveform comprises a first basic pulse, and constructing a first sequence waveform, where the first sequence waveform comprises a plurality of repetitions of the first pattern waveform.

Abstract: A bandgap reference circuit which is operable in low supply conditions is described. Such a circuit includes a second amplifier and a resistor at the output of a bandgap reference cell to create a constant current summing node at which PTAT and CTAT currents are summed. In modifications to the circuit it is possible to also provide a voltage reference node corresponding to the signal provided at the summing node. A further modification enables generation of a second voltage reference whose value is related to the base emitter voltage Vbe of a bipolar transistor. Further modifications provided for the generation of curvature correction within the circuit by biasing each of the first and second bipolar transistors Q1 and Q2 with currents of different forms.

Abstract: A linearized controller to operate a switching power converter which includes an inductor having its first terminal coupled to a first voltage (V1) and its second terminal switched so that it alternately connects to a second, higher voltage (V2) or to a common terminal. A sawtooth voltage generator produces a ramp voltage (Vramp) having a period T and an amplitude which varies in response to a control voltage Vx, and a voltage comparator which compares Vramp to a control voltage Vy. The comparator output controls the switching such that T is divided into intervals t1 and t2, during which the second terminal is connected to the common terminal or to V2, respectively. When Vy is maintained in a fixed proportion to V1, V2 is driven to be in the same proportion to Vx, independently of changes in V1, providing a boost converter. A buck converter is similarly realized.

Abstract: A galvanically isolated charge balance system for a multicell battery includes a balancing circuit associated with each cell; each balancing circuit including a flying capacitor; a variable conductance switch; and a biasing circuit for the variable conductance switch; and a galvanically isolating MEMS switching device for selectively connecting the flying capacitor to a voltage supply to charge it to a predetermined voltage and to the biasing circuit for setting the variable conductance switch to adjust the charge on its associated cell to a preselected level.

Abstract: A power converter provides power across an isolation barrier, such as through the use of coils. A coil driver has transistors connected in a positive feedback configuration and is coupled to a supply voltage in a controlled manner by measuring the output power and opening or closing a switch as needed between the power supply and the coil driver. An output circuit, such as a FET driver, can be used with or without isolation to provide power and a logic signal.

Abstract: A thin film composition is made from silicon, an insulator such as alumina or silicon dioxide, and at least one additional material such as chromium, nickel, boron and/or carbon. These materials are combined to provide a thin film having a ? of at least 0.02 ?-cm (typically 0.02-1.0 ?-cm), and a TCR of less than ±1000 ppm/° C. (typically less than ±300 ppm/° C.). A sheet resistance of at least 20 k?/? may also be obtained. The resulting thin film is preferably at least 200 thick, to reduce surface scattering conduction currents.

Abstract: Bridge structures provide a surface on which to form interconnections to components through through-hole vias. The bridge structures at least partially, and preferably fully, span the gap between two wafers, and, more specifically, between a through-hole via in one wafer and a corresponding component on the other wafer. Bridge structure may be formed on the wafer having the through-hole via and/or the wafer having the component.

Abstract: A circuit includes a pair of input transistors configured as a differential pair and having input terminals configured to receive an input voltage. The circuit also includes a first current source connected to and configured to provide a first tail current to the pair of input transistors, the first tail current being a class-A current having a non-zero quiescent value. The circuit also includes a second current source connected to and configured to provide a second tail current to the pair of input transistors, the second tail current being a class-B current having a zero quiescent value and a non-zero non-quiescent value. The second current source is configured to provide the second tail current as a function of the input voltage.

Abstract: An amplifier structure includes shield conductors that are provided spatially adjacent to elongated feedback signal lines that couple a feedback circuit to an amplifier input. The shield conductors are provided between the feedback signal lines and a ground plane, which interrupts a parasitic capacitance that otherwise would be established between the feedback signal line and ground. The shield conductors are electrically coupled to the amplifier's outputs which create a capacitance between the output terminal and the feedback signal line. In some embodiments, the capacitance generated between the output terminal and the feedback signal line can suffice as a capacitor in a feedback path of the amplifier and be contained in an integrated circuit die on which the amplifier is manufactured. Optionally, a structure may be provided that eliminates common mode signals on the feedback lines while simultaneously preserving the common mode signals on the amplifier output terminals.

Abstract: Systems and methods for amplitude compressing a digital signal. An input signal is divided into frames having a first and second sets of samples. The samples in the second set are also in a subsequent frame. Peak values are determined for the first and second sets. One or more slopes are calculated based on the peak values. The slopes are used to define a scale factor which is applied to the first set to produce the output signal. For example, if the first peak value exceeds an amplitude threshold, first and last samples in the first set to exceed the amplitude threshold are found. Slopes are calculated for each of three regions of the first set demarcated by the first and last samples. In each region a slope is selected. These slopes along with an initial scale factor are used to calculate the scale factor.

Abstract: A method of testing a memory cell includes generating a logic low signal, generating a logic high signal, reducing the logic high signal to a level corresponding to the logic low signal plus an offset to produce a reduced logic high signal, providing the logic low signal and the reduced logic high signal to a memory cell, allowing the memory cell to achieve a memory state, and testing the memory cell to determine if the memory state is an expected memory state. A memory array has an array of memory blocks, a write select circuit to provide write data to the array of memory blocks, and a data retention test circuit to reduce write data having a level corresponding to a logic high to a level corresponding to a logic low plus an offset.

Abstract: An analog to digital converter having improved differential non-linearity is provided. The converter has a memory which is used to look up the actual weight or a weight error corresponding to the bits that have been kept as part of the SAR process to form an output correction value A part of this, for example a residue (the part following the decimal point in a decimal representation) is used to drive a correction DAC which causes a correction to be applied to the trial value presented to a comparator used by the ADC.