Abstract: A programmable pulse slimmer system for a low pass ladder filter includes a filter input current source for providing to a low pass ladder filter the input signal to be filtered; and a high frequency boost current source for injecting into the low pass ladder filter forward of the first inductor device a high frequency load current which is a scaled inverse replica of the input signal to provide gain at the high frequency end of the low pass band of the low pass ladder filter.

Abstract: An asynchronous digital sample rate converter includes a random access memory for storing input data values and a read only memory for storing a reduced set of interpolation filter coefficients. Input data is written to the random access memory at the input sample rate. Output samples are provided from a multiply/accumulate engine which given a stream of input data and filter coefficients produces an output sample upon request at the output frequency. The initial address for reading input data from the random access memory, and the addresses for coefficients from the read only memory are provided by an auto-centering scheme which is a first order closed loop system with a digital integrator fed by an approximation of the input to output sample rate ratio. This auto-centering scheme may include a feed forward low pass filter to cancel steady state error, and an interpolated write address to reduce noise.

Abstract: A tri-state input detection circuit produces two binary outputs that indicate whether a tri-state input signal is high, low, or in a hi-impedance state. A pair of transistors conduct a current in response to a tri-state signal presented at an input node. Circuitry is provided to pull the input node to a known voltage when the input signal is in its hi-Z state. The transistors are series-connected to respective current sources, with the junctions between the transistors and their current sources forming the circuit's binary outputs. The output impedances of the current sources are made less than those of their respective transistors, so that when turned on by the input signal, a transistor pulls its associated output high or low. The circuit produces a unique binary output for each of the three input signal states.

Abstract: The chopping frequency driving a chopper-stabilized amplifier (CSA) is dynamically varied between an upper and lower frequency limit to reduce the intermodulation distortion, clock noise and low-frequency noise found in prior art designs. The upper limit is set to accommodate the settling times required by the CSA's memory capacitors, and the lower limit is set to a non-zero frequency significantly greater than DC to reduce low frequency noise. The two limits permit IMD and clock noise to be widely scattered and enable a near optimum trade off between IMD and chopping noise on one hand, and low frequency noise on the other. The chopping frequency is preferably generated digitally with a loadable counter which divides down a fixed frequency master clock, with the binary value presented at the counter's load inputs periodically varied to dynamically vary the division ratio and thus frequency modulate the chopping frequency.

Abstract: Improved data scramblers and swapper cells and improved digital to analog converters are provided. The improved swapper cells permit data to be propagated through the cell immediately upon receipt. The determination of whether to swap data or pass it directly through is based on a history of data values propagated through the cell, but is independent of the values of the particular inputs being swapped. The data scrambler is structured to permit the possible data inputs on swapper cells in the scrambler to be restricted. A minimum delay data scrambler for use in a fast digital to analog converter is disclosed using these components.

Abstract: A micromachined gyroscope has first and second coplanar bodies suspended over a substrate and movable in their plane relative to the substrate. The first body is dithered along a dither axis and is movable relative to the second body on the dither axis, but is rigidly connected for movement along an axis transverse to the dither axis. The second body is anchored so that it is substantially inhibited from moving along the dither axis, but can move with the first body along the transverse axis. The gyro has stop members and an anti-levitation system for preventing failure.

Abstract: Time-delay circuits are realized with first and second capacitors, a differential amplifier, a programmable current source and a differential pair of transistors. The current source directs first and second currents to the first and second capacitors and the differential pair steers a third current of the current source to either selected one of the capacitors to provide charging and discharging currents to the capacitors. The differential amplifier generates a delayed output pulse in response to voltages of the first and second capacitors. The capacitors are preferably formed by the interconnection system of an integrated circuit, i.e., the metallic circuit paths that are typically carried on an integrated-circuit substrate. N+1 of the delay circuits are combined with a phase comparator to form an interpolator that responds to an input data pulse by generating N output data pulses that span a period between the input data pulse and a successive input data pulse.

Abstract: Comparator structures are shown which improve latching accuracy and enhance bandwidth for operations such as high-speed sampling in a variety of applications (e.g., analog-to-digital converters and automatic test equipment). The structures include an input differential pair of transistors having first and second control structures, a differential output amplifier and a clamp that limits the signal level of at least one of the first and second control structures. The clamp includes first and second Schottky diodes that are oppositely oriented and coupled between the first and second control structures. Altenatively one side of the diodes can be coupled to bias structures that respond to a threshold signal. Bias networks respond to a sampling threshold signal and stabilize biases in the input differential pair and the differential output amplifier.

Abstract: An RF mixer provides extended dynamic range with reduced noise by utilizing degeneration inductors in the RF input section of a doubly balanced mixer. Degeneration inductors are also utilized in a mixer having a class AB input section. A current mirror in the class AB input section is also inductively degenerated for further noise reduction. The input section is biased by an all-NPN bandgap reference cell which is tightly integrated into the input section so as to reduce the power supply voltage required for the reference cell. The mixer can be optimized for wide input voltage ranges or low distortion.

Abstract: An input/output driver circuit which provides a buffer interface between a functional digital circuit and a common bus for other digital circuits achieves high levels of voltage tolerance and compliance, while requiring only two power supply pins, by using two PMOS switching transistors between the circuit's output line and an output power supply terminal, rather than only one. To turn the transistors OFF, the output power supply voltage is applied to the gate of one of them and the output line voltage to the gate of the other. This assures that at least one of the transistors is fully OFF when desired, whether or not the output line voltage exceeds the output power supply level.

Abstract: A method and system for providing adaptive filtering in a communication system. The method and system modify coefficients of a finite impulse response filter fed by a sequence of digital samples in accordance with an error signal in floating point format. The floating point error signal includes only a sign bit and an exponent term. The exponent term is added to an exponent term of an adaptation coefficient to produce a composite error signal. The adaptive filter is used as a linear adaptive equalizer and as an echo canceler.

Abstract: A circuit that produces a gate drive voltage for a MOS transistor switch, that receives an input voltage "on" a source terminal, includes a first input that receives the input voltage, a second input that receives a bias voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the input voltage and the bias voltage during a first of first and second non-overlapping time intervals. A second switch connects the voltage storage element to increase the sampled voltage by another of the input voltage and the bias voltage to the gate drive voltage during the second non-overlapping time interval, while maintaining the gate drive voltage less than a breakdown voltage of the MOS transistor switch. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch such that a gate-to-source voltage of the MOS transistor switch is maintained approximately constant.

Abstract: A charge pump circuit including current source circuits for maintaining the current sourced from an upper current source substantially equal to the current sunk by a lower current source. The current source circuits include a lower reference current source operable for defining a reference current through a first biasing transistor and a duplicate device in which an output current can be established proportional to the reference current therethrough. A complementary output device is provided for producing the upper current source along with a duplicate biasing device. The duplicate complementary biasing devices are such that the current through these devices is identical and equal to the reference current. A replication feedback loop coupled to both the common connected node of the complementary output devices and the common connected node of the complementary biasing devices operates to make the voltage at these two nodes substantially identical.

Abstract: CMOS reference structures (e.g., voltage, current and resistance structures) are provided that are substantially insensitive to temperature, supply voltages and track fabrication processes. The structures include a V.sub.t -referenced source, a sensor and a summer. The source generates a source voltage and a feed-forward current that may have an error term and the sensor generates a feedback current that has a correction term that substantially offsets the error to stabilize a sum current. In different structure embodiments, voltage, current and resistance references are responsive to the stabilized sum current. The source, sensor and summer are preferably realized with MOSFETs whose channel width-to-length ratios are chosen to enhance the temperature insensitivity of the references.

Abstract: A rail-to-rail output circuit synthesizes a constant product output characteristic by replicating the current through a pull-up transistor and utilizing a translinear loop to drive a complementary pull-down transistor responsive to the replicated current. A smaller replication transistor shares a common V.sub.BE with the pull-up transistor so as to generate a scaled replication current that is proportional to the current through the pull-up transistor. The replication transistor is coupled to the base of the pull-down transistor through a bias circuit that forms a fast translinear loop with the pull-down transistor. An emitter follower transistor sevoes the loop so that the product of the currents through the pull-up and pull-down transistors is proportional to the square of a bias current. To reduce the turn-off time of the pull-down transistor, a second replication transistor is be connected with its base-emitter junction sharing the V.sub.

Abstract: A decoupled switched current temperature circuit with compounded .DELTA.V.sub.be includes an amplifier having an inverting input with corresponding non-inverting output and a non-inverting input with a corresponding inverting output; a PN junction connected to the non-inverting input through a first input capacitor and a voltage reference circuit is connected to the inverting input through a second input capacitor; a current supply includes a low current source and a high current source; a switching device applies the high current source to the PN junction and applies the low current source to the PN junction for providing the .DELTA.V.sub.

Abstract: A novel I.C. processing scheme for the fabrication of thin film features eliminates the wet etching step previously required, reducing the chip's minimum metal spacing and improving component matching capabilities and reliability. A thin film material is deposited and patterned, prior to a contact mask or platinum sputter/sinter/strip step, followed by the deposition of a protective layer. Contact mask and silicide metallization steps create contacts to the substrate, and a second contact mask step creates openings to the thin film features. The protective layer covering the thin film material allows a dry etch to be used for the final metal etch step, eliminating the need for a wet etch step and its attendant problems. The process requires no new design rules, and is easily adapted to existing products.

Abstract: A time delay generator (20) includes a threshold generator (30), a ramp generator (32) and a comparator (34). The threshold generator provides a fixed threshold at one input of the comparator while the ramp generator provides at the other input a ramp signal whose slope is programmable. The ramp generator includes current switches (86 and 90) and a current converter (74). In response to input and range signals, the current switches provide a programmed input current and a programmed range current. The current converter generates a ramp current that is proportional to the range current and inversely proportional to the input current and couples that ramp current to an integrating ramp capacitor. The structure of the time delay generator facilitates noise filtering of the threshold signal and positioning of the threshold signal away from ramp nonlinearities.

Abstract: Multi-tanh cells constructed in accordance with the present invention provide improved input voltage range by utilizing resistors connected between the emitters of the transistors and the corresponding bias current sources. The resistor values and emitter area ratios are chosen to achieve substantially distortion-free transconductance functions over wide input voltage ranges. This improved input voltage range results in a corresponding improvement in dynamic range because the emitter resistances do not increase the noise significantly at low input voltage levels. In one embodiment, a separate resistor is connected in series with the emitter of each of the four doublet transistors. Another embodiment utilizes only a single bias current source and two emitter resistors to achieve better linearity and lower noise. To achieve higher effective emitter area ratios, an emitter follower scheme can be used to synthesize all or a portion of the area ratio.

Abstract: An isolator having a driver circuit which is responsive to an input signal to drive signals into a magnetic-field generator such as at least one coil. The generator is magnetically coupled to a sensor that includes spin-valve resistors which have resistance characteristics that are variable in response to the magnetic field generated by the generator. A receiver circuit incorporating a strobe generator converts the resistance changes to an output signal corresponding to the input signal.