Abstract: Integrated-circuit structures and methods are provided for generating an error signal that represents temperature and process-induced signal changes in transistor parameters. In particular, a reference transistor and a sense transistor are biased to each generate a substantially temperature-insensitive minority-carrier current. The reference transistor is provided with a substantially constant voltage across its current terminals to convert its minority-carrier current into a substantially temperature-insensitive reference current IR. In contrast, the sense transistor is provided with a temperature-varying voltage across its current terminals to convert its minority-carrier current into a temperature-varying sense current IS. The reference current and the sense current are then differenced to realize an error signal IE that contains information that describes temperature and process-induced signal errors in integrated-circuit transistor stages.

Abstract: A programmable “semi-fusible” link system is used to trim one or more circuit parameters. Each semi-fusible link, typically a thin film resistor, has “intact” and “blown” states, with the link having a first, non-zero resistance when intact, and a second, higher but finite resistance when blown, which is accomplished by forcing a predetermined current through the link. Each link is connected to a respective active devices which, when turned on, provide the current needed to blow the link. The links are also connected in series with respective current sources, and to respective threshold detectors connected to monitor the current through their respective links. Each threshold detector provides a logic output which indicates whether its link is intact or blown based on the magnitude of the link current. A “disable” circuit may also be included which, when activated, prevents the further programming of any of the circuit's semi-fusible links.

Abstract: A direct conversion circuit for radio frequency signals is disclosed. The circuit includes a pair of quadrature related mixers, a phase shift unit, and a local oscillator. The pair of quadrature related mixers is coupled to a radio frequency signal input port for mixing down a radio frequency input signal. The phase shift unit is in communication with at least one of the pair of mixers for phase shifting a local oscillator signal. The local oscillator produces the local oscillator signal. The local oscillator includes a non-integer frequency multiplier for multiplying the frequency of a first voltage controlled oscillator signal by a non-integer value to produce the local oscillator signal.

Abstract: One or more main programmed delay circuits (PDCs) are compensated to provide constant delays despite variations in environmental factors, such as temperature and power supply, by means of a dummy PDC that emulates the main PDCs in environmental sensitivity. While the main PDCs have dynamically changing programmed inputs, the dummy PDC has a constant programmed input. Changes in the dummy PDC's delay due to environmental changes are monitored and a correction signal is applied to the dummy PDC to maintain its delay substantially constant, with the same correction provided to the main PDCs to correct for the same changes in the delay of these circuits. The dummy PDC is preferably initially calibrated so that its fixed delay period coincides with an integer number of clock periods. Both the main and dummy PDCs preferably produce respective delays equal to the linear sum of a programmed delay and their correction delays.

Abstract: An input protection device is provided for protecting a circuit structure which is coupled to a first node, the device comprising a first lightly-doped region of P-type material with a lightly doped well of N-type material formed in it. Two regions of heavily doped N-type and P-type material, which are electrically connected to the first node, are formed in the well of N-type material. A third heavily doped region of N type material is formed in the first lightly-doped region of P-type material and is electrically connected to a reference node. In a first aspect of this invention, the third heavily doped region of N type material is formed in a second well of N-type material, which in turn is formed in the first lightly-doped region of P-type material. In this first aspect of the invention a further region of heavily doped P-type material is formed in the second well of N-type material, this further region of heavily doped P-type material being electrically connected to the reference node.

Abstract: A micromachined magnetometer is built from a rotatable micromachined structure on which is deposited a ferromagnetic material magnetized along an axis parallel to the substrate. A structure rotatable about the Z-axis can be used to detect external magnetic fields along the X-axis or the Y-axis, depending on the orientation of the magnetic moment of the ferromagnetic material. A structure rotatable about the X-axis or the Y-axis can be used to detect external magnetic fields along the Z-axis. By combining two or three of these structures, a dual-axis or three-axis magnetometer is obtained.

Abstract: A complementary waveform driver is disclosed that generates output signals SOUT with arbitrary high and low drive states with respect to an independently controlled baseline signal SBL. Accordingly, the driver can generate very fast and flexible waveforms with multiple levels and baseline components. The driver implements complementary differential pairs of transistors that alternately source and sink programmable currents to an output port, creating an output waveform with excellent rising and falling edge symmetry, and greatly improved fidelity, especially at low level voltage swings. A complementary amplifier stage defines the baseline voltage level. When combined with a programmable active load and window comparator, the driver is particularly suited for pin electronics in automatic test equipment (ATE) applications.

Abstract: A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved with a technique referred to as “optimal voltage positioning”, which keeps the output voltage within the specified boundaries while employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed. The invention can be used with regulators subject to design requirements that specify a minimum time Tmin between load transients, and with those for which no Tmin is specified.

Abstract: A non-inverting driver circuit for an LDO pass device employs a level-shifting inverter stage followed by a normalizing inverter stage. The level-shifting stage converts the output common-referenced output of the error amplifier to a current, which is provided to the normalizing inverter. The normalizing stage is referred to the LDO input voltage, enabling its output signal to remain largely invariant with respect to changes in input voltage. The driver is preferably configured to have a low output impedance, so that when driving the high gate capacitance of a MOS pass device, the resulting pole is moved to a higher frequency than would be possible with a non-inverting driver having a high output impedance. With the driver being non-inverting and the low frequency pole moved higher, frequency compensating the regulator is simplified.

Abstract: A “paddle-under-lead” (PUL) leadframe has the inner portions of an I.C. package's leads extend along the top of a paddle, to which they are affixed. An I.C. die is affixed to the top of the inner leads to form an I.C. package. Because the die is affixed directly to the leads, heat generated by the die is conducted out of the package via the package's leads, with the paddle serving as a heat spreader and heat sink. The leadframe's inner leads are affixed to the paddle, rather than separated from it as is done conventionally; this enables a larger die size to be accommodated within the same standard package size. A bifurcated inner lead design, usable with the PUL leadframe and others, divides the inner portions of an I.C. package's leads into laterally offset upper and lower sections, with the upper section serving as a wedge bond shelf and the lower section downset from the upper section.

Abstract: A suspension mounting arrangement for a suspended layer in a semiconductor accelerometer, the layer being suspended above and spaced apart from a substrate. The arrangement includes a common anchor point associated with the substrate; first and second anchor points associated with the suspended layer; a first flexible serpentine arm coupled between the first anchor point and the common anchor point; and a second flexible serpentine arm coupled between the second anchor point and the common anchor point. The first and second flexible serpentine arms are symmetrically configured with respect to one another.

Abstract: A trellis decoding system is provided having a memory for storing a sequence of received signals. The signals have been encoded prior to transmission by a trellis encoder such that each of a predetermined plurality of symbols represents an allowed transition from an originating state to a predetermined limited number of terminating states. The system includes a trellis decoder for decoding the sequence of received signals into a corresponding sequence of the symbols. A soft decision generator is provided. The soft decision generator is responsive to the signals stored in the memory and to the output of the trellis decoder and determines a soft decision parameter representative of confidence level of the trellis decoder in properly decoding the received signal into each one of the symbols. The determined soft decision parameter is tagged to each one of such symbols subsequent to the trellis decoder decoding the sequence of received signals into the corresponding sequence of symbols.

Abstract: Comparator systems and methods are provided that isolate their input and output processes from each other. Comparator signals are converted to a differential current in an input process and are carried via the differential current to an output process which converts the differential current to a comparator output signal. Supply rails that are coupled to the input process are isolated from the output process and supply rails that are coupled to the output process are isolated from the input process. The differential-current transmission and supply rail isolation effectively reduce feedback and, in addition, the differential current enhances common-mode signal rejection.

Abstract: An RMS-to-DC converter implements the difference-of-squares function by utilizing two identical squaring cells operating in opposition to generate two signals. An error amplifier nulls the difference between the signals. When used in a measurement mode, one of the squaring cells receives the signal to be measured, and the output of the error amplifier, which provides a measure of the RMS value of the input signal, is connected to the input of the second squaring cell, thereby closing the feedback loop around the second squaring cell. When used in a control mode, a set-point signal is applied to the second squaring cell, and the output of the error amplifier is used to control a variable-gain device such as a power amplifier which provides the input to the first squaring cell, thereby closing the feedback loop around the first squaring cell.

Abstract: A dynamically boosted current source circuit improves the response speed of a circuit responsive to a transitioning input signal. The circuit's responsiveness varies with the magnitude of the current provided to an identified node, and a current source capable of providing nominal and boosted currents is connected to the node. A threshold detector detects the occurrence of an input signal transition prior to its detection by the responsive circuit, and triggers the current source to provide the boosted current; this improves the responsive circuit's speed by charging or discharging identified node capacitances which hinder its operation. The identified node can be an input node, an output node, or an internal node. The current source provides the boosted current for a predetermined time interval, or until the input signal crosses a second threshold, enabling response speed to be increased without a significant increase in supply current.

Abstract: Inverters are provided which adapt their output impedance to the driven load and thereby enhance inverter performance (e.g., current drive, switching speed and common-mode rejection). An inverter embodiment includes a complementary common-source stage arranged to drive an output port in response to signals at a first side of a differential input port and a complementary common-drain stage arranged to drive the output port in response to signals at a second side of the differential input port.

Abstract: An Early voltage and beta current compensated cascode current mirror includes a cascode current mirror having an input stage responsive to an input current, a current mirror circuit having a first stage responsive to the input stage and a second stage responsive to the first stage, and an output stage responsive to the second stage for providing an output voltage and current; and a compensation circuit, responsive to the cascode current mirror, having a first compensation stage, a second compensation stage and a bootstrapping buffer, the first compensation stage, in response to a change in the output voltage, impressing a corresponding change in voltage on the second compensation stage, the second compensation stage thereby providing a change in current to the cascode current mirror for cancelling current errors induced by base current modulation in the output stage, the bootstrapping buffer, in response to the change in voltage, impressing a corresponding change in voltage on the first compensation stage to

Abstract: A filter having a semiconductor chip and a low pass filter section on the chip. The low pass filter section includes a filter transconductor and a filter capacitor connected to the filter capacitor. The low pass filter section has a cut-off frequency related to the transconductance, gmF, of the filter transconductor and the capacitance of the filter capacitor. A gm control circuit having a control circuit transconductor is provided. The gm control circuit includes a first oscillator for producing a reference frequency. The first oscillator has a portion thereof on the chip and an off-chip capacitor and off-chip resistor. The reference frequency is a function of the capacitance of the off-chip capacitor and the resistance of the off-chip resistor. A second oscillator is on the chip and produces a variable frequency. The second oscillator has an on-chip capacitor.

Abstract: A system for adaptively trimming the input offset voltage of an op amp employing an input stage with complementary differential pairs provides accurate VDos trimming over the amplifier's entire common-mode input range, by providing an “adaptive” trim signal that varies with the current conducted by one of the complementary pairs. Switching circuitry insures that only one differential pair is active at a time, except in a transition region in which both pairs are partially conducting. The use of an adaptive trim signal enables Vos to be kept low over the full range of common-mode input voltages, including in the amplifier's transition region.

Abstract: A monolithic capacitance-type microstructure includes a semiconductor substrate, a plurality of posts extending from the surface of the substrate, a bridge suspended from the posts, and an electrically-conductive, substantially stationary element anchored to the substrate. The bridge includes an element that is laterally movable with respect to the surface of the substrate. The substantially stationary element is positioned relative to the laterally movable element such that the laterally movable element and the substantially stationary element form a capacitor. Circuitry is disposed on the substrate and operationally coupled to the movable element and the substantially stationary element for processing a signal based on a relative positioning of the movable element and the substantially stationary element. A method for fabricating the microstructure and the circuitry is disclosed.