Patents Assigned to Analog Devices
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Patent number: 9116022Abstract: Various embodiments of a compact sensor module are disclosed herein. The sensor module can include a stiffener and a sensor substrate having a mounting segment and a first wing segment extending from the mounting segment. The first wing segment may be folded around an edge of the stiffener. A sensor die may be mounted on the mounting segment of the sensor substrate. A processor substrate may be coupled to the sensor substrate. A processor die may be mounted on the processor substrate and may be in electrical communication with the sensor die.Type: GrantFiled: December 7, 2012Date of Patent: August 25, 2015Assignee: ANALOG DEVICES, INC.Inventor: David Bolognia
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Patent number: 9118346Abstract: The present disclosure provides embodiments of an improved current steering switching element for use in a digital to analog (DAC) converter. Typically, each current steering switching element in the DAC converter provides a varying set of currents for converting a digital input signal. Generally, the switches and drivers in the current steering switching elements are scaled down proportionally to the current being provided by the current steering switching element according to a ratio as less and less current is being driven by the switching element in order to overcome timing errors. However, device sizes are limited by the production process. When a switch is not scaled proportionally to the current, settling timing errors are present and affects the performance of the DAC. The improved current steering switching element alleviates this issue of timing errors by replacing the single switch with two complementary current steering switches.Type: GrantFiled: December 19, 2013Date of Patent: August 25, 2015Assignee: Analog Devices, Inc.Inventors: Matthew Louis Courcy, Martin Clara, Gabriele Manganaro, Gil Engel, Lawrence A. Singer
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Publication number: 20150237183Abstract: Apparatus and methods are disclosed related to managing characteristics of a mobile device based upon capacitive detection of materials proximate the mobile device, a capacitive gesture system that can allow the same gestures be used in arbitrary locations within range of a mobile device. One such method includes receiving a first capacitive sensor measurement with a first capacitive sensor of the mobile device. The method further includes determining a value indicative of a material adjacent to the mobile device based on a correspondence between the first capacitive sensor measurement and stored values corresponding to different materials. The method further includes sending instructions to adjust a characteristic of the mobile device based on the determined value indicative of the material adjacent to the mobile device. In certain examples, gesture sensing can be performed using capacitive measurements from the capacitive sensors.Type: ApplicationFiled: February 27, 2015Publication date: August 20, 2015Applicant: ANALOG DEVICES, INC.Inventor: Isaac Chase Novet
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Publication number: 20150236739Abstract: Apparatus and methods for analog-to-digital conversion of quadrature receive signals are provided herein. In certain implementations, a transceiver system includes at least a first pair of analog-to-digital converters (ADCs) associated with a first quadrature receiver channel and a second pair of ADCs associated with a second quadrature receiver channel. The first and second pairs of ADCs can provide analog-to-digital conversion of the same receive signal, but can have different noise profiles relative to one another, such as a low pass noise profile and a band pass noise profile. The transceiver system can further include a reconstruction filter for combining the outputs of at least the first and second pairs of ADCs to generate output signals associated with a lower overall noise profile relative to that of either pair of ADCs alone.Type: ApplicationFiled: February 18, 2014Publication date: August 20, 2015Applicant: Analog Devices, Inc.Inventors: Antonio Montalvo, Richard P. Schubert
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Publication number: 20150234414Abstract: A proportional to absolute temperature (PTAT) circuit is provided. By judiciously combining circuit elements into two or more cell it is possible to effectively dump bias current into impedance resistive element of a first cell from other cells of the circuit. As a result the circuit as a whole can operate with smaller resistive elements and therefore occupy less area when implemented in silicon. It is also possible to reduce the supply current that is required for providing specific output currents or voltages.Type: ApplicationFiled: February 18, 2014Publication date: August 20, 2015Applicant: ANALOG DEVICES TECHNOLOGYInventor: Stefan Marinca
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Patent number: 9112496Abstract: A circuit and a system that uses the circuit for connecting a plurality of input channels to a receiving device. The circuit includes a plurality of DMOS switches, each of which connects a respective one of the input channels to the receiving device in response to a respective control signal. The control signals are referenced to a ground signal. Each input channel includes a common mode voltage that is non-referenced to the ground signal. The circuit also includes a switch driver that generates the control signals such that the input channels are activated one at a time.Type: GrantFiled: April 4, 2014Date of Patent: August 18, 2015Assignee: ANALOG DEVICES GLOBALInventor: David Aherne
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Publication number: 20150229353Abstract: A feedback cancellation assembly for an electroacoustic communication apparatus may include a signal transmission path for generation and emission of an outgoing sound signal to an external environment through an electrodynamic loudspeaker and a signal reception path comprising a microphone for generation of a microphone input signal corresponding to sound received from the external environment. The signal reception path may generate a digital microphone signal. The outgoing sound signal may be acoustically coupled to the microphone. An electronic feedback cancellation path may be coupled between a tapping node and a summing node to produce a feedback cancellation signal to the summing node.Type: ApplicationFiled: February 7, 2014Publication date: August 13, 2015Applicant: ANALOG DEVICES TECHNOLOGYInventors: Kim Spetzler BERTHELSEN, Robert ADAMS, Kasper STRANGE
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Publication number: 20150227162Abstract: Aspects of this disclosure relate to reference switchover. In one embodiment, an apparatus includes a phase error detector, a phase alignment detector, and a selection circuit. The phase error detector is configured to generate an indication of a relative phase difference between a first reference clock signal and a second reference clock signal. The phase alignment detector is configured to receive the indication of the relative phase difference and determine when the relative phase difference satisfies a preset threshold. The selection circuit is configured to transition from providing the first reference clock signal as a clock system reference signal to providing the second reference clock signal as the clock system reference signal responsive to the phase alignment detector detecting that the relative phase difference satisfies the preset threshold.Type: ApplicationFiled: May 7, 2014Publication date: August 13, 2015Applicant: ANALOG DEVICES, INC.Inventors: Dan Zhu, Reuben Pascal Nelson, Yi Wang
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Patent number: 9105644Abstract: A method for forming an alignment feature for back side wafer processing in a wafer fabrication process involves forming a trench into but not entirely through a wafer from a top side of the wafer; forming a contrasting material on surfaces of the trench; and grinding a bottom side of the wafer to expose the trench using the handling wafer to handle the wafer during such grinding, wherein the contrasting material lining the exposed trench provides an alignment reference for precise alignment of the wafer for back side processing the wafer.Type: GrantFiled: July 23, 2013Date of Patent: August 11, 2015Assignee: Analog Devices, Inc.Inventors: Christine H. Tsau, William David Sawyer, Thomas Kieran Nunan
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Patent number: 9102512Abstract: A MEMS apparatus has a substrate, a cap forming first and second chambers with the base, and movable microstructure within the first and second chambers. To control pressures, the MEMS apparatus also has a first outgas structure within the first chamber. The first outgas structure produces a first pressure within the first chamber, which is isolated from the second chamber, which, like the first chamber, has a second pressure. The first pressure is different from that in the second pressure (e.g., a higher pressure or lower pressure).Type: GrantFiled: October 4, 2013Date of Patent: August 11, 2015Assignee: Analog Devices, Inc.Inventors: Christine H. Tsau, Li Chen, Kuang L. Yang
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Patent number: 9105090Abstract: A system for correcting distortion effects in a distorted image includes a memory controller for reading pixels (corresponding to a subset region in a destination image) of the distorted image from a system memory to local memory. A look-up table stores an offset and interpolation weight for each pixel, and an ALU computes, using stored values only in the local memory, values of each of the pixels in the region in the destination image.Type: GrantFiled: July 13, 2011Date of Patent: August 11, 2015Assignee: Analog Devices, Inc.Inventors: Akshayakumar Haribhatt, Rajesh Vijayakumar
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Patent number: 9106210Abstract: In one example embodiment, a programmable capacitor array is provided for low distortion and minimizing linearity degradation of an input (Vin) by utilizing control circuitry to switch on and off an array of MOSFET switches. The control circuitry turns on a MOSFET to load a capacitance on Vin and turns off the MOSFET to remove the capacitance from Vin in response to a Din control signal. When the intention is to load Vin with the capacitance, the MOSFET is left on continuously. When the intention is to remove or unload the capacitance from Vin, the MOSFET is primarily turned off, however, the MOSFET is still periodically turned on with appropriate voltage levels in response to a clock signal for periods of time when the loading of the capacitance on Vin is tolerable to the system, thereby ensuring minimal linearity degradation of Vin due to the programmable capacitor array system.Type: GrantFiled: February 24, 2014Date of Patent: August 11, 2015Assignee: Analog Devices, Inc.Inventors: Siddharth Devarajan, Lawrence A. Singer
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Publication number: 20150220100Abstract: In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.Type: ApplicationFiled: January 31, 2014Publication date: August 6, 2015Applicant: ANALOG DEVICES, INC.Inventors: Haiyang Zhu, Wenhua W. Yang, Nathan T. Egan
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Publication number: 20150222288Abstract: Example embodiments of this disclosure can provide an apparatus, a system, and a method of correcting for charge lost from a sampling capacitor as a result of an analog to digital conversion being performed. In an embodiment, there is provided a method of operating an analog to digital converter comprising at least a first sampling capacitor used to sample an input signal, where the method can further comprise a correction step of modifying the voltage across the at least first sampling capacitor, the correction step being performed prior to commencing an acquire phase.Type: ApplicationFiled: February 5, 2014Publication date: August 6, 2015Applicant: ANALOG DEVICES TECHNOLOGYInventor: Christopher Peter Hurrell
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Patent number: 9098104Abstract: A low drop out voltage regulator comprising: a transistor having an input node, an output node, and a control node; a differential amplifier having an output connected to the control node of the transistor and having a first input node; and a feedback capacitor connected between the output node of the transistor and the first input of the differential amplifier, wherein a voltage at the output of the transistor is dependent on a charge across the feedback capacitor.Type: GrantFiled: March 7, 2013Date of Patent: August 4, 2015Assignee: ANALOG DEVICES GLOBALInventors: Ramon Tortosa Navas, Enrique Company Bosch, Santiago Iriarte
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Patent number: 9099976Abstract: Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.Type: GrantFiled: October 7, 2013Date of Patent: August 4, 2015Assignee: Analog Devices, Inc.Inventors: Pablo Acosta-Serafini, Kimo Tam, Stuart McCracken, Daniel Mulcahy
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Patent number: 9100045Abstract: A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. In one configuration, the DAC comprises a first and second switching network, the second switching network providing multiple switched paths which compensate for impedance effects of the second string and provides multiple state changes at the output node of the DAC.Type: GrantFiled: March 14, 2014Date of Patent: August 4, 2015Assignee: ANALOG DEVICES GLOBALInventor: Dennis A. Dempsey
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Patent number: 9099924Abstract: A target voltage generator for use with a DC to DC converter, the DC to DC converter having a first input for receiving a voltage to be converted, an output for outputting a converted voltage, a first reference voltage input for receiving a first reference voltage and a controller arranged to compare the output voltage of the DC to DC converter with the first reference voltage and to modify the operation of the DC to DC converter so as to reduce a difference between the output voltage and the first reference voltage; the target voltage generator comprising a circuit arranged to compare the output voltage of the DC to DC converter with a second reference voltage and to use a result of the comparison to generate or modify the first reference voltage.Type: GrantFiled: December 11, 2012Date of Patent: August 4, 2015Assignee: Analog Devices, Inc.Inventor: Gavin Galloway
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Patent number: 9100007Abstract: A slew rate booster, switchably enabled selector, or other arrangement may be included in a cascode amplifier to keep the current buffer/common gate transistor and the input/common source transistor saturated as the voltage at the source of the current buffer transistor drops during a transient input voltage spike at the gate of the input transistor. In some instances a higher potential may be supplied to a gate of the current buffer transistor during an initial phase of the settling period than during a second phase of the settling period when a lower potential may be applied. Other techniques may be used in different embodiments. Devices and methods are provided.Type: GrantFiled: September 4, 2012Date of Patent: August 4, 2015Assignee: ANALOG DEVICES, INC.Inventors: Haiyang Zhu, Ronald A. Kapusta
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Patent number: 9099932Abstract: A duty cycle balance module (DCBM) for use with a switch mode power converter. One possible half-bridge converter embodiment includes a transformer driven to conduct current in first and second directions by first and second signals during and second half-cycles, respectively. A current limiting mechanism adjusts the duty cycles of the first and second signals when a sensed current exceeds a predetermined limit threshold. The DCBM receives signals representative of the duty cycles which would be used if there were no modification by the current limiting mechanism and signals Dact—1 and Dact—2 representative of the duty cycles that are actually used for the first and second signals, and outputs signals Dbl—1 and Dbl—2 which modify signals Dact—1 and Dact—2 as needed to dynamically balance the duty cycles of the first and second signals and thereby reduce flux imbalance in the transformer that might otherwise arise.Type: GrantFiled: January 7, 2013Date of Patent: August 4, 2015Assignee: Analog Devices GlobalInventors: Yingyang Ou, Renjian Xie, Huailiang Sheng