Abstract: A method for aligning an opto-electronic component in an IC die with an optical port is disclosed. This is achieved, in various embodiments, by forming alignment features in the IC die that can mate with complementary alignment features of the optical port. The formation of alignment features can be performed at the wafer level during fabrication of the IC die. An optical signal carrier may be optically coupled to the optical port such that the signal carrier may communicate optically with the opto-electronic component.

Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.

Abstract: A USB-based isolator system conveys USB signals between a pair of galvanically isolated circuit systems and supports controlled enumeration by a downstream device on upstream USB signal lines. The isolator system provides a multi-mode voltage regulator to support multiple voltage supply configurations. The isolator system further provides control systems for each of the isolated circuit systems and provides robust control in a variety of start up conditions. Additionally, the isolator system includes refresh timers and watchdog mechanisms to support persistent operation but manage possible communication errors that can arise between the isolated circuit systems.

Abstract: A sensor device formed on a semiconductor substrate. The device comprises a thermal radiation sensor including a sensing cell and a referencing cell which are co-operable for providing a first output signal indicative of the temperature fluctuation resulting from incident radiation. A gradient sensor including a pair of cells spatially located on the semiconductor substrate is provided which are co-operable to provide a second output signal indicative of the temperature gradient across the semiconductor substrate for facilitating calibrating the first output signal. At least one of the cells of the gradient sensor is not common to the cells of the thermal radiation sensor.

Abstract: A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.

Abstract: A compact sensor module and methods for forming the same are disclosed herein. In some embodiments, a sensor die is mounted on a sensor substrate. A processor die can be mounted on a flexible processor substrate. In some arrangements, a thermally insulating stiffener can be disposed between the sensor substrate and the flexible processor substrate.

Abstract: Apparatuses and methods for providing transient electrical event protection are disclosed. In one embodiment, an apparatus comprises a detection and timing circuit, a current amplification circuit, and a clamping circuit. The detection and timing circuit is configured to detect a presence or absence of a transient electrical event at a first node, and to generate a first current for a first duration upon detection of the transient electrical event. The current amplification circuit is configured to receive the first current from the detection and timing circuit and to amplify the first current to generate a second current. The clamping circuit is electrically connected between the first node and a second node and receives the second current for activation. The clamping circuit is configured to activate a low impedance path between the first and second nodes in response to the second current, and to otherwise deactivate the low impedance path.

Abstract: Techniques to compensate for sources of temperature and process dependent errors within an oscillator system for frequency control oscillator output clock signal. The oscillator system may include a controller and an oscillator circuit. The techniques may include generating a pair of voltages, a first of which is temperature variant, having (approximately) known temperature variations across process, and a second of which is (approximately) temperature invariant. Each voltage may be scaled by a corresponding trim factor. The scaled voltages may be combined to generate a reference voltage. The reference voltage may compensate for process and temperature dependent error sources within the oscillator system to set the oscillator output clock signal frequency.

Abstract: Apparatus and methods for electronic circuit protection are disclosed. In one embodiment, an apparatus comprises a well having an emitter and a collector region. The well has a doping of a first type, and the emitter and collector regions have a doping of a second type. The emitter region, well, and collector region are configured to operate as an emitter, base, and collector for a first transistor, respectively. The collector region is spaced away from the emitter region to define a spacing. A first spacer and a second spacer are positioned adjacent the well between the emitter and the collector. A conductive plate is positioned adjacent the well and between the first spacer and the second spacer, and a doping adjacent the first spacer, the second spacer, and the plate consists essentially of the first type.

Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.

Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.

Abstract: A system and method transmits graphic data received at varying frequencies at a fixed data rate. The frequency dependent data and associated data clock signal are received and the frequency dependent data is converted to frequency independent data. A ratio of a number of data clock cycles to a number of reference clock cycles is determined and transmitted. The frequency independent data and header data are transmitted, at a fixed rate, to a receiver, the fixed rate being a frequency greater than the frequency of the associated data clock signal. The received the frequency independent data is converted to frequency dependent data based upon the received determined ratio. The communication channel may include an optical fiber and a tension member wherein control data is transmitted along the tension member and graphic data is transmitted along the optical fiber.

Abstract: A semiconductor switch comprises a PNPN structure arranged to provide an SCR-like functionality, and a MOS gate structure, preferably integrated on a common substrate. The switch includes ohmic contacts for the MOS gate, and for the cathode and gate regions of the PNPN structure; the anode contact is intrinsic. A fixed voltage is typically applied to an external node. The MOS gate structure allows current to be conducted between the external node and the intrinsic anode when on, and the PNPN structure conducts the current from the anode to the cathode when an appropriate voltage is applied to the gate contact. Regenerative feedback keeps the switch on once it begins to conduct. The MOS gate inhibits the flow of current between the external node and anode—and thereby turns off the switch—when off. When on, the MOS gate's channel resistance serves as a ballast resistor.

Abstract: A MEMS sensing system includes a movable mass having at least one contact surface, a stopper system for stopping the movement of the mass, the stopper system having at least one contact surface that contacts a corresponding contact surface of the mass if a sufficient movement of the mass occurs in a direction, at least one stopper gap formed between the at least one contact surface of the stopper system and the corresponding contact surface of the mass, and a spring system in communication with the at least one stopper gap.

Abstract: An analog belief propagation system uses current mode implementations of storage elements and circuit implementations of at least some nodes of a factor graph using current representations. The system mitigates or avoids effects of non-linearities and approximations in storage and processing elements of the system, for instance, by using storage cells that reproduce current values and using factor circuits that separate control sections and signal path sections of the circuits.

Abstract: A switched-capacitor digital-to-analog converter (DAC) circuit can include first and second sets of capacitors, an amplifier, a reference signal generator and interconnecting switches. The first and second sets of capacitors can be connected to first and second analog input signals responsive to a first clock signal, and to first and second reference voltages responsive to a second clock signal and digital control signals. The amplifier can be connected to the first and second sets of capacitors in response to the second clock signal. The reference signal generator can provide to the first and second sets of capacitors, responsive to the first clock signal, a common-mode reference signal to set a common-mode voltage at inputs of the amplifier, and can include components to replicate the operation of the first and second sets of capacitors. The switched-capacitor DAC circuit can be used to implement a multiplying DAC in a pipeline analog-to-digital converter.

Abstract: The invention may provide a temperature sensor device that includes an analog temperature sensor to generate a first base-emitter voltage and a second base-emitter voltage, and an analog-to-digital converter (ADC) to sample at the voltages and generate corresponding digital values. The temperature sensor device may also include a logic unit to calculate a digital temperature code from the digital values using a digital virtual reference.

Abstract: A method and system that may include a pair of amplifier transistors and an output coupled to a load device. The precharge buffer may be controlled by an activation signal. The precharge buffer may also include a pair of level shifters. Each level shifter may be provided in association with a respective one of the transistors, and each may provide a respective level shift to an input signal at a common signal source based on a reference voltage. Outputs of the level shifters may be coupled to the respective transistors. The precharge buffer may also include a bypass signal path extending from the common signal source to the load device. A signal path may be controlled by another activation signal, and the precharge buffer and the bypass signal may be enabled during mutually exclusive states of the activation signal.

Abstract: Embodiments of the present invention provide a monitoring system that may include a plurality of monitors. Each may have a plurality of input pairs coupled to respective components of a component stack, wherein adjacent monitors each have an input pair coupled to a common component. Embodiments of the present invention provide an integrated circuit that may include a plurality of detectors to locally measure a first group of channels. The integrated circuit may also include a receiver operable to receive a measurement of at least one channel of the first group of channels, and a controller to calculate a correction factor based on the received measurement and a local measurement of the at least one channel and to correct all first group measurements with the correction factor.

Abstract: The invention provides a systematic error correction network coupled to a converter. The converter may display a systematic non-linearity error, and the systematic error correction network shapes a correction transform function that acts like counter distortion function for the non-linearity error. The systematic error correction network then scales the correction transform function according to a reference variable, where the magnitude of non-linearity error is related to the reference variable. The scaled correction transform function is then applied to the converter path in order to generate a corrected analog output signal.