Abstract: A die has a part that is sealed with a cap. The seal can be hermetic or non-hermetic. If hermetic, a layer of glass or metal is formed in the surface of the die, and the cap has a layer of glass or metal at a peripheral area so that, when heated, the layers form a hermetic seal. A non-hermetic seal can be formed by bonding a cap with a patterned adhesive. The cap, which can be silicon or can be a metal paddle, is electrically coupled to a fixed voltage to shield the part of the die.

Abstract: A shaped pulse generation circuit for applications such as automatic test equipment pin drivers employs an active feedback circuit that adds a pre-emphasis to the output pulses, thereby compensating for the effect of the transmission system between the pin driver and the device under test. Current pulses are applied to the pin driver output transistors in conjunction with the production of rising and falling output pulse edges to produce edge overshoots that are mitigated during pulse transit to the device under test. The driver circuit together with the pre-emphasis active feedback circuit can be integrated onto a single chip, with an additional programming circuit employed to control the amount of pre-emphasis.

Abstract: This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.

Abstract: A first device receives and processes signals from a communication link that supports a plurality of signal protocols. The device comprises a converter, coupled to the communication link, that outputs a sampled data stream, and a digital filter that filters the sampled data stream to separate signals associated with different signal protocols. A second device receives a first input sampled data stream representative of a first signal to be transmitted and associated with a first signal protocol and a second input sampled data stream representative of a second signal to be transmitted and associated with a second signal protocol, and combines the data streams into an output data stream which may be coupled to the communication link.

Abstract: Apparatus, and method, for producing a signal representative of a non-linear function of an input signal. The apparatus includes a feedback loop having a sigma-delta modulator fed by the input signal and a feedback signal, such feedback signal being a non-linear function of the output of the modulator. The output of the sigma-delta modulator is a stream of m-bit digital words. The output of the sigma-delta modulator is fed to an filter for converting the stream of m-bit digital words produced by the sigma-delta modulator into a corresponding stream of n-bit digital words. The n-bit and m-bit streams of digital words are fed to a multiplier. The multiplier produces an series of digital words, each one of the digital words representing the product of one of the n-bit digital words and a one of the n-bit digital words. The series of digital words produced by the multiplier is fed to the sigma-delta modulator as the feedback signal.

Abstract: A non-inverting feedback amplifier with high disabled impedance includes a disableable signal amplifier; a feedback network having an input node, a feedback node and a reference node; the signal amplifier having a first input for receiving an input signal and a second input for receiving a feedback signal from the feedback node; and a reference buffer including a reference amplifier with its output directly connected to the reference node without additional series switching elements, a first input connected to a reference voltage, and a second input connected to its own output for mirroring at its output the reference voltage at its first input when the reference buffer and signal amplifier are enabled and presenting a high impedance between the feedback network and the reference voltage when the signal amplifier and reference buffer are disabled.

Abstract: Latch systems and methods are configured to temporarily latch trim signals in experimental combinations of set and reset states and, subsequently, to permanently latch the trim signals in a preferred combination (i.e., a combination that optimizes the performance parameters of an electronic circuit). Latch systems of the invention include a latch, a reset driver, a temporary-set driver and a permanent-set driver and are particularly suited for determining a preferred combination of set and reset states prior to permanently latching this preferred combination.

Abstract: Differential-signal gate structures are provided in which first and second current-switching modules are coupled to first and second electrical loads with the differential input ports of the modules cross coupled. Although each of the modules separately exhibits an increased propagation-delay response to one input signal sequence, they are never simultaneously exposed to this sequence because of the cross coupling of the input ports. Accordingly, these gate structures have significantly reduced propagation-delay variations.

Abstract: N-bit precision digital-to-analog converters are provided that facilitate realization of precision linearities (i.e., linearities that substantially exceed N-bit linearity). They include a binary-weighted current source, current switches and bidirectional-trim digital-to-analog converters. The binary-weighted current source generates binary-weighted currents that are each coupled to the output port by a respective one of the current switches in response to a respective bit of the digital input signal. The bidirectional-trim digital-to-analog converters generate respective bidirectional trim currents with respective amplitudes and directions. Each of the bidirectional-trim digital-to-analog converters is coupled to provide its bidirectional trim current to a respective one of the current switches for a linearizing adjustment of that switch's binary-weighted current. Preferably, the bidirectional-trim currents are slaved to the binary-weighted currents.

Abstract: Methods are provided for separating microcircuit dies from a wafer, which includes microcircuit dies containing componentry on a circuit side thereof and streets separating the dies from each other. A first wafer mount film is affixed to the circuit side of the wafer, and the dies are detached along the streets with the circuit side of the wafer fixed to the first wafer mount film, thereby forming a divided wafer. A second wafer mount film is fixed to the back side of the divided wafer, and the first wafer mount film is removed from the divided wafer so that the dies remain fixed to the second wafer mount film with their circuit sides exposed. The second wafer mount film preferably has greater adhesion to the divided wafer than the first wafer mount film when the first wafer mount film is removed from the divided wafer. The first wafer mount film may comprise a protective film having holes aligned with fragile components on the dies and a cover film that covers the holes.

Abstract: A CMOS amplifier includes a FET differential input stage, with the input transistors' sources connected to a common tail current. A first current mirror reflects the drain current from one input FET to the other at a first node. A pair of FETs are connected to conduct respective currents in response to the voltage at the first node. One of the currents drives a load at a second node, which is connected to one of the input stage gates such that the output voltage tracks an input voltage applied to the other input stage gate. The other current is reflected via a second current mirror to provide the common tail current. By properly sizing the FETs to achieve particular current densities, the tail current is automatically varied to adjust the operating point of the differential input stage such that, when the amplifier is in equilibrium, the drain voltages of the input FETs are kept equal over a wide range of output currents.

Abstract: An electronic programmable read-only-memory (EPROM) is provided having a field effect transistor with the gate electrode thereof coupled to a capacitor adapted to store charge produced in a channel region of the transistor in response to a logic state programming voltage applied between one of the source and drain regions and the gate electrode. The field effect transistor and the capacitor are formed in a common semiconductor body along with CMOS transistors. The field effect transistor has relatively heavy doped source and drain regions separated by an oppositely doped channel region. A gate electrode is disposed over the channel region. Lightly doped regions, having the same conductivity type as the source and drain regions, extend laterally from the source and drain regions to peripheral regions of the channel region to suppress generation of “hot” electrons in the transistor and the CMOS transistors.

Abstract: An electronic filter has an input connector adapted for electrical connection to a complimentary output connector of an asymmetrical digital subscriber line. The input connector has an input voltage node for providing electrical input signals to the electronic filter. Similarly, the filter has an output connector adapted for electrical connection to a complimentary input connector of a data receiving device. The output connector has an output voltage node for providing electrical output signals from the electronic filter. The filter selectively passes frequency components of the electrical signals, frequency components below a predetermined corner frequency passing from the input connector to the output connector, frequency components above the predetermined corner frequency not passing from the input connector to the output connector.

Abstract: A bandgap reference circuit provides an output reference voltage that is generally insensitive to fluctuations in supply voltage, ambient temperature, and output load current. A current regulator establishes an output whose variations are reduced, preferably logarithmically, relative to variations in a supply voltage. A bandgap generator fed by the output current provides an output reference voltage with similarly suppressed variations. A control amplifier biases the bandgap generator to provide a high level common-mode rejection of various error sources.

Abstract: The invention is directed to a microfabricated device. The device includes a substrate that is etched to define mechanical structures at least some of which are anchored laterally to the remainder of the substrate. Electrical isolation at points where mechanical structures are attached to the substrate is provided by filled isolation trenches. Filled trenches may also be used to electrically isolate structure elements from each other at points where mechanical attachment of structure elements is desired. The performance of microelectromechanical devices is improved by 1) having a high-aspect-ratio between vertical and lateral dimensions of the mechanical elements, 2) integrating electronics on the same substrate as the mechanical elements, 3) good electrical isolation among mechanical elements and circuits except where electrical interconnection is desired.

Abstract: An isolator having a driver circuit which responsive to an input signal drives appropriate signals into one or more coils which are magnetically coupled to one or more corresponding MR or GMR elements whose resistance is variable in response to the magnetic field applied by the coil(s), and an output circuit that converts the resistance changes to an output signal corresponding to the input signal. A Faraday shield is interposed between the coil(s) and the MR or GMR elements. Common mode transients applied to the driver are capacitively coupled from the coil(s) into the Faraday shield and therethrough to ground, instead of into the MR elements. A second Faraday shield may be disposed in spaced relationship with the first Faraday shield and referenced to the potential of the MR elements for even greater common mode rejection. The entire structure may be formed monolithically as an integrated circuit on a single substrate, for low cost, small size, and low power consumption.

Abstract: A power-on reset circuit employs all-CMOS circuitry to initiate a reset signal when the circuit's power supply voltage is low, and terminate the signal in response to the supply voltage exceeding a reference voltage by at least the greater of the threshold voltages of PFET and NFET transistors employed in the circuit. A diode-connected bipolar transistor is implemented with an FET-compatible circuit structure to establish the reference voltage, which compensates for the possibility of fabrication tolerances.

Abstract: A data processor is provided with an embedded debugger. The debugging function is provided by the execution of a debugging program which is stored in reserved, non-volatile memory which is internal to the data processor. During the debug mode, the data processor allows the internal registers used during execution of a user program to be examined. Debug operation can be initiated via debug instruction which replaces an existing instruction in the user code, the replaced instruction being held in a special purpose register such that it can be executed on return from the debug mode. Single step operation of the data processor can be performed in debug mode and data and instructions can be exchanged with the data processor in debug mode, optionally via a single pin so as not to sacrifice any user resources.

Abstract: A micromachined device is provided that establishes select dimensional relationships between micromachined structures to achieve correlation in dimensional variation among these structures.

Abstract: An integrated circuit chip having formed thereon a voltage control circuit supply adapted to provide one of a pair of voltages selectively in accordance with an operating mode of the circuit. The circuit includes a comparator circuit fed by the pair of voltage sources. A first switch is controlled by the comparator circuit. A first one of the pair of voltage sources is fed through a second switch which may be a transistor or a diode. An input of the first switch is fed to a second one of the pair of voltage sources.