Abstract: A miller, a non-transitory computer readable medium, and a method. The miller may include an ion beam column that may be configured to form a vertical surface in an object by applying a milling process that may include forming a vertical surface by irradiating, for a certain period of time, an area of an upper surface of an object by a defocused ion beam that comprises multiple rays. During the certain period of time and at a plane of the upper surface of the object, a majority of the multiple rays are closer to an edge of the defocused ion beam than to a center of the defocused ion beam. The focal plane of the defocused ion beam is located below the upper surface of the object.

Abstract: A method is for sealing a backplane component of a load port system to an equipment front end module (EFEM). The method includes mounting a leveling block to the EFEM. A conical hole adjustment assembly is coupled between a first distal end of the leveling block and the backplane component. The method further includes rotating a first leveling adjustment bolt in the conical hole adjustment assembly to align the backplane component with the EFEM.

Abstract: A captured image of a pattern and a reference image of the pattern may be received. A contour of interest of the pattern may be identified. One or more measurements of a dimension of the pattern may be determined for each of the reference image and the captured image with respect to the contour of interest of the pattern. A defect associated with the contour of interest may be classified based on the determined one or more measurements of the dimension of the pattern for each of the reference image and the captured image.

Abstract: A method includes receiving a matrix including start times associated with substrate operations in a substrate processing system. The method further includes generating, by a first graphics processing unit (GPU) of one or more GPUs, a plurality of matrices based on the matrix. The method further includes concurrently processing, by a plurality of cores of the one or more GPUs, the plurality of matrices to generate parallel outputs. A schedule for processing substrates in the substrate processing system is to be generated based on the parallel outputs.

Abstract: Exemplary support assemblies may include a top puck and a backing plate coupled with the top puck. The support assemblies may include a cooling plate coupled with the backing plate. The support assemblies may include a heater coupled between the cooling plate and the backing plate. The support assemblies may also include a back plate coupled with the backing plate about an exterior of the backing plate. The back plate may at least partially define a volume, and the heater and the cooling plate may be housed within the volume.

Abstract: Embodiments disclosed herein generally relate to a method, system, and non-transitory computer readable medium for classifying an outlier in time series data collected by a sensor positioned in a substrate processing chamber. The client device receives time series data from the sensor positioned in the substrate processing chamber. The client device converts the time series data to a bounded uniform signal. The client device identifies signal sub-segments that do not match an expected behavior. The client device classifies the identified sub-segments that do not match the expected behavior.

Abstract: Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include an adapter coupled with the remote plasma unit. The adapter may include a first end and a second end opposite the first end. The adapter may define a central channel through the adapter. The adapter may define an exit from a second channel at the second end, and the adapter may define an exit from a third channel at the second end. The central channel, the second channel, and the third channel may each be fluidly isolated from one another within the adapter.

Abstract: Embodiments of the invention generally relate to solid state battery structures, such as Li-ion batteries, methods of fabrication and tools for fabricating the batteries. One or more electrodes and the separator may each be cast using a green tape approach wherein a mixture of active material, conductive additive, polymer binder and/or solid electrolyte are molded or extruded in a roll to roll or segmented sheet/disk process to make green tape, green disks or green sheets. A method of fabricating a solid state battery may include: preparing and/or providing a green sheet of positive electrode material; preparing and/or providing a green sheet of separator material; laminating together the green sheet of positive electrode material and the green sheet of separator material to form a laminated green stack; and sintering the laminated green stack to form a sintered stack comprising a positive electrode and a separator.

Abstract: Electroplating system seals may include an annular busbar characterized by an inner annular radius and an outer annular radius. The annular busbar may include a plurality of contact extensions. The seals may include an external seal member characterized by an inner annular radius and an outer annular radius. The external seal member may be vertically aligned with and extend inward of the contact extensions at the inner annular radius of the external seal member. The external seal member may include an interior surface at least partially facing the contact extensions. The seals may also include an internal seal member extending a first distance along the interior surface of the external seal member from the inner annular radius. The internal seal member may include a deformable material configured to support a substrate between the internal seal member and the plurality of contact extensions.

Abstract: Exemplary processing methods may include forming a first deposition plasma of a silicon-and-nitrogen-containing precursor. The methods may include depositing a first portion of a silicon nitride material on a semiconductor substrate with the first deposition plasma. A first treatment plasma of a helium-and-nitrogen-containing precursor may be formed to treat the first portion of the silicon nitride material with the first treatment plasma. A second deposition plasma may deposit a second portion of a silicon nitride material, and a second treatment plasma may treat the second portion of the silicon nitride material. A flow rate ratio of helium-to-nitrogen in the first treatment plasma may be lower than a He/N2 flow rate ratio in the second treatment plasma. A first power level from a plasma power source that forms the first treatment plasma may be lower than a second power level that forms the second treatment plasma.

Abstract: An exemplary method may include delivering a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may also include forming a plasma within the processing region of the semiconductor processing chamber from the boron-containing precursor. The method may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The boron-containing material may include greater than 50% of boron. In some embodiments, the boron-containing material may include substantially all boron. In some embodiments, the method may further include delivering at least one of a germanium-containing precursor, an oxygen-containing precursor, a silicon-containing precursor, a phosphorus-containing precursor, a carbon-containing precursor, and/or a nitrogen-containing precursor to the processing region of the semiconductor processing chamber.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate; a multilayer stack of reflective layers on the substrate; a capping layer on the multilayer stack of reflecting layers; and an absorber layer on the capping layer, the absorber layer made from tellurium and germanium.

Abstract: Exemplary methods of etching gallium oxide from a semiconductor substrate may include selectively etching gallium oxide relative to gallium nitride. The method may include flowing a reagent in a substrate processing region housing the semiconductor substrate. The reagent may include at least one of chloride and bromide. The method may further include contacting an exposed region of gallium oxide with the at least one of chloride and bromide from the reagent to form a gallium-containing gas. The gallium-containing gas may be removed by purging the substrate processing region with an inert gas. The method includes recessing a surface of the gallium oxide. The method may include repeated cycles to achieve a desired depth.

Abstract: Exemplary semiconductor substrate supports may include a pedestal having a shaft and a platen. The semiconductor substrate supports may include a cover plate. The cover plate may be coupled with the platen along a first surface of the cover plate. The cover plate may define a recessed channel in a second surface of the cover plate opposite the first surface. The semiconductor substrate supports may include a puck coupled with the second surface of the cover plate. The puck may incorporate an electrode. The puck may define a plurality of apertures extending vertically through the puck to fluidly access the recessed channel defined in the cover plate.

Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 ? to less than or equal to 50 ?. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-? metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.

Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The processing region may be defined between a faceplate and a substrate support on which the semiconductor substrate is seated. The methods may include forming a treatment plasma within the processing region of the semiconductor processing chamber. The treatment plasma may be formed at a first power level from a first power source. A second power may be applied to the substrate support from a second power source at a second power level. The methods may include densifying the flowable film within the feature defined within the semiconductor substrate with plasma effluents of the treatment plasma.

Abstract: Gas distribution apparatus to provide uniform flows of gases from a single source to multiple processing chambers are described. A regulator is positioned at an upstream end of a shared volume having a plurality of downstream ends. A flow controller is positioned at each downstream end of the shared volume, the flow controller comprising an orifice and a fast pulsing valve. Methods of using the gas distribution apparatus and calibrating the flow controllers are also described.

Abstract: Methods for depositing an amorphous carbon layer on a substrate and for filling a substrate feature with an amorphous carbon gap fill are described. The method comprises performing a deposition cycle comprising: introducing a hydrocarbon source into a processing chamber; introducing a plasma initiating gas into the processing chamber; generating a plasma in the processing chamber at a temperature of greater than 600° C.; forming an amorphous carbon layer on a substrate with a deposition rate of greater than 200 nm/hr; and purging the processing chamber.

Abstract: Methods for forming a nucleation layer on a substrate. In some embodiments, the processing method comprises sequential exposure to a first reactive gas comprising a metal precursor and a second reactive gas comprising a halogenated silane to form a nucleation layer on the surface of the substrate.

Abstract: Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.