Abstract: An additive manufacturing apparatus includes a platform, one or more supports positioned above the platform, an actuator, a first dispenser system configured dispense a plurality of successive layers of powder onto a build area supported by the platform, a first binder material dispenser configured to selectively dispense a first binder material on a voxel-by-voxel basis to an uppermost layer of powder in the build area, and an energy source configured to emit radiation toward the platform so as to solidify the binder material. The first dispenser system includes a first powder dispenser that is attached to and moves with a first support from the one or more supports and is configured to selectively dispense a first powder onto the build area, and a second powder dispenser that is configured to selectively dispense the second powder onto the build area.

Abstract: There are provided system and method of segmentation a fabrication process (FP) image obtained in a fabrication of a semiconductor specimen. The method comprises: upon obtaining a Deep Neural Network (DNN) trained to provide segmentation-related data, processing a fabrication process (FP) sample using the obtained trained DNN and, resulting from the processing, obtaining by the computer segments-related data characterizing the FP image to be segmented, the obtained segments-related data usable for automated examination of the semiconductor specimen. The DNN is trained using a segmentation training set comprising a plurality of first training samples and ground truth data associated therewith, each first training sample comprises a training image; FP sample comprises the FP image to be segmented.

Abstract: The present disclosure generally relates to devices having conformal semiconductor cladding materials, and methods of forming the same. The cladding material is a silicon germanium epitaxial material. The cladding material is capable of being deposited to a thickness which is less than cladding materials formed by conventional deposition/etch techniques.

Abstract: A method of fabricating a polishing pad includes determining a desired distribution of voids to be introduced within a polymer matrix of a polishing layer of the polishing pad. Electronic control signals configured to be read by a 3D printer are generated which specify the locations where a polymer matrix precursor is to be deposited, and specify the locations of the desired distribution of voids where no material is to be deposited. A plurality of layers of the polymer matrix corresponding to the plurality of the first locations is successfully deposited with the 3D printer. Each layer of the plurality of layers of polymer matrix is deposited by ejecting a polymer matrix precursor from a nozzle. The polymer matrix precursor is solidified to form a solidified polymer matrix having the desired distribution of voids.

Abstract: A multi-layer coating for a surface of an article comprises a diffusion barrier layer and an erosion resistant layer. The diffusion barrier layer may be a nitride film including but not limited to TiNx, TaNx, Zr3N4, and TiZrxNy. The erosion resistant layer may be a rare oxide film comprising YZrxOy. The diffusion barrier layer and the erosion resistant layer may be deposited on the article's surface using a thin film deposition technique including but not limited to, ALD, PVD, and CVD.

Abstract: An advanced sputter target is disclosed. The advanced sputter target comprises two components, a porous carrier, and a metal material disposed within that porous carrier. The porous carrier is designed to be a high porosity, open cell structure such that molten material may flow through the carrier. The porous carrier also provides structural support for the metal material. The cell sizes of the porous carrier are dimensioned such that the capillary action and surface tension prohibits the metal material from spilling, dripping, or otherwise exiting the porous carrier. In some embodiments, the porous carrier is an open cell foam, a weave of strands or stacked meshes.

Abstract: Implementations of the present disclosure relate to a sputtering target for a sputtering chamber used to process a substrate. In one implementation, a sputtering target for a sputtering chamber is provided. The sputtering target comprises a sputtering plate with a backside surface having radially inner, middle and outer regions and an annular-shaped backing plate mounted to the sputtering plate. The backside surface has a plurality of circular grooves which are spaced apart from one another and at least one arcuate channel cutting through the circular grooves and extending from the radially inner region to the radially outer region of sputtering plate. The annular-shaped backing plate defines an open annulus exposing the backside surface of the sputtering plate.

Abstract: An apparatus comprises a flexible membrane for use with a carrier head of a substrate chemical mechanical polishing apparatus. The membrane comprises an outer surface providing a substrate receiving surface, wherein the outer surface has a central portion and an edge portion surrounding the central portion, wherein the central portion has a first surface roughness and the edge portion has a second surface roughness, the first surface roughness being greater than the second surface roughness.

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a spatially multi-focused laser beam laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

Abstract: Embodiments include systems and methods for determining a processing parameter of a processing operation utilizing micro resonator sensors. Some embodiments include a diagnostic substrate comprising a substrate, a circuit layer over the substrate, a cavity in the circuit layer, a capping layer over the circuit layer, a resonating body in or over the cavity, one or more electrodes in the cavity, and circuitry for driving and sensing the resonant frequency of the resonating body. In an embodiment, the circuitry comprises a biasing circuitry block configured to provide a bias voltage to the one or more electrodes, a frequency generator circuitry block configured to provide a signal with a varying frequency to the one or more electrodes, and a sensing circuitry block configured to detect a value correlated to oscillation of the resonating body.

Abstract: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.

Abstract: Methods of depositing metal films comprising exposing a substrate surface to a first metal precursor followed by a non-oxygen containing reducing agent comprising a second metal to form a zero-valent first metal film are described. The reducing agent has a metal center that is more electropositive than the metal center of the first metal precursor. In some embodiments, methods of depositing ruthenium films are described in which a substrate surface is exposed to a ruthenium precursor to form a ruthenium containing film on the substrate surface followed by exposure to a non-oxygen containing reducing agent to reduce the ruthenium containing film to a zero-valent ruthenium film and generate an oxidized form of the reducing agent.

Abstract: Exemplary methods of semiconductor processing may include treating a surface of a substrate with a hydrogen-containing precursor. The substrate may be disposed within a processing region of a semiconductor processing chamber. The methods may include contacting the substrate with a tungsten-containing precursor. The methods may include forming an initiation layer comprising tungsten on the substrate. The methods may include treating the initiation layer with a hydrogen-containing precursor. The methods may include forming a plasma of the tungsten-containing precursor and a carbon-containing precursor. Hydrogen in the plasma may be limited to hydrogen included in the carbon-containing precursor. The methods may include forming a tungsten-containing hardmask layer on the initiation layer.

Abstract: Exemplary methods of forming a semiconductor structure may include forming a first silicon oxide layer overlying a semiconductor substrate. The methods may include forming a first silicon layer overlying the first silicon oxide layer. The methods may include forming a silicon nitride layer overlying the first silicon layer. The methods may include forming a second silicon layer overlying the silicon nitride layer. The methods may include forming a second silicon oxide layer overlying the second silicon layer. The methods may include removing the silicon nitride layer. The methods may include removing the first silicon layer and the second silicon layer. The methods may include forming a metal layer between and contacting each of the first silicon oxide layer and the second silicon oxide layer.

Abstract: Exemplary semiconductor processing chambers may include an inlet manifold defining a central aperture. The inlet manifold may also define a first channel and a second channel, and each of the channels may extend through the inlet manifold radially outward of the central aperture. The chambers may also include a gasbox characterized by a first surface facing the inlet manifold and a second surface opposite the first. The gasbox may define a central aperture aligned with the central aperture of the inlet manifold. The gasbox may define a first annular channel in the first surface extending about the central aperture of the gasbox and fluidly coupled with the first channel of the inlet manifold. The gasbox may define a second annular channel extending radially outward of the first and fluidly coupled with the second channel of the inlet manifold. The second annular channel may be fluidly isolated from the first.

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

Abstract: Methods of controlling stress non-uniformity for semiconductor processing may include reflecting light off a surface of a wafer with an optical imaging device disposed within a cluster tool. The cluster tool may include a multi-chamber processing system. The methods may include collecting one or more color images of the surface of the wafer. The methods may include converting the one or more color images to sample stress intensity data comparing the sample stress intensity data to reference wafer stress intensity data. The methods may include identifying deviations of the sample stress intensity data relative to the reference wafer stress intensity data. The methods may include determining corrective actions for bringing the sample stress intensity data into conformity with the reference wafer stress intensity data. The methods may include implementing the corrective actions on the multi-chamber processing system.

Abstract: Silyl pseudohalides having a general formula of R4?nSiXn, where n is a range of 1-4, each R is independently selected from H, alkyl, alkenyl, aryl, amino, alkyl amino, alkoxide, and phosphine groups, and each X is a pseudohalide selected from nitrile, cyanate, isocyanate, thiocyanate, isothiocyanate, selenocyanate and isoselenocyanate are disclosed. Further, some embodiments of the disclosure provide methods for depositing silicon-containing films using silyl pseudohalides.

Abstract: A system may include a main line for delivering a first gas, and a sensor for measuring a concentration of a precursor in the first gas delivered through the main line. The system may further include first and second sublines for providing fluid access to first and second processing chambers, respectively. The first subline may include a first flow controller for controlling the first gas flowed through the first subline. The second subline may include a second flow controller for controlling the first gas flowed through the second subline. A delivery controller may be configured to control the first and second flow controllers based on the measured concentration of the precursor to deliver a first mixture of the first gas and a second gas and a second mixture of the first and second gases into the first and second semiconductor processing chambers, respectively.

Abstract: Methods of producing gratings with trenches having variable height are provided. In one example, a method of forming a diffracted optical element may include providing an optical grating layer over a substrate, patterning a hardmask over the optical grating layer, and forming a sacrificial layer over the hardmask, the sacrificial layer having a non-uniform height measured from a top surface of the optical grating layer. The method may further include etching a plurality of angled trenches into the optical grating layer to form an optical grating, wherein a first depth of a first trench of the plurality of trenches is different than a second depth of a second trench of the plurality of trenches.