Abstract: A magnet assembly for a magnetron of a processing chamber includes a support member. A plurality of magnetic tracks is mounted to the support member. Each magnetic track includes a pair of magnetic poles. A partial magnetic track is mounted to the support member. The partial magnetic track includes a single unpaired magnetic pole. The partial magnetic track is mounted proximal to a center of rotation of the support member.

Abstract: An apparatus comprises a flexible membrane for use with a carrier head of a substrate chemical mechanical polishing apparatus. The membrane comprises an outer surface providing a substrate receiving surface, wherein the outer surface has a central portion and an edge portion surrounding the central portion, wherein the central portion has a first surface roughness and the edge portion has a second surface roughness, the first surface roughness being greater than the second surface roughness.

Abstract: The present disclosure relates to heating a substrate in a rapid thermal processing (RTP) chamber. The chamber may contain a rotatable assembly configured to accommodate and rotate the substrate while a heat source inside the RTP chamber applies heat to the substrate. The rotatable assembly is partially disposed outside the RTP chamber. A seal may formed around the rotatable assembly and maintain a vacuum inside the RTP chamber while the rotatable assembly rotates. The rotatable assembly may configured to accommodate various-sized substrates.

Abstract: Exemplary processing methods may include i) providing one or more deposition precursors to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include one or more features defining one or more sidewalls. The methods may include ii) forming plasma effluents of the one or more deposition precursors. The methods may include iii) contacting the substrate with the plasma effluents of the one or more deposition precursors. The contacting may deposit a doped silicon-and-oxygen-containing material on the substrate. A first portion of the doped silicon-and-oxygen-containing material deposited on the one or more sidewalls of the one or more features may be characterized by a poorer film quality than a second portion of the doped silicon-and-oxygen-containing material deposited on a lower portion of the one or more features.

Abstract: Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor and depositing a silicon-containing material on the substrate. The methods may include providing a hydrogen-containing precursor to the processing region, forming plasma effluents of the hydrogen-containing precursor, and etching the silicon-containing material from a sidewall of the feature.

Abstract: Embodiments of the disclosure relate to methods of etching a copper material. In some embodiments, the copper material is exposed to a halide reactant to form a copper halide species. The substrate is then heated to remove the copper halide species. In some embodiments, the etching methods are performed at relatively low temperatures. Additional embodiments of the disclosure relate to methods of copper gapfill. In some embodiments, a copper material within a substrate feature is exposed to a halide reactant to form a copper halide species. The copper halide species is then heated and flowed to fill at least a portion of the substrate feature. The reflow methods are performed at lower temperatures than similar reflow methods without formation of the copper halide species.

Abstract: Exemplary processing methods may include providing a treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include a layer of a silicon-containing material. The methods may include forming inductively-coupled plasma effluents of the treatment precursor. The methods may include contacting the layer of the silicon-containing material with the inductively-coupled plasma effluents of the treatment precursor to produce a treated layer of the silicon-containing material. The contacting may reduce a dielectric constant of the layer of the silicon-containing material.

Abstract: Cooling flanges and semiconductor manufacturing processing chamber comprising the cooling flanges are disclosed. The cooling flanges comprise a flange body with a gas channel extending through the length thereof. The gas channel has an inlet funnel, a middle channel and an outlet funnel with a purge gas inlet in a side of the flange body. The purge gas inlet connects to the middle channel of the gas channel.

Abstract: A system for discharging a region of a sample, the system includes (i) illumination optics that is configured to discharge the region by illuminating the region of the sample with a laser pulse during an illumination iteration; and (ii) a timing circuit that is configured to trigger the illumination iteration to occur at a timing that is based on one or more timing constraints associated with a scanning of the region by an electron beam.

Abstract: Exemplary methods of semiconductor processing may include iteratively repeating a deposition cycle several times on a substrate disposed within a processing region of a semiconductor processing chamber. Each deposition cycle may include depositing a silicon-containing material on the substrate and exposing the silicon-containing material to a first oxygen plasma to convert the silicon-containing material to a silicon-and-oxygen-containing material. After the iterative repeating of the deposition cycle, the method may include performing a densification operation by exposing the silicon-and-oxygen-containing material to a second oxygen plasma to produce a densified silicon-and-oxygen-containing material where the quality of the densified silicon-and-oxygen-containing material is greater than the silicon-and-oxygen-containing material. The method may further include iteratively repeating the iteratively repeated deposition cycles and the densification operation several times.

Abstract: Methods of forming transistors, e.g., FinFETs, are described. A conformal liner layer is formed in a trench. A metal nitride material is introduced in regular or semi-regular intervals during a metal gap fill of a trench structure to prevent the formation of voids (air gaps) within the structure. The metal nitride material and the metal gap fill material may be deposited by atomic layer deposition methods.

Abstract: Methods of forming microelectronic devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include forming a hardmask on the dielectric layer; selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap and on the hardmask; treating the microelectronic device with a plasma to remove the self-assembled monolayer (SAM) from the hardmask; forming a barrier layer on the dielectric layer and on the hardmask; selectively depositing a metal liner on the barrier layer on the sidewall; and performing a gap fill process on the metal liner.

Abstract: Exemplary methods of semiconductor processing may include methods for nonconformally building up silicon-and-oxygen-containing material where the top of the feature preferentially fills at a slower rate as compared to the bottom of the feature. Such methods may include iterative nonconformal etching operations and/or iterative nonconformal inhibition operations. For example, after building up a layer comprising silicon-and-oxygen-containing material, the layer may be nonconformally etched before building up another layer comprising silicon-and-oxygen-containing material. In another example, in the building up of the layer, an inhibitor may be introduced preferentially at and near the top of the features to provide nonconformal buildup of the silicon-and-oxygen-containing material.

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

Abstract: Substrate support assembly and methods of making such substrate support assemblies are provided. Substrate support assemblies include an electrostatic chuck body defining a substrate support surface, a support stem coupled with the electrostatic chuck body, and an electrode embedded within the electrostatic chuck body. Substrate support surfaces exhibit a resistivity of 1×108 ?-cm to 1×1011 ?-cm at a temperature of greater than 650° C. Substrate support surfaces can include a composite ceramic material having a base dielectric material and a second dielectric material having an electrical resistivity at least about two times higher than an electrical resistivity of the base dielectric material at a temperature of greater than 650° C.

Abstract: Methods of forming devices comprise forming a dielectric material on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include passivating a metal material at a bottom of the gap with an alkyl reactant to form a passivation layer on the metal material, the gap defined by the bottom and sidewalls comprising the dielectric material with having a barrier layer thereon. A metal liner is selectively deposited on the barrier layer on the sidewall over the passivation layer on the bottom.

Abstract: An ion implantation system including an ion source for generating an ion beam, an end station for holding a substrate to be implanted by the ion beam, and a linear accelerator disposed between the ion source and the end station and adapted to accelerate the ion beam, the linear accelerator comprising at least one acceleration stage including a resonator coil coupled to a drift tube assembly, the drift tube assembly including a first drift tube coupled to a first end of a first insulting rod via interference fit, a second drift tube coupled to a first end of a second insulting rod via interference fit, and a mounting bracket coupled to a second end of the first insulting rod and to a second end of the second insulting rod via interference fit.

Abstract: Embodiments of the present disclosure are directed to selective etching processes. The processes include an etching chemistry (a plasma of a fluorine-containing precursor and a first gas mixture), and a passivating chemistry (a plasma of a sulfur-containing precursor and a second gas mixture). In some embodiments, the sulfur-containing precursor and the second gas mixture are present in a ratio of sulfur-containing precursor to second gas mixture in a range of from 0.01 to 5. The methods include etching a substrate having a plurality of alternating layers of silicon oxide and silicon nitride thereon and a trench formed through the plurality of alternating layers. The silicon nitride layers are selectively etched relative to the silicon oxide layers at an etch selectivity of greater than or equal to 500:1.

Abstract: A distribution unit of a particle detection system initiates a particle collection process to dislodge one or more surface particles from a surface of an article based on a stream including at least one of solid CO2 particles or CO2 droplets. The dislodged surface particles are collected on a surface of a substrate having a pre-determined initial state including initial surface particles of the substrate. A measurement indicating a particle number concentration of detectable surface particles on the substrate after the particle collection process is completed is obtained. An initial particle number concentration of the initial surface particles of the pre-determined initial state is identified. A number of particles transported away from the surface of the article is determined based on the obtained measurement and the identified initial particle concentration.

Abstract: Embodiments disclosed herein include a method of processing a substrate. In an embodiment, the method comprises detecting one or more substrate parameters of a substrate in a processing chamber, and heating the substrate to a first temperature with an open loop tuning (OLT) heating process based on the one or more substrate parameters. In an embodiment, the method may further comprise placing the substrate on an edge ring, and heating the substrate to a second temperature with a low temperature closed loop controller. In an embodiment, the method further comprises heating the substrate to a third temperature with a high temperature closed loop controller.