Abstract: A neural network is trained for use in a substrate thickness measurement system by obtaining ground truth thickness measurements of a top layer of a calibration substrate at a plurality of locations, each location at a defined position for a die being fabricated on the substrate. A plurality of color images of the calibration substrate are obtained, each color image corresponding to a region for a die being fabricated on the substrate. A neural network is trained to convert color images of die regions from an in-line substrate imager to thickness measurements for the top layer in the die region. The training is performed using training data that includes the plurality of color images and ground truth thickness measurements with each respective color image paired with a ground truth thickness measurement for the die region associated with the respective color image.

Abstract: Embodiments disclosed herein include a method of processing a substrate. In an embodiment, the method comprises detecting one or more substrate parameters of a substrate in a processing chamber, and heating the substrate to a first temperature with an open loop tuning (OLT) heating process based on the one or more substrate parameters. In an embodiment, the method may further comprise placing the substrate on an edge ring, and heating the substrate to a second temperature with a low temperature closed loop controller. In an embodiment, the method further comprises heating the substrate to a third temperature with a high temperature closed loop controller.

Abstract: Embodiments of the present disclosure generally relate to methods and systems for cleaning a surface of a substrate. In an embodiment, a method of processing a substrate is provided. The method includes introducing a substrate to a processing volume of a processing chamber by positioning the substrate on a substrate support. The method further includes flowing a first process gas into the processing volume, the first process gas comprising HF, flowing a second process gas into the processing volume, the second process gas comprising pyridine, pyrrole, aniline, or a combination thereof, and exposing the substrate to the first process gas and the second process gas to remove oxide from the substrate under oxide removal conditions. In another embodiment, a system is provided that includes a processing chamber to process a substrate, and a controller to cause a processing method to be performed in the processing chamber.

Abstract: Exemplary substrate processing systems may include a transfer region housing defining a transfer region fluidly coupled with a plurality of processing regions. A sidewall of the transfer region housing may define a sealable access for providing and receiving substrates. The systems may include a plurality of substrate supports disposed within the transfer region. The systems may also include a transfer apparatus having a central hub including a first shaft and a second shaft counter-rotatable with the first shaft. The transfer apparatus may include an eccentric hub extending at least partially through the central hub, and which is radially offset from a central axis of the central hub. The transfer apparatus may also include an end effector coupled with the eccentric hub. The end effector may include a plurality of arms having a number of arms equal to the number of substrate supports of the plurality of substrate supports.

Abstract: Implementations of the present disclosure relate to systems for abating F-gases present in the effluent of semiconductor manufacturing processes. In one implementation, a system is provided that includes a water and oxygen delivery system. The water and oxygen delivery system includes a water vapor reagent source fluidly coupled with a chamber foreline via a first conduit; and an oxygen reagent source fluidly coupled with the chamber foreline via a second conduit fluidly coupled with the first conduit. The system further includes a plasma source fluidly coupled with the water and oxygen delivery system via the chamber foreline.

Abstract: Examples of a substrate support are provided herein. In some examples, the substrate support has a ceramic electrostatic chuck having a body. The body has a first side configured to support a substrate and a second side opposite the first side. The body has a chucking electrode, an active edge electrode disposed adjacent the chucking electrode, a floating mesh disposed below the chucking electrode, a heater disposed below the floating mesh, and a ground mesh disposed below the heater, wherein the ground mesh is adjacent the second side.

Abstract: Disclosed herein are approaches for adjusting local refractive index for photonics IC systems using selective waveguide ion implantation. In one approach, a method may include depositing an optical device film atop a base layer, patterning the optical device film into a plurality of sections, and implanting a first section of the plurality of sections of the optical device film to adjust a refractive index of the first section.

Abstract: Process chamber lids, processing chambers and methods using the lids are described. In some embodiments, the lid includes a showerhead with a plurality of heater segments in a peripheral region thereof. The heated showerhead minimizes temperature non-uniformity and/or minimizes heat less near the peripheral edge of a processed wafer.

Abstract: Disclosed herein are approaches for in-situ verification and correction of a wafer position. In one approach, a method may include illuminating an underside of a platen positioned within a processing chamber, and detecting a perimeter edge of the platen using an imaging device positioned external to the processing chamber, above the platen. The method may further include determining, via a controller, position data for the platen based on the detected perimeter edge of the platen, and positioning a wafer atop the platen based on the position data of the platen, wherein the wafer comprises a positioning notch.

Abstract: A method of plating substrates may include receiving characteristics of a plating chamber and characteristics of a substrate to be placed in the plating chamber to be provided as inputs to a trained model. An inference operation using the trained model may be performed to generate a recipe for the plating chamber. The recipe may include characteristics of a forward plating current and characteristics of a reverse de-plating current that may be applied in order to add and remove metal to maintain co-planarity and pillar quality. The plating operation may be performed on the substrate using the recipe that was output from the trained model to cause a current to be applied to the plating liquid in the plating chamber to deposit a metal on exposed portions of the substrate, wherein the current comprises alternating cycles of the forward plating current; and the reverse de-plating current.

Abstract: A method may include receiving a beam profile function, derived from a beam density of an ion beam along a substrate plane, and generating a mirror function, based upon the beam profile function, wherein a sum of the mirror function and beam profile function generates a flat beam distribution. The method may include receiving a grid pattern for an electrode of an electrode assembly, the grid pattern comprising an array of hole locations, and calculating a normalized beam current as a function hole location for the array of hole locations. The method may further include generating an adjusted set of radii as a function of hole location for the array of hole locations based upon the mirror function and the normalized beam current, and generating an electrode assembly having an array of holes, based upon the grid pattern and the adjusted set of radii.

Abstract: A system includes an enclosure configured to couple to an equipment front end module (EFEM) of a substrate processing system, a charging assembly, and one or more support structures within the enclosure. The one or more support structures are configured to support a validation wafer in a charging position to charge the validation wafer via the charging assembly.

Abstract: A processing chamber includes a chamber body defining an interior volume and including an access port. A cathode assembly is configured to generate a plasma within the interior volume. A chamber liner includes one or more inner notch structures to engage with one or more components of the chamber body. The chamber liner is configured to move between a loading position and an operation position. When the chamber liner is in the loading position, the interior volume is accessible by the access port. When the chamber liner is in the operation position, the chamber liner at least partially encloses the interior volume.

Abstract: An organic light-emitting diode (OLED) deposition system has a workpiece transport system configured to position a workpiece within the OLED deposition system under vacuum conditions, a deposition chamber configured to deposit a first layer of organic material onto the workpiece, a metrology system having one or more sensors measure of the workpiece after deposition in the deposition chamber, and a control system to control a deposition of the layer of organic material onto the workpiece. The metrology system includes a digital holographic microscope positioned to receive light from the workpiece and generate a thickness profile measurement of a layer on the workpiece. The control system is configured to adjust processing of a subsequent workpiece at the deposition chamber or adjust processing of the workpiece at a subsequent deposition chamber based on the thickness profile.

Abstract: A process kit enclosure system includes surfaces to enclose an interior volume, a first support structure including first fins, a second support structure including second fins, and a front interface to interface the process kit enclosure system with a load port of a wafer processing system. The first and second fins are sized and spaced to hold process kit ring carriers and process kit rings in the interior volume. Each of the process kit rings is secured to one of the process kit ring carriers. The process kit enclosure system enables first automated transfer of a first process kit ring carrier securing a first process kit ring from the process kit enclosure system into the wafer processing system and second automated transfer of a second process kit ring carrier securing a second process kit ring from the wafer processing system into the process kit enclosure system.

Abstract: Embodiments disclosed herein include a sensor assembly. In an embodiment, the sensor assembly comprises a sensor module and a housing assembly. In an embodiment, the sensor module comprises a substrate, a capacitor with a first electrode and a second electrode on the substrate, and a capacitive-to-digital converter (CDC) electrically coupled to the first electrode and the second electrode. In an embodiment, the housing assembly is attached to the sensor module and comprises a shaft, wherein the shaft is hollow, and a cap over a first end of the shaft, wherein the cap has an opening to expose the capacitor.

Abstract: A method for processing a substrate within a processing chamber comprises receiving a first radiation signal corresponding to a film on a target element disposed within the processing chamber, analyzing the first radiation signal, and controlling the processing of the substrate based on the analyzed first radiation signal. The processing chamber includes a substrate support configured to support the substrate within a processing volume and a controller coupled to a first sensing device configured to receive the first radiation signal.

Abstract: A substrate processing system for processing of a plurality of substrates is described. The system includes a first deposition module being a first in-line module and having a first plurality of vacuum deposition sources; a second deposition module being a second in-line module and having a second plurality of vacuum deposition sources; and a glass handling module between the first deposition module and the second deposition module.

Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for semiconductor processing, more particularly, to a thermal process chamber. The thermal process chamber includes a substrate support, a first plurality of heating elements disposed over or below the substrate support, and a spot heating module disposed over the substrate support. The spot heating module is utilized to provide local heating of cold regions on a substrate disposed on the substrate support during processing. Localized heating of the substrate improves temperature profile, which in turn improves deposition uniformity.

Abstract: A plasma doping system including a plasma doping chamber, a platen mounted in the plasma doping chamber for supporting a workpiece, a source of ionizable gas coupled to the chamber, the ionizable gas containing a desired dopant for implantation into the workpiece, a plasma source for producing a plasma having a plasma sheath in a vicinity of the workpiece, the plasma containing positive ions of the ionizable gas, and accelerating said positive ions across the plasma sheath toward the platen for implantation into the workpiece, a shield ring surrounding the platen and adapted to extend the plasma sheath beyond an edge of the workpiece, and a cover ring disposed on top of the shield ring and adapted to mitigate sputtering of the shield ring, wherein the cover ring comprises a crystalline base layer and a non-crystalline top layer.