Patents Assigned to Applied Material
  • Patent number: 7125758
    Abstract: We have developed a method of PECVD depositing a-SiNx:H films which are useful in a TFT device as gate dielectric and passivation layers, when a series of TFT devices are arrayed over a substrate having a surface area larger than about 1 m2, which may be in the range of about 4.1 m2, and even as large as 9 m2. The a-SiNx:H films provide a uniformity of film thickness and uniformity of film properties, including chemical composition, which are necessary over such large substrate surface areas. The films produced by the method are useful for both liquid crystal active matrix displays and for organic light emitting diode control.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: October 24, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Tae Kyung Won, Gaku Furuta, Qunhua Wang, John M. White, Beom Soo Park
  • Patent number: 7127367
    Abstract: Method and apparatus for obtaining a tailored heat transfer profile in a chamber housing a microprocessor manufacturing process, including estimating heat transfer properties of the chamber; estimating heat absorptive properties of a wafer; adjusting the physical characteristics of the chamber to correct the heat transfer properties; and utilizing the chamber for manufacturing microprocessors.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: October 24, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Balasubramanian Ramachandran, Joseph Michael Ranish, Ravi Jallepally, Sundar Ramamurthy, Raman Achutharaman, Brian Haas, Aaron Hunter
  • Publication number: 20060234514
    Abstract: A method of processing a semiconductor workpiece. The method includes flowing a process gas to a semiconductor workpiece through a first plurality of orifices positioned in a gas distribution faceplate. The method also includes removing gas from over the semiconductor workpiece through a chamber exhaust port and a second plurality of orifices positioned in the gas distribution faceplate.
    Type: Application
    Filed: June 13, 2006
    Publication date: October 19, 2006
    Applicant: Applied Materials, Inc.
    Inventors: Steven Gianoulakis, Karthik Janakiraman
  • Patent number: 7122962
    Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: October 17, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kam S. Law, Quanyuan Shang, Takako Takehara, Taekyung Won, William R. Harshbarger, Dan Maydan
  • Patent number: 7122125
    Abstract: An integrated etch process, for example as used for etching an anti-reflection layer and an underlying aluminum layer, in which the chamber wall polymerization is controlled by coating polymer onto the sidewall by a plasma deposition process prior to inserting the wafer into the chamber, etching the structure, and after removing the wafer from the chamber, plasma cleaning the polymer from the chamber wall. The process is process is particularly useful when the etching is performed in a multi-step process and the polymer is used for passivating the etched structure, for example, a sidewall in an etched structure and in which the first etching step deposits polymer and the second etching step removes polymer. The controlled polymerization eliminates interactions of the etching with the chamber wall material, produces repeatable results between wafers, and eliminates in the etching plasma instabilities associated with changing wall conditions.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: October 17, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Shashank C. Deshmukh, Thorsten B. Lill
  • Patent number: 7122454
    Abstract: A method is provided wherein a gate dielectric film that is plasma nitrided in a chamber of one system is subsequently heated or “annealed” in another chamber of the same system. Processing delay can be controlled so that all wafers processed in the system experience similar nitrogen content.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: October 17, 2006
    Assignee: Applied Materials, Inc.
    Inventor: Christopher S. Olsen
  • Publication number: 20060228886
    Abstract: A deposition/etching/deposition process is provided for filling a gap in a surface of a substrate. A liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant. The detection of such reaction products thus indicates that the portion of the film deposited during the first etching has been removed to an extent that further exposure to the etchant may remove the liner and expose underlying structures. Accordingly, the etching is stopped upon detection of distinctive reaction products and the next deposition in the deposition/etching/deposition process is begun.
    Type: Application
    Filed: June 5, 2006
    Publication date: October 12, 2006
    Applicant: Applied Materials, Inc.
    Inventors: Lin Zhang, Xiaolin Chen, DongQing Li, Thanh Pham, Farhad Moghadam, Zhuang Li, Padmanabhan Krishnaraj
  • Publication number: 20060228818
    Abstract: A retuning process particularly useful with an Ar/H2 smoothing anneal by rapid thermal processing (RTP) of a silicon-on-insulator (SOI) wafer performed after cleavage. The smoothing anneal or other process is optimized including a radial temperature profile accounting for the edge ring and exclusion zone and the vertically structured SOI stack or other wafer gross structure. The optimized smoothing conditions are used to oxidize a bare silicon wafer and a reference thickness profile obtained from it is archived. After extended processing of complexly patterned production wafers, another bare wafer is oxidized and its monitor profile is compared to the reference profile, and the production process is adjusted accordingly. In another aspect, a jet of cooling gas is preferentially directed to the edge ring and peripheral portions of the supported SOI wafer to cool them relative to the inner wafer portions.
    Type: Application
    Filed: March 14, 2006
    Publication date: October 12, 2006
    Applicant: Applied Materials, Inc.
    Inventors: Juan Chacin, Sairaju Tallavajula, Sundar Ramamurthy
  • Publication number: 20060225648
    Abstract: High flows of low-mass fluent gases are used in an HDP-CVD process for gapfill deposition of a silicon oxide film. An enhanced turbomolecular pump that provides a large compression ratio for such low-mass fluent gases permits pressures to be maintained at relatively low levels in a substrate processing chamber, thereby improving the gapfill characteristics.
    Type: Application
    Filed: June 5, 2006
    Publication date: October 12, 2006
    Applicant: Applied Materials, Inc.
    Inventors: Muhammad Rasheed, Steven Kim
  • Patent number: 7118457
    Abstract: A method of forming a polishing pad with a polishing layer having a polishing surface and a back surface. A plurality of grooves are formed on the polishing surface, and an indentation is formed in the back surface of the polishing layer. A region on the polishing surface corresponding to the indentation in the back surface is free of grooves or has shallower grooves.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 10, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Boguslaw A. Swedek, Manoocher Birang
  • Patent number: 7118450
    Abstract: The polishing pad for a chemical mechanical polishing apparatus, and a method of making the same. The polishing pad has a covering layer with a polishing surface and a backing layer which is adjacent to the platen. A first opening in the covering layer with a first cross-sectional area and a second opening in the backing layer with a second, different cross-sectional area form an aperture through the polishing pad. A substantially transparent polyurethane plug is positioned in the aperture, and an adhesive material fixes the plug in the aperture.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: October 10, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Manoocher Birang, Allan Gleason, William L. Guthrie
  • Patent number: 7119571
    Abstract: A flexible semiconductor test structure that may be incorporated into a semiconductor device is provided. The test structure may include a plurality of test pads designed to physically stress conductive lines to which they are attached during thermal cycling. By utilizing test pads with different dimensions (lengths and/or widths), the effects of thermal stress generated by a plurality of conductive lines having corresponding different dimensions may be simulated.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 10, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Naomi Yoshida, Toshiyuki Nagata
  • Patent number: 7119016
    Abstract: A compound that includes at least Si, N and C in any combination, such as compounds of formula (R—NH)4-nSiXn wherein R is an alkyl group (which may be the same or different), n is 1, 2 or 3, and X is H or halogen (such as, e.g., bis-tertiary butyl amino silane (BTBAS)), may be mixed with silane or a silane derivative to produce a film. A polysilicon silicon film may be grown by mixing silane (SiH4) or a silane derviative and a compound including Si, N and C, such as BTBAS. Films controllably doped with carbon and/or nitrogen (such as layered films) may be grown by varying the reagents and conditions.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: October 10, 2006
    Assignees: International Business Machines Corporation, Applied Materials, Inc.
    Inventors: Ashima B. Chakravarti, Anita Madan, Woo-Hyeong Lee, Gregory Wayne Dibello, Ramaseshan Suryanarayanan Iyer
  • Patent number: 7120553
    Abstract: A method of measuring a physical characteristic of a patterned substrate comprises determining a wavelength where a first reflectance from a patterned substrate equals a second reflectance from the patterned substrate. The first and second reflectances are generated from substrate regions having different pattern densities. A physical characteristic value that is associated with the determined wavelength is identified. The value identification may be done by looking up the determined wavelength in a database, for example by referring to a graph.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: October 10, 2006
    Assignee: Applied Materials, Inc.
    Inventor: Dominic J. Benvegnu
  • Publication number: 20060219169
    Abstract: A method of operating a substrate processing chamber that includes, prior to a substrate processing operation, flowing a seasoning gas comprising silane and oxygen into said chamber at a flow ratio of greater than or equal to about 1.6:1 oxygen to silane to deposit a silicon oxide film over at least one aluminum nitride nozzle exposed to an interior portion of the chamber. Also, a substrate processing system that includes a housing, a gas delivery system for introducing a seasoning gas into a vacuum chamber, where the gas delivery system comprises one or more aluminum nitride nozzles exposed to the vacuum chamber, a controller and a memory having a program having instructions for controlling the gas delivery system to flow a seasoning gas that has an oxygen to silane ratio greater than or equal to about 1.6:1 to deposit a silicon oxide film on the aluminum nitride nozzles.
    Type: Application
    Filed: June 7, 2006
    Publication date: October 5, 2006
    Applicant: Applied Materials, Inc.
    Inventors: Xiaolin Chen, Jason Bloking
  • Publication number: 20060219174
    Abstract: A method of forming a cap layer over a dielectric layer on a substrate including forming a plasma from a process gas including oxygen and tetraethoxysilane, and depositing the cap layer on the dielectric layer, where the cap layer comprises a thickness of about 600 ? or less, and a compressive stress of about 200 MPa or more. Also, a method of forming a cap layer over a dielectric layer on a substrate including forming a process gas by flowing together about 200 mgm to about 8000 mgm of tetraethoxysilane, about 2000 to about 20000 sccm of oxygen (O2), and about 2000 sccm to about 20000 sccm of carrier gas, generating a plasma from the process gas, where one or more RF generators supply about 50 watts to about 100 watts of low frequency RF power to the plasma, and about 100 watts to about 600 watts of high frequency RF power to the plasma, and depositing the cap layer on the dielectric layer.
    Type: Application
    Filed: June 12, 2006
    Publication date: October 5, 2006
    Applicant: Applied Materials, Inc.
    Inventors: Vu Nguyen, Bok Kim, Kang Yim
  • Patent number: 7115494
    Abstract: A method and system to reduce the resistance of refractory metal layers by controlling the presence of fluorine contained therein. The present invention is based upon the discovery that when employing ALD techniques to form refractory metal layers on a substrate, the carrier gas employed impacts the presence of fluorine in the resulting layer. As a result, the method features chemisorbing, onto the substrate, alternating monolayers of a first compound and a second compound, with the second compound having fluorine atoms associated therewith, with each of the first and second compounds being introduced into the processing chamber along with a carrier gas to control a quantity of the fluorine atoms associated with the monolayer of the second compound.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: October 3, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Ashok Sinha, Ming Xi, Moris Kori, Alfred W. Mak, Jeong Soo Byun, Lawrence Chung-Lai Lei, Hua Chung
  • Patent number: 7115516
    Abstract: A method of layer formation on a substrate with high aspect ratio features is disclosed. The layer is formed from a gas mixture comprising one or more process gases and one or more etch species. The one or more process gases react to deposit a material layer on the substrate. In conjunction with the material layer deposition, the etch species selectively remove portions of the deposited material layer adjacent to high aspect ratio feature openings, filling such features in a void-free and/or seam-free manner. The material layer may be deposited on the substrate using physical vapor deposition (PVD) and/or chemical vapor deposition (CVD) techniques.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: October 3, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Liang-Yuh Chen, Daniel A. Carl, Israel Beinglass
  • Patent number: 7117064
    Abstract: A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide layer has a compressibility that varies as a function of the amount of dopant present in the gas mixture during later formation.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: October 3, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas D Nemani, Li-Qun Xia, Dian Sugiarto, Ellie Yieh, Ping Xu, Francimar Campana-Schmitt, Jia Lee
  • Patent number: 7115890
    Abstract: Apparatus for optical inspection of a sample includes a detector assembly, which is configured to receive radiation from a focal area on the sample, and a translation mechanism, which is operative to impart motion to at least one of the detector assembly and the sample so that the focal area of the detector assembly translates over the sample along a translation path. A height sensor is positioned in a known location relative to the detector assembly so as to measure a height of the height sensor relative to a point on the sample that is ahead of the focal area by a predetermined distance along the translation path. A controller is adapted to determine an estimated height of the detector assembly, responsively to the height measured by the height sensor along the translation path.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: October 3, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Gal Amar, Avishay Guetta, Doron Shoham, Gilad Schwartz, Ronen Eynat