Patents Assigned to Applied Material
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Patent number: 7101254Abstract: A system includes a measuring station for positioning an eddy current probe proximate to a substrate in a substrate holder. The probe can produce a time-varying magnetic field, in order to induce eddy currents in one or more conductive regions of a substrate either prior to or subsequent to polishing. The eddy current signals are detected, and may be used to update one or more polishing parameters for a chemical mechanical polishing system. The substrate holder may be located in a number places; for example, in a substrate transfer system, a factory interface module, a cleaner, or in a portion of the chemical mechanical polishing system away from the polishing stations. Additional probes may be used.Type: GrantFiled: October 15, 2004Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Boguslaw A Swedek, Nils Johansson, Andreas Norbert Wiswesser, Manoocher Birang
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Patent number: 7103079Abstract: A circuit for generating a clock or sampling signal, the circuit including: a semiconductor quantum dot laser element including a region of quantum dots, wherein the region of quantum dots is characterized by an emission distribution having a half-width of at least about 10 meV; and drive circuitry connected to the quantum dot laser element for operating the quantum dot laser element as a mode-locked laser that outputs a periodic, uniformly spaced sequence of pulses, wherein the clock or sampling signal is derived from the sequence of pulses.Type: GrantFiled: June 28, 2004Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: John G. McInerney, Gregory L. Wojcik, Lawrence C. West
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Patent number: 7101252Abstract: A chemical mechanical polishing method for polishing an oxide film and a protective film formed on a substrate having recesses comprises four steps. The first step planarizes the oxide film using a polishing pad and a polishing agent containing cerium oxide particles by causing relative rotational motion between the substrate and the polishing pad. The second step continues polishing the oxide film to maintain the planarized property of the oxide film. The third step polishes the oxide film until at least a portion of the protective film becomes exposed. The fourth step polishes the oxide film until the oxide film is substantially removed and the protective film is substantially exposed. During the four steps, torque values are measured on the substrate or the polishing pad, and changes in torque with time are calculated. This information is used to determine the status of each of the steps during the polishing run.Type: GrantFiled: April 25, 2003Date of Patent: September 5, 2006Assignee: Applied MaterialsInventors: Tomohiko Kitajima, Gen Yasuhara
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Patent number: 7101261Abstract: A wafer polishing head utilizes a wafer backing member having a wafer facing pocket which is sealed against the wafer and is pressurized with air or other fluid to provide a uniform force distribution pattern across the width of the wafer inside an edge seal feature at the perimeter of the wafer to urge (or press) the wafer uniformly toward a polishing pad. Wafer polishing is carried out uniformly without variations in the amount of wafer material across the usable area of the wafer. A frictional force between the seal feature of the backing member and the surface of the wafer transfers rotational movement of the head to the wafer during polishing. A pressure controlled bellows supports and presses the wafer backing member toward the polishing pad and accommodates any dimensional variation between the polishing head and the polishing pad as the polishing head is moved relative to the polishing pad.Type: GrantFiled: October 16, 2003Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Norman Shendon, Michael Sherwood, Harry Lee
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Patent number: 7101272Abstract: Systems and apparatus providing a carrier head for chemical mechanical polishing are described. The carrier head includes a base, a support structure attached to the base, a retaining structure attached to the base, and a connector attached to the base and the retaining structure. The support structure includes a receiving surface for contacting a substrate. The retaining structure prevents the substrate from moving along the receiving surface. The base and the retaining structure can thermally expand at different rates of expansion without causing distortion to one another.Type: GrantFiled: January 15, 2005Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Hung Chih Chen, Steven M. Zuniga
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Patent number: 7101273Abstract: A carrier head includes a housing connectable to a drive shaft to rotate therewith, a lower assembly having a substrate mounting surface, and a gimbal mechanism that connects the housing to the lower assembly to permit the lower assembly to pivot with respect to the housing about an axis substantially parallel to the polishing surface. The gimbal mechanism includes a shaft having an upper end slidably disposed in a vertical passage in a vertical passage in the housing, and a lower member that connects a lower end of the shaft to the lower assembly. The lower member bends to permit the base to pivot with respect to the housing. The shaft and the lower member are a unitary body.Type: GrantFiled: September 28, 2005Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Ming-Kuei Tseng, Steven M. Zuniga
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Patent number: 7101795Abstract: A method and system to form a refractory metal layer on a substrate features nucleating a substrate using sequential deposition techniques in which the substrate is serially exposed to first and second reactive gases followed by forming a layer, employing vapor deposition, to subject the nucleation layer to a bulk deposition of a compound contained in one of the first and second reactive gases.Type: GrantFiled: October 3, 2000Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Ming Xi, Ashok Sinha, Moris Kori, Alfred W. Mak, Xinliang Lu, Ken Kaung Lai, Karl A. Littau
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Patent number: 7101799Abstract: A method, apparatus and medium of conditioning a planarizing surface includes installing a wafer to be polished in a chemical mechanical polishing (CMP) apparatus having a polishing pad and a conditioning disk, polishing the wafer under a first set of pad conditioning parameters selected to maintain wafer material removal rates with preselected minimum and maximum removal rates, determining a wafer material removal rate occurring during the polishing step, calculating updated pad conditioning parameters to maintain wafer material removal rates within the maximum and minimum removal rates, and conditioning the polishing pad using the updated pad conditioning parameters, wherein the updated pad conditioning parameters are calculated using a pad wear and conditioning model that predicts the wafer material removal rate of the polishing pad based upon pad conditioning parameters, such as the conditioning down force and rotational speed of the conditioning disk.Type: GrantFiled: November 30, 2001Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventor: Young Joseph Paik
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Patent number: 7101251Abstract: A computer program product for process control in chemical mechanical polishing is described. The product includes instructions to cause a processor to receive a measurement of an initial pre-polishing thickness of a layer of a substrate from a metrology station, determine a value for a parameter of an endpoint algorithm from the initial thickness of the substrate, receive a monitoring signal generated from monitoring in-situ polishing of the substrate, process the monitoring signal to detect a signal feature indicating a final or intermediate endpoint and send instructions to stop polishing when an endpoint criterion is detected using the endpoint algorithm with the determined value for the parameter.Type: GrantFiled: June 23, 2005Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Boguslaw A. Swedek, Bret W. Adams, Sanjay Rajaram, David A. Chan, Manoocher Birang
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Patent number: 7101253Abstract: A load cup for transferring a substrate in a chemical mechanical polishing system is provided. In one embodiment, a load cup for transferring substrates in a chemical mechanical polishing system includes a substrate support having a first side adapted to support a substrate thereon and at least one actuator coupled to the substrate support and adapted to move the substrate support laterally. In another embodiment, a method for transferring a substrate between a polishing head and a load cup includes sensing a position of the polishing head relative to the load cup and automatically aligning the load cup and polishing head in response to the sensed relative position.Type: GrantFiled: July 16, 2003Date of Patent: September 5, 2006Assignee: Applied Materials Inc.Inventor: Donald J. K. Olgado
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Patent number: 7101725Abstract: A method of fabricating on optical detector, the method including providing a substrate that includes an optical waveguide formed therein and having a surface for fabricating microelectronic circuitry thereon; fabricating microelectronic circuitry on the substrate, the fabricating involving a plurality of sequential process phases; after a selected one of the plurality of sequential process phases has occurred and before the next process phase after the selected one of the plurality of process phases begins, fabricating an optical detector within the optical waveguide; and after fabricating the optical detector in the waveguide, completing the plurality of sequential process phases for fabricating the microelectronic circuitry.Type: GrantFiled: July 22, 2004Date of Patent: September 5, 2006Assignee: Applied Materials, Inc.Inventors: Yuichi Wada, Francisco A. Leon
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Publication number: 20060191478Abstract: The present invention is directed to the design of a plasma CVD chamber which provides more uniform conditions for forming thin CVD films on a substrate. In one embodiment, an apparatus for processing semiconductor substrates comprises a chamber defining a plasma processing region therein. The chamber includes a bottom, a side wall, and a dome disposed on top of the side wall. The dome has a dome top and having a side portion defining a chamber diameter. A top RF coil is disposed above the dome top. A side RF coil is disposed adjacent the side portion of the dome. The side RF coil is spaced from the top RF coil by a coil separation. A ratio of the coil separation to the chamber diameter is typically at least about 0.15, more desirably about 0.2-0.25.Type: ApplicationFiled: April 27, 2006Publication date: August 31, 2006Applicant: Applied Materials, Inc.Inventors: Sudhir Gondhalekar, Tom Cho, Rolf Guenther, Shigeru Takehiro, Masayoshi Nohira, Tetsuya Ishikawa, Ndanka Mukuti
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Publication number: 20060195214Abstract: A method, system and medium is provided for enabling improved control systems. An error, or deviation from a target result, is observed for example during manufacture of semiconductor chips. The error within standard deviation is caused by two components: a white noise component and a signal component (such as systematic errors). The white noise component is, e.g., random noise and therefore is relatively non-controllable. The systematic error component, in contrast, may be controlled by changing the control parameters. A ratio between the two components is calculated autoregressively. Based on the ratio and using the observed or measured error, the actual value of the error caused by the systematic component is calculated utilizing an autoregressive stochastic sequence. The actual value of the error is then used in determining when and how to change the control parameters.Type: ApplicationFiled: April 6, 2006Publication date: August 31, 2006Applicant: Applied Materials, Inc.Inventor: Young Paik
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Publication number: 20060192150Abstract: Embodiments in accordance with the present invention relate to a number of techniques, which may be applied alone or in combination, to reduce charge damage of substrates exposed to electron beam radiation. In one embodiment, charge damage is reduced by establishing a robust electrical connection between the exposed substrate and ground. In another embodiment, charge damage is reduced by modifying the sequence of steps for activating and deactivating the electron beam source to reduce the accumulation of charge on the substrate. In still another embodiment, a plasma is struck in the chamber containing the e-beam treated substrate, thereby removing accumulated charge from the substrate. In a further embodiment of the present invention, the voltage of the anode of the e-beam source is reduced in magnitude to account for differences in electron conversion efficiency exhibited by different cathode materials.Type: ApplicationFiled: April 27, 2006Publication date: August 31, 2006Applicant: Applied Materials, Inc.Inventors: Alexandros Demos, Khaled Elsheref, Yuri Trachuk, Tom Cho, Girish Dixit, Hichem M'Saad, Derek Witty
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Patent number: 7097744Abstract: In one embodiment, a target alignment surface disposed on a target support mechanically engages a darkspace shield alignment surface disposed on a darkspace shield as the target is lodged into a chamber body. The respective alignment surfaces are shaped and positioned so that the darkspace shield is physically moved to a desired aligned position as the alignment surfaces engage each other. In this manner a darkspace shield may be directly aligned to a target within a semiconductor fabrication chamber to provide a suitable darkspace gap between the target and the darkspace shield.Type: GrantFiled: June 12, 2003Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Alan Barry Liu, Marc O. Schweitzer, James Stephen Van Gogh, Michael Rosenstein, Jennifer L. Watia, Xinyu Zhang, Yoichiro Tanaka, John C. Forster, Anthony Chen
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Patent number: 7097537Abstract: A chemical mechanical polishing apparatus and method can use an in-situ monitoring system. A measurement of a position of a carrier head and a sinusoidal first function can be used to define a second function that associates measurements from the series with positions on the substrate. For each measurement in a series from the in-situ monitoring system, the second function can be used to determine a position on the substrate where the measurement was taken. In addition, a measurement of the position of the carrier head, a time when the measurement of the substrate property is made, and a phase correction representing lag resulting from a processing delay in generating the measurement of the position of the carrier head can be used in determining a position on the substrate where a measurement of a substrate property was taken.Type: GrantFiled: August 18, 2004Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Jeffrey Drue David, Nils Johansson, Manoocher Birang, Boguslaw A. Swedek, Ingemar Carlsson
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Patent number: 7098468Abstract: A method for writing a master image on a substrate includes dividing the master image into a matrix of frames, each frame including an array of pixels defining a respective frame image in a respective frame position within the master image. An electron beam is scanned in a raster pattern over the substrate, while shaping the electron beam responsively to the respective frame image of each of the frames as the electron beam is scanned over the respective frame position, so that in each frame, the electron beam simultaneously writes a multiplicity of the pixels onto the substrate.Type: GrantFiled: September 11, 2003Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Meir Aloni, Mula Friedman, Jimmy Vishnipolsky, Gilad Almogy, Alon Litman, Yonatah Lehman, Doron Meshulach, Ehud Tirosh
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Patent number: 7097544Abstract: An apparatus and associated methods for polishing semiconductor wafers and other workpieces that includes polishing surfaces located at multiple polishing stations. Multiple wafer heads, preferably at least one greater in number than the number of polishing stations, can be loaded with individual wafers. The wafer heads are suspended from a rotatable support, which provides circumferential positioning of the heads relative to the polishing surfaces, and the wafer heads move linearly with respect to the polishing surface, thus providing relative linear motion between the wafer and the polishing station. A load/unload station may be located at a position symmetric with the polishing surfaces. The rotatable support can simultaneously position one of the heads over the load/unload station while the remaining heads are located over polishing stations for wafer polishing so that loading and unloading of wafers can be performed concurrently with wafer polishing.Type: GrantFiled: February 18, 2000Date of Patent: August 29, 2006Assignee: Applied Materials Inc.Inventors: Robert D. Tolles, Norm Shendon, Sasson Somekh, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee
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Patent number: 7097716Abstract: A method of cleaning a plasma etching reactor is provided. The method of cleaning a plasma etching reactor includes generating one or more plasmas from oxygen gas and a hydrogen-containing gas, and exposing interior surfaces of the reactor to the plasma(s) from the oxygen-gas and the hydrogen-containing gas. The cleaning method is used to remove deposited material, such as deposits containing fluorine, carbon, oxygen, and hydrogen from interior surfaces of the reactor. The hydrogen-containing gas may contribute to the cleaning method by providing a source of hydrogen that removes fluorine from the surfaces of the reactor.Type: GrantFiled: October 17, 2002Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Michael Barnes, Huong Thanh Nguyen
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Patent number: 7097886Abstract: A method of depositing an insulating film over a substrate having a gap formed between two adjacent raised features. The method includes depositing one portion of the insulating film over the substrate and in the gap using a high density plasma process that has simultaneous deposition and sputtering components and depositing another portion of the insulating film over the substrate and in the gap using an atomic layer deposition process. In some embodiments the portion of the film deposited by an atomic layer deposition process is deposited over the portion of the film deposited using a high density plasma CVD technique. In other embodiments, the portion of the film deposited by a high density plasma CVD process is deposited over the portion of the film deposited using an atomic layer deposition process.Type: GrantFiled: December 13, 2002Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Farhad K. Moghadam, Michael S. Cox, Padmanabhan Krishnaraj, Thanh N. Pham, Zhenjiang Cui