Patents Assigned to Applied Material
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Patent number: 7097534Abstract: A method of controlling a chemical mechanical polishing system in which an inner tolerance, an outer tolerance and a specification tolerance limit are received by a control system. The user selects one of the inner tolerance and the outer tolerance, and the user selects a polishing machine procedure for the selected tolerance. A first substrate is polished with the chemical mechanical polishing system, and a thickness of at least one layer in the substrate is measured at an in-line metrology station. If the measured thickness exceeds the selected tolerance, the selected procedure is performed.Type: GrantFiled: July 10, 2001Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Arkadiy Yampolskiy, Masoud Aslan
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Patent number: 7094685Abstract: Embodiments of the invention generally relate to an apparatus and method of integration of titanium and titanium nitride layers. One embodiment includes providing one or more cycles of a first set of compounds such as a titanium precursor and a reductant, providing one or more cycles of a second set of compounds such as the titanium precursor and a silicon precursor and providing one or more cycles of a third set of compounds such as the titanium precursor and a nitrogen precursor. Another embodiment includes depositing a titanium layer on a substrate, depositing a passivation layer containing titanium silicide, titanium silicon nitride or combinations thereof over the titanium layer and subsequently depositing a titanium nitride layer over the passivation layer. Still another embodiment comprises depositing a titanium layer on a substrate, soaking the titanium layer with a silicon precursor and subsequently depositing a titanium nitride layer thereon.Type: GrantFiled: June 13, 2005Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Michael X. Yang, Toshio Itoh, Ming Xi
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Patent number: 7094316Abstract: A plasma reactor for processing a workpiece, including an enclosure defining a vacuum chamber, a workpiece support within the enclosure facing an overlying portion of the enclosure, the enclosure having at least first and second openings therethrough near generally opposite sides of the workpiece support. At least one hollow conduit is connected to the first and second openings. A closed torroidal path is provided through the conduit and extending between the first and second openings across the wafer surface. A process gas supply is coupled to the interior of the chamber for supplying process gas to the torroidal path. A coil antenna is coupled to an RF power source and inductively, coupled to the interior of the hollow conduit and capable of maintaining a plasma in the torroidal path.Type: GrantFiled: August 11, 2000Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Hiroji Hanawa, Kenneth S Collins, Kartik Ramaswamy, Andrew Nguyen, Tsutomu Tanaka, Yan Ye
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Patent number: 7094704Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.Type: GrantFiled: May 9, 2002Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
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Patent number: 7094680Abstract: A method of forming a tantalum nitride layer for integrated circuit fabrication is disclosed. In one embodiment, the method includes forming a tantalum nitride layer by chemisorbing a tantalum precursor and a nitrogen precursor on a substrate disposed in a process chamber. A nitrogen concentration of the tantalum nitride layer is reduced by exposing the substrate to a plasma annealing process. A metal-containing layer is then deposited on the tantalum nitride layer by a deposition process.Type: GrantFiled: March 23, 2005Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Sean M. Seutter, Michael X. Yang, Ming Xi
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Patent number: 7094670Abstract: A method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber, includes placing the workpiece on a workpiece support in the chamber, controlling a temperature of the wafer support near a constant level, performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma while minimizing deposition and minimizing etching by holding the temperature of the workpiece within a temperature range that is above a workpiece deposition threshold temperature and below a workpiece etch threshold temperature.Type: GrantFiled: January 28, 2005Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo
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Patent number: 7094442Abstract: A method is provided for forming an amorphous carbon layer, deposited on a dielectric material such as oxide, nitride, silicon carbide, carbon doped oxide, etc., or a metal layer such as tungsten, aluminum or poly-silicon. The method includes the use of chamber seasoning, variable thickness of seasoning film, wider spacing, variable process gas flows, post-deposition purge with inert gas, and post-deposition plasma purge, among others, to make the deposition of an amorphous carbon film at low deposition temperatures possible without any defects or particle contamination.Type: GrantFiled: July 13, 2004Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Martin Jay Seamons, Wendy H. Yeh, Sudha S. R. Rathi, Heraldo L. Botelho
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Patent number: 7096085Abstract: A method, system and medium is provided for enabling improved control systems. An error, or deviation from a target result, is observed for example during manufacture of semiconductor chips. The error within standard deviation is caused by two components: a white noise component and a signal component (such as systematic errors). The white noise component is, e.g., random noise and therefore is relatively non-controllable. The systematic error component, in contrast, may be controlled by changing the control parameters. A ratio between the two components is calculated autoregressively. Based on the ratio and using the observed or measured error, the actual value of the error caused by the systematic component is calculated utilizing an autoregressive stochastic sequence. The actual value of the error is then used in determining when and how to change the control parameters.Type: GrantFiled: May 28, 2004Date of Patent: August 22, 2006Assignee: Applied MaterialsInventor: Young Jeen Paik
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Patent number: 7094613Abstract: Embodiments of the invention generally relate to a method for etching in a processing platform (e.g. a cluster tool) wherein robust pre-etch and post-etch data may be obtained in-situ. The method includes the steps of obtaining pre-etched critical dimension (CD) measurements of a feature on a substrate, etching the feature; treating the etched substrate to reduce and/or remove sidewall polymers deposited on the feature during etching, and obtaining post-etched CD measurements. The CD measurements may be utilized to adjust the etch process to improved the accuracy and repeatability of device fabrication.Type: GrantFiled: October 21, 2003Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: David Mui, Wei Liu, Hiroki Sasano
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Patent number: 7094710Abstract: The present invention provides a method for depositing nano-porous low dielectric constant films by reacting an oxidizable silicon containing compound or mixture comprising an oxidizable silicon component and an oxidizable non-silicon component having thermally liable groups with nitrous oxide, oxygen, ozone, or other source of reactive oxygen in gas-phase plasma-enhanced reaction. The deposited silicon oxide based film is annealed to form dispersed microscopic voids that remain in a nano-porous silicon oxide based film having a low-density structure. The nano-porous silicon oxide based films are useful for forming layers between metal lines with or without liner or cap layers. The nano-porous silicon oxide based films may also be used as an intermetal dielectric layer for fabricating dual damascene structures.Type: GrantFiled: December 2, 2004Date of Patent: August 22, 2006Assignee: Applied MaterialsInventor: Robert P. Mandal
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Patent number: 7094139Abstract: A retaining ring has a generally annular body with a top surface, a bottom surface, an inner diameter surface, and an outer diameter surface. The outer diameter surface includes an outwardly projecting flange having a lower surface, and the bottom surface includes a plurality of channels.Type: GrantFiled: September 8, 2003Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Dan A. Marohl, Ming-Kuei Tseng
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Patent number: 7094313Abstract: A substrate processing system is provided with a processing chamber, an alternating voltage supply, and an impedance matching network. The processing chamber holds a substrate during processing and the alternating voltage supply is connected with the processing chamber to capacitively couple energy to a plasma formed within the processing chamber. The impedance matching network is coupled with the alternating voltage supply and has a variable resistive element and a variable reactive element, whose states respectively define distinct real and imaginary parts of an impedance.Type: GrantFiled: April 21, 2004Date of Patent: August 22, 2006Assignee: Applied Materials, Inc.Inventors: Eller Y. Juco, Visweswaren Sivaramakrishnan, Mario David Silvetti, Talex Sajoto
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Patent number: 7091132Abstract: An ultrasonic etching apparatus for chemically-etching a workpiece is disclosed. The apparatus includes an outer tank at least partially filled with an aqueous solution, an inner tank at least partially disposed within the outer tank and in contact with aqueous solution, the inner tank at least partially filled with an etching solution, a lid engaged with the mouth of said inner tank; and an ultrasonic transducer coupled to the outer tank to impart ultrasonic energy to the etching solution in said inner tank. Also disclosed are methods of using the apparatus to etch workpieces.Type: GrantFiled: July 24, 2003Date of Patent: August 15, 2006Assignee: Applied Materials, Inc.Inventors: Samantha Tan, Ning Chen
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Patent number: 7091137Abstract: Methods and apparatus are provided for processing a substrate with a bilayer barrier layer. In one aspect, the invention provides a method for processing a substrate including depositing a nitrogen containing barrier layer on a substrate surface and then depositing a nitrogen free barrier layer thereon. The barrier layer may be deposited over dielectric materials, conductive materials, or both. The bilayer barrier layer may also be used as an etch stop, an anti-reflective coating, or a passivation layer.Type: GrantFiled: July 9, 2004Date of Patent: August 15, 2006Assignee: Applied MaterialsInventors: Albert Lee, Annamalai Lakshmanan, Bok Hoen Kim, Li-Qun Xia, Mei-Yee Shek Le
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Patent number: 7089782Abstract: A test station for testing polishing heads for planarizing semiconductor wafers and other substrates has a head positioning control system which can precisely position the polishing head at one of many electronically controlled positions above the test station platform. The test station may also include a lateral carriage assembly which supports the polishing head above a base plate of the station and permits the polishing head to be moved in a gliding motion above the surface of the test station test wafer. A sensor senses when the carriage of the assembly is moved from a load position. In response, the test station controller causes a vertical actuator to lift the head mount in the vertical or Z direction. In this position, there is sufficient clearance for the polishing head being carried by the carriage to slide under the head mount and into position for mounting to the head adapter.Type: GrantFiled: January 9, 2003Date of Patent: August 15, 2006Assignee: Applied Materials, Inc.Inventors: Jian Lin, Volker Geissler, Jens-Michael Wendler
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Publication number: 20060174834Abstract: A RF plasma generation and temperature control system for an inductively coupled plasma process chamber. The plasma generation system includes a heater that includes an elongated upper heating element substantially parallel to an elongated lower heating element, where the upper and lower heating elements are joined by one or more posts substantially perpendicular to the upper and lower heating elements. The system also including one or more RF coils featuring a crease at points of overlap with the posts. Also, a RF plasma generation system for an inductively coupled plasma process chamber, where the plasma generation system includes a heater thermally coupled to the chamber, and one or more RF coils coupled to the chamber, where the RF coils include a hollow tube having at least one flat side.Type: ApplicationFiled: February 10, 2005Publication date: August 10, 2006Applicant: Applied Materials, Inc.Inventors: Maolin Long, David Sun
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Publication number: 20060177600Abstract: A substrate processing system has a housing that defines a process chamber. A substrate holder is disposed within the process chamber and configured to support a substrate within a substrate plane during substrate processing. A gas-delivery system is configured to introduce a gas into the process chamber. A pressure-control system maintains a selected pressure within the process chamber. A high-density-plasma generating system is operatively coupled with the process chamber. A magnetic confinement ring with magnetic dipoles is disposed circumferentially around a symmetry axis orthogonal to the substrate plane and provides a magnetic field with a net dipole moment substantially nonparallel with the substrate plane. A controller controls the gas-delivery system, the pressure-control system, and the high-density plasma system.Type: ApplicationFiled: February 8, 2005Publication date: August 10, 2006Applicant: Applied Materials, Inc.Inventors: Siqing Lu, Qiwei Liang, Canfeng Lai, Jason Bloking, Ellie Yieh
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Publication number: 20060178003Abstract: A method is disclosed for depositing a dielectric film on a substrate having a plurality of gaps formed between adjacent raised surfaces disposed in a high density plasma substrate processing chamber substrate. In one embodiment the method comprises flowing a process gas comprising a germanium source, a silicon source and an oxidizing agent into the substrate processing chamber; forming a high density plasma that has simultaneous deposition and sputtering components from the process gas to deposit a dielectric film comprising silicon, germanium and oxygen; and during the step of forming a high density plasma, maintaining a pressure within the substrate processing chamber of less than 100 mTorr while allowing the dielectric film to be heated above its glass transition temperature.Type: ApplicationFiled: February 10, 2005Publication date: August 10, 2006Applicant: Applied Materials, Inc.Inventors: Padmanabhan Krishnaraj, Michael Cox, Bruno Geoffrion, Srinivas Nemani
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Patent number: 7088444Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: GrantFiled: November 8, 2004Date of Patent: August 8, 2006Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Ji-Ping Li
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Patent number: 7086918Abstract: An organic electroluminescent device comprising an anode layer on a substrate, an organic layer on the anode layer, and a cathode layer on the organic layer. In one embodiment, the cathode layer is subjected to H2 plasma prior to deposition of a protective layer over the cathode. In another embodiment, the organic electroluminescent device is encapsulated with an inner encapsulation layer on the cathode layer, and an outer encapsulation layer on the inner encapsulation layer. The inner layer is optimized for adhesion to the cathode layer.Type: GrantFiled: December 11, 2002Date of Patent: August 8, 2006Assignee: Applied Materials, Inc.Inventors: Mark Hsiao, Takako Takehara, Quanyuan Shang, William R. Harshbarger