Abstract: Embodiments of the disclosure relate to methods of depositing tungsten. Some embodiments of the disclosure provide methods for depositing tungsten which are performed at relatively low temperatures. Some embodiments of the disclosure provide methods in which the ratio between reactant gasses is controlled. Some embodiments of the disclosure provide selective deposition of tungsten. Some embodiments of the disclosure provide methods for depositing tungsten films at a low temperature with relatively low roughness, stress and impurity levels.

Abstract: Methods of semiconductor processing may include performing a first plasma treatment within a processing chamber to remove a first carbon-containing material. The methods may include performing a second plasma treatment within the processing chamber to remove a first silicon-containing material. The methods may include depositing a second silicon-containing material on surfaces of the processing chamber. The methods may include depositing a second carbon-containing material overlying the second silicon-containing material.

Abstract: A semiconductor processing chamber for processing semiconductor substrates may include a pedestal to support a substrate with a heater zones and a wire mesh configured to deliver a Radio Frequency (RF) signal to a plasma. The chamber may also include heater zone controls that deliver current to the heater zones and a filter circuit between the heater zone controls and the heater zones. The filter circuit may include inductors on leads from the heater zones and a resonant circuit with a resonant inductor that is magnetically coupled to the lead inductors. The resonant circuit may produce a resonant peak that filters the RF signal delivered to the wire mesh from the leads from the heater zones to prevent the RF signal from reaching the heater zone controls.

Abstract: A method may include providing a substrate having, on a first surface of the substrate, a low dielectric constant layer characterized by a layer thickness. The method may include heating the substrate to a substrate temperature in a range of 200° C. to 550° C.; and directing an ion implant treatment to the low dielectric constant layer, while the substrate temperature is in the range of 200° C. to 550° C. As such, the ion implant treatment may include implanting a low weight ion species, at an ion energy generating an implant depth equal to 40% to 175% of the layer thickness.

Abstract: Methods and film stacks for extreme ultraviolet (EUV) lithography are described. The film stack comprises a substrate with a hard mask, bottom layer, middle layer and photoresist. Etching of the photoresist is highly selective to the middle layer and a modification of the middle layer allows for a highly selective etch relative to the bottom layer.

Abstract: Some embodiments of the disclosure relate to methods of modifying a heater pedestal to improve temperature and thickness uniformity. Some embodiments of the disclosure relate to the modified heater pedestals with improved temperature and thickness uniformity. In some embodiments, the height of support mesas in different regions of the pedestal are modified to increase temperature uniformity. In some embodiments, the heater elements are moved above the vacuum channel and purge channel to increase temperature uniformity. In some embodiments, the edge ring is modified to be coplanar with the top of a supported substrate.

Abstract: Packaging materials and methods of manufacture are disclosed. The packaging material comprises a substrate surface and film coating selected from the group consisting of an elastomer, a polymer, an inorganic material and combinations thereof. The film coating includes a first layer and a second layer, the first layer deposited on the second layer. The first layer has a formula of SiOxNyCz, where x is in a range from 1.9 to 2.15, y is in a range from 0.01 to 0.08, and z is in a range from 0.10 to 0.40.

Abstract: Memory devices and methods of manufacturing memory devices are provided. The device and methods described decrease the resistivity of word lines by forming word lines comprising low resistivity materials. The low resistivity material has a resistivity in a range of from 5 ??cm to 100 ??cm. Low resistivity materials may be formed by recessing the word line and selectively growing the low resistivity materials in the recessed portion of the word line. Alternatively, low resistivity materials may be formed by depositing a metal layer and silicidating the metal in the word line region and in the common source line region.

Abstract: Pumping liners for process chambers including a first ring-shaped body and a second ring-shaped body are described. The first ring-shaped body has a first plurality of openings and the second ring-shaped body has a second plurality of openings. The first ring-shaped body and the second ring-shaped body are rotatable relative to each other around a central axis to at least partially overlap the first plurality of openings and the second plurality of openings to change the area of conductance through the openings. Methods of removing gases from a processing chamber are also described.

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.

Abstract: A method of performing x-ray spectroscopy material analysis of a region of interest within a cross-section of a sample using an evaluation system that includes a focused ion beam (FIB) column, a scanning electron microscope (SEM) column, and an x-ray detector, including: forming a lamella having first and second opposing side surfaces in the sample by milling, with the FIB column, first and second trenches in the sample to expose the first and second sides surface of the lamella, respectively; depositing background material in the second trench, wherein the background material is selected such that the background material does not include any chemical elements that are expected to be within the region of interest of the sample; generating a charged particle beam with the SEM column and scanning the charged particle beam across a region of interest on the first side surface of the lamella such that the charged particle beam collides with the first side surface of the lamella at a non-vertical angle; and detect

Abstract: To protect against physical and side-channel attacks, circuit assemblies may mount a main processor opposite of a cryptographic processor such that traces between the two processors are hidden in a substrate. Another substrate defining a cavity may be mounted on the bottom of the substrate to enclose the cryptographic processor and prevent physical access without disrupting the cryptographic operations. Voltage converters with integrated inductors may also be included in the cavity to generate electromagnetic noise that will disrupt the sensitive equipment used in side-channel attacks. An electromagnetic shield may be sputtered on top of the main processor to block electromagnetic sniffing attacks while still allowing the processor to be coupled with a heat sink.

Abstract: Embodiments described herein include an applicator frame for a processing chamber. In an embodiment, the applicator frame comprises a first major surface of the applicator frame and a second major surface of the applicator frame opposite the first major surface. In an embodiment, the applicator frame further comprises a through hole, wherein the through hole extends entirely through the applicator frame. In an embodiment, the applicator frame also comprises a lateral channel embedded in the applicator frame. In an embodiment the lateral channel intersects the through hole.

Abstract: In one example, a chamber inlet assembly includes a chamber inlet, an outer coupling for a delivery line, and an inner coupling for a processing region of a processing chamber. The inner coupling and the outer coupling are on inner and outer ends, respectively, of the chamber inlet, wherein a cross-sectional area of the inner coupling is larger than a cross-sectional area of the outer coupling. The chamber inlet assembly also includes a longitudinal profile including the inner and outer ends and a first side and a second side, the first and second sides being on opposite sides of the chamber inlet, wherein a shape of the longitudinal profile comprises at least one of triangular, modified triangular, trapezoidal, modified trapezoidal, rectangular, modified rectangular, rhomboidal, and modified rhomboidal. The chamber inlet assembly also includes cassette including the chamber inlet and configured to set into a side wall of the processing chamber.

Abstract: Embodiments disclosed herein include an optical sensor system for use in plasma processing tools. In an embodiment, the optical sensor system, comprises an optically clear body with a first surface and a second surface facing away from the first surface. In an embodiment, the optically clear body further comprises a third surface that is recessed from the second surface. In an embodiment, the optical sensor system further comprises a target over the third surface and a first reflector to optically couple the first surface to the target.

Abstract: A substrate etching system includes a support to hold a wafer in a face-up orientation, a dispenser arm movable laterally across the wafer on the support, the dispenser arm supporting a delivery port to selectively dispense a liquid etchant onto a portion of a top face of the wafer, and a monitoring system comprising a probe movable laterally across the wafer on the support.

Abstract: Exemplary support assemblies may include an electrostatic chuck body defining a substrate support surface. The assemblies may include a support stem coupled with the electrostatic chuck body. The assemblies may include a heater embedded within the electrostatic chuck body. The assemblies may also include an electrode embedded within the electrostatic chuck body between the heater and the substrate support surface. The substrate support assemblies may be characterized by a leakage current through the electrostatic chuck body of less than or about 4 mA at a temperature of greater than or about 500° C. and a voltage of greater than or about 600 V.

Abstract: An apparatus and method of processing a workpiece is disclosed, where a sacrificial capping layer is created on a top surface of a workpiece. That workpiece is then exposed to an ion implantation process, where select species are used to passivate the workpiece. While the implant process is ongoing, radicals and excited species etch the sacrificial capping layer. This reduces the amount of etching that the workpiece experiences. In certain embodiments, the thickness of the sacrificial capping layer is selected based on the total time used for the implant process and the etch rate. The total time used for the implant process may be a function of desired dose, bias voltage, plasma power and other parameters. In some embodiments, the sacrificial capping layer is applied prior to the implant process. In other embodiments, material is added to the sacrificial capping layer during the implant process.

Abstract: Exemplary semiconductor processing chambers may include a substrate support positioned within a processing region of the semiconductor processing chamber. The chamber may include a lid plate. The chamber may include a gasbox positioned between the lid plate and the substrate support. The gasbox may be characterized by a first surface and a second surface opposite the first surface. The gasbox may define a central aperture. The gasbox may define an annular channel in the first surface of the gasbox extending about the central aperture through the gasbox. The gasbox may include an annular cover extending across the annular channel defined in the first surface of the gasbox. The chamber may include a blocker plate positioned between the gasbox and the substrate support. The chamber may include a ferrite block positioned between the lid plate and the blocker plate.