Abstract: A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.

Abstract: An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device having a number of gain input ports respectively coupled to the first output ports and a gain output port coupled to at least one of the first input ports. The first gain control device is configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports.

Abstract: A method and apparatus for trimming of a local oscillation within a radio frequency integrated circuit (RFIC) includes processing that begins when an RFIC receives a radio frequency (RF) signal having a known frequency. The processing then continues when the RFIC mixes the RF signal with a receiver local oscillation to produce a low intermediate frequency (IF) signal, which may have a carrier frequency of zero (i.e., a baseband signal) or up to a few mega Hertz). The processing then continues when the RFIC demodulates the low IF signal to produce demodulated data. The processing then continues as the RFIC determines a DC offset from the demodulated data, where the DC offset is reflective of the difference between the known frequency and the frequency of the receiver local oscillation. The processing then continues as the RFIC adjusts the receiver local oscillation to reduce the DC offset when the DC offset compares unfavorably with an allowable offset threshold.

Abstract: The present invention is directed to a method for debugging scan testing failures of integrated circuits. The method includes identifying good and bad scan paths among a set of scan paths. A scan path is bad if it is not producing any output. A scan path is good if it is producing a correct output. A clock set is generated for each scan path. The clock set includes all clock elements whose outputs impact the scan path. A union of the scan path clock sets for the bad scan paths is created. Good clock elements are removed from the union. A clock element is presumed to be good if it is associated with a good scan path. Clock elements remaining within the union of clock sets for the bad scan paths are analyzed to determine the source of errors. In one embodiment, multiple input clock elements in all bad scan paths are analyzed first, followed by analysis of single input clock elements in all bad scan paths and followed by analysis of any other clock elements in any of the bad scan paths.

Abstract: A packet-based, hierarchical communication system, arranged in a spanning tree configuration, is described in which wired and wireless communication networks exhibiting substantially different characteristics are employed in an overall scheme to link portable or mobile computing devices. The network accommodates real time voice transmission both through dedicated, scheduled bandwidth and through a packet-based routing within the confines and constraints of a data network. Conversion and call processing circuitry is also disclosed which enables access devices and personal computers to adapt voice information between analog voice stream and digital voice packet formats as proves necessary. Routing pathways include wireless spanning tree networks, wide area networks, telephone switching networks, internet, etc., in a manner virtually transparent to the user.

Abstract: In an Asynchronous Transfer Mode cell, a method and apparatus are disclosed for producing a cell header having bytes with bits in reverse order. Address and control data bytes are received, and a value for a reverse bit Header Error Control byte is generated from the address and control data bytes. Additionally, the order of bits within each address and control data byte is reversed. The produced cell header comprises the reverse bit Header Error Control byte and the address and control data bytes with each address and control data byte having its bits in reversed order. In one embodiment, the present invention provides a processor instruction for producing the cell header having bytes with bits in reverse order. The instruction receives as input address and control data bytes. The instruction then computes a Header Error Control byte and formats the Header Error Control byte in reverse bit order for subsequent processing within the modem.

Abstract: A Home Phoneline system operating within a Multiple Dwelling Unit includes a Home Phoneline Access Multiplexer (HPAN) that services a plurality of Home Phoneline networks, each including at least one Home Phoneline station. The HPAN synchronizes upstream and downstream transmissions to eliminate Near-Far cross-talk. According to a second operation of the present invention, the HPAN manages the transmission power of the HomePNA stations of the HomePNA networks to reduce Near-Near and Far-Far cross-talk. To optimize throughput across the whole building, station power levels are adjusted based on their location in terms of amounts of attenuation. A third method of operation according to the present invention includes adjusting the receiver sensitivity of the Home Phoneline stations according to detected or characterized levels of cross-talk within the MDU.

Abstract: A method of determining when cable modems in a distributed digital data delivery service over cable TV hybrid fiber coaxial cable network have a headroom problem and resolving said problem. The method involves measuring the burst power from each cable modem, and if the burst power is too low, requesting the cable modem whose burst power is too low to increase its transmit power, and keeping track of which modems have been requested to increase their power. If a predetermined number of requests to increase power have not resulted in the cable modem transmitting with sufficient power for reliable reception, the cable modem is listed as having a headroom problem. Subsequent requests for upstream bandwidth from all modems with headroom problems are analyzed to determine if the requested burst size is too large and will result in a headroom problem. If so, a calculation as to the maximum number of spreading codes that each modem with a headroom problem can simultaneously transmit on without a headroom problem.

Abstract: An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate that has a first surface and a second surface is provided. The stiffener has a first surface and a second surface. The second stiffener surface is attached to the first substrate surface. An IC die has a first surface and a second surface. The first IC die surface is mounted to the first stiffener surface. A plurality of solder balls is attached to the second substrate surface. In one aspect, a heat spreader is mounted to the second IC die surface. In another aspect, the stiffener is coupled to ground to act as a ground plane. In another aspect, the substrate has a window opening that exposes a portion of the second stiffener surface. The exposed portion of the second stiffener surface is configured to be coupled to a printed circuit board (PCB). In another aspect, a metal ring is attached to the first stiffener surface.

Abstract: A system and method for providing power control in a power management integrated circuit. A power management integrated circuit may comprise a communication interface module that receives power supply information from at least one electrical device external to the power management integrated circuit. The power supply information may, for example, comprise information related to a first electrical power. The power management integrated circuit may also comprise a power regulator module that determines a regulated power signal based, at least in part, on a portion of the power supply information. The regulated power signal may correspond to the first electrical power. For example, the regulated power signal may comprise the first electrical power or cause another circuit to output the first electrical power. The power management integrated circuit may then output the regulated power signal to at least one electrical device external to the power management integrated circuit.

Abstract: A dual purpose serializer/de-serializer (SerDes) for point-to-point and point-to-multipoint communication. A configurable SerDes can be designed to operate in one of a plurality of operating modes. Selection between the plurality of operating modes can be based on information received via a management interface. In one example, the various operating modes can be defined with different locking times and jitter characteristics.

Abstract: Reading data from a magnetic storage media with an analog front end (AFE) coupled to an all digital read channel compensation architecture. A read head passes over magnetic storage media to produce an analog signal. The analog signal is amplified such that the range of the amplified analog signal substantial matches a range of the analog to digital converter (ADC) used to sample the analog signal. A baseline adjust is performed on the amplified analog signal to center the amplified analog signal to a midscale of the ADC. The amplified analog signal may be sampled where the sampling is data frequency locked by a data lock clock (DLC) tracking module. A digital signal may then be produced from the amplified analog signal where this signal is read channel compensated in the digital domain to produce a digital signal which is then processed with a sequence detector.

Abstract: An apparatus comprising a plurality of physical ingress ports configured to receive data, each data having a data type; a plurality of physical egress ports configured to transmit data; a memory configured to buffer data that has been received; a plurality of virtual routing devices, wherein each of the virtual routing devices is associated with a particular data type and each of the virtual routing devices is configured to: virtually buffer data associated with the respective data type, and regulate the quality of service provided to the respective data type; and a data manager configured to manage the receipt and transmission of data.

Abstract: Systems and methods for transferring Ethernet packets from an operating system to a baseboard management controller (“BMC”) have been provided. The operating system is typically stored in a memory. A method according to the invention may include tagging predetermined Ethernet packets for transfer from the operating system to the BMC. The method may also include transferring the tagged Ethernet packets from the operating system to a Local Area Network On Motherboard (LOM). The method may include transferring the tagged Ethernet packets from the LOM to the BMC.

Abstract: The present invention is directed to a wireless telephone having a first microphone and a second microphone and a method for processing audio signal in a wireless telephone having a first microphone and a second microphone. The wireless telephone includes a first microphone, a second microphone, and a signal processor. The first microphone outputs a first audio signal, the first audio signal comprising a voice component and a background noise component. The second microphone outputs a second audio signal. The signal processor increases a ratio of the voice component to the noise component of the first audio signal based on the content of at least one of the first audio signal and the second audio signal to produce a third audio signal.

Abstract: Methods and systems for a RFIC master are disclosed. Aspects of one method may include configuring an on-chip programmable device that may function as a master on a bus that has at least one device interface, for example, RFIC interface, coupled to the bus. The on-chip programmable device may generate at least one signal to control at least one device coupled to at least one device interface. The on-chip programmable device may communicate the generated signal via the bus upon receiving an input timer signal and may be configured by writing at least one event data and an index-sample data to the on-chip programmable device. The index-sample data may comprise at least a count value and an event data index. When the count value equals a value of the timer signal, event data may be fetched and executed starting with the one specified by the event data index.

Abstract: An apparatus and method for switching VOIP packets in a data network, wherein the method includes the steps of receiving a first packet in a network switch and determining if the first packet is a VOIP packet. Further, method includes determining a dynamically negotiated VOIP port for a VOIP session from at least one of the first packet and a second packet received in the network switch, if the first packet is determined to be the VOIP packet. Finally, the method includes the steps of classifying all subsequent VOIP packets corresponding to the dynamically negotiated VOIP port in accordance with predetermined parameters. The apparatus includes a network switch having at least one data port interface controller supporting a plurality of data ports for transmitting and receiving data, and a fast filtering processor in communication with the at least one data port interface.

Abstract: A communication system includes an integrated circuit (IC) die having an on-chip source termination. The on-chip source termination can be a non-precision resistor, such as an unsilicided poly resistor, or any other suitable termination. As compared to an off-chip source termination, the on-chip source termination can reduce voltage peaking and/or voltage overshoot in the IC die and/or at a load that is connected to the IC die. The IC die can further include a line driver to provide a source current. A bias generator can be included to provide a bias current to the line driver. The bias generator can include a first current source coupled to an off-chip resistor and a second current source coupled to an on-chip resistor. An output voltage of the IC die can be adjusted by manipulating a trim control of the off-chip resistor and/or a trim control of the on-chip resistor.

Abstract: A supervisory communications system (such as, a headend cable modem termination system) manages communications with a plurality of remote communications devices (such as, a cable modem). The supervisory system enables each of its physical channels to have multiple logical channels, with each logical channel having differing channel parameters or operating characteristics. As a result, different types of communication devices are permitted to coexist on the same physical spectrum. In other words, a communications device using, for example, spread spectrum modulation technologies require different operating characteristics than a communications device using, for example, time division multiplexing technologies.

Abstract: A network device for processing data on a data network includes a plurality of ports, configured to receive data from a data network and to send processed data to the data network, a memory management unit configured store data on and retrieve data from the memory and a metering unit configured to police a flow of the processed data to be sent to the network device. The metering unit is configured to utilize a series of leaky bucket units, where tokens are added to each leaky bucket unit only when that particular leaky bucket unit is accessed. The metering unit is also configured to add the tokens based on a prior timestamp value, a current timing value and an established rate and a multiplication to establish the tokens is accomplished by shifting a register of the established rate.