Abstract: Methods and apparatus for reducing precision of an input signal, by comparing a portion of the input signal to a preselected threshold value, and determining a selectable bias responsive to the comparison. By combining a portion of the input signal with the selectable bias, a reduced precision signal, having minimized or eliminated rounding error, is generated. The selectable bias corresponds to a predetermined characteristic of one of bias, an error signal, the input datum, the reduced precision datum, and a combination thereof.

Abstract: Schemes for rewinding a HITS stream in video recorder and playback systems are presented herein. Reference pictures are stored for a group of pictures, allowing subsequent pictures to be decoded from the reference pictures. The foregoing significantly reduces the number of picture decodes required to display a HITS stream in reverse order.

Abstract: A network device for processing data on a data network includes a plurality of ports, configured to receive data from a data network and to send processed data to the data network, a memory management unit configured store data on and retrieve data from the memory and a metering unit configured to police a flow of the processed data to be sent to the network device. The metering unit is configured to utilize a series of leaky bucket units, where tokens are added to each leaky bucket unit only when that particular leaky bucket unit is accessed. The metering unit is also configured to add the tokens based on a prior timestamp value, a current timing value and an established rate and a multiplication to establish the tokens is accomplished by shifting a register of the established rate.

Abstract: Fast image rejection. Dual down conversion processing of a received signal by performing both low side injection and high side injection thereby generating a first down converted signal and a second down converted signal. Analysis of one or both of the first and second down converted signals, including the signal and image components thereof, is performed to determine which of the first down converted signal and the second down converted signal is appropriate to be selected for subsequent baseband processing. For example, if a signal strength of an image within the first down converted signal is less than a signal strength of a signal component within the first down converted signal, then the first down converted signal is most likely the appropriate signal to undergo baseband processing. Alternatively, if the converse is true, then the second down converted signal may be the appropriate signal to undergo baseband processing.

Abstract: A system and method for energy savings on a PHY/MAC interface for energy efficient Ethernet. Power savings for a PHY due to low-link utilization can also be realized in the higher layer elements that interface with the PHY. In one embodiment, subrating is implemented on a MAC/PHY interface to match a subrating of the PHY with a remote link partner. This subrating is less than the full capacity rate and can be zero.

Abstract: A node comprising: an ingress port configured to receive data; a plurality of egress ports configured to transmit data; a routing table configured to provide, at least part of, both a preferred routing path and a recovery routing path; a data tag engine configured to read a tag, associated with the data, that indicates the routing state of the data and, based at least in part upon the tag determine whether to use the preferred routing path or the recovery routing path for a selected path, and determine if the tag is to be modified to indicate a change in the routing status of the data; and a routing engine configured to utilize the selected path to determine the egress port from which to transmit the data.

Abstract: Selective fast image rejection. Selective down conversion processing is performed on a received signal based on the signal strength of that received signal. As few as two possible down conversion frequencies can be employed so that the received signal is down converted either to a first down converted signal having a first intermediate frequency or to a second down converted signal having a second intermediate frequency. If desired, the received signal can either be down converted using low side injection or high side injection down conversion processing. Alternatively, a larger number of possible down conversion frequencies so that the received signal is down converted to one of the possible down conversion frequencies based on the signal strength of the received signal.

Abstract: An integrated circuit includes a radio frequency identification (RFID) transceiver that communicates RFID data with a remote RFID device via an on-chip coil. A wireless telephone transceiver section coupled to communicate wireless telephony data with a remote wireless telephony device. A baseband processing module produces inbound data from an inbound symbol stream and processes outbound data to produce an outbound symbol stream, wherein the inbound data includes RFID data and wireless telephony data.

Abstract: A hybrid technique in energy efficient Ethernet (EEE) physical layer devices (PHYs). A hybrid approach is defined that combines multiple low power modes. In one embodiment, the hybrid approach uses low power idle (LPI) and subset PHY techniques that can be selectively activated.

Abstract: Methods of assembling a ball grid array (BGA) package is provided. One method includes providing a tape substrate that has a first surface and a second surface, attaching a first surface of a stiffener to the first substrate surface, mounting an IC die to the second stiffener surface, mounting a heat spreader to the IC die, and attaching a plurality of solder balls to the second substrate surface.

Abstract: A system and method for automatically discovering total transistor resistance in a hybrid power over Ethernet (PoE) architecture. A critical factor for a PoE system is the total resistance of the power FET. Typical PoE systems consist of a single power FET that may be integrated with the controller or external to the controller. In a hybrid architecture the PoE system consists of both an internal power FET and an external power FET. The external power FET can be used to customize a design to meet a particular application or need. The total resistance in the hybrid architecture can be automatically determined using voltage and current measurements of the internal and external power FETs.

Abstract: A system and method for carrier deferral for full duplex energy efficient Ethernet (EEE) physical layer devices (PHYs). A carrier deferral signal can be asserted to a media access control layer to indicate to the media access control (MAC) layer that transmission of data is to be deferred due to a power savings initiative in the physical layer device. In one example, the carrier deferral signal is used when a PHY is awakened by the MAC when the MAC has something to transmit. In another example, the carrier deferral signal is used when a PHY is switching link rates.

Abstract: A radio frequency identification (RFID) device includes an antenna coupled to receive a millimeter wave RFID signal from a remote RFID reader. A phase rotation module generates a phase rotated backscatter signal, based on the millimeter wave RFID signal and further based on a phase rotation signal that identifies the RFID device.

Abstract: A system and method for using a link energy signal in physical layer devices (PHYs) having a silent channel/interface in energy efficient Ethernet (EEE). LPI modes in EEE suffer deficiencies in cable unplug detection due to the latency in refresh cycles. LPI modes in EEE also suffer from potential frequency drift, which leads to high bit error rate (BER) when coming out of LPI mode. A link energy signal transmitted during LPI modes enables real-time detection of cable unplug and the frequency lock to be maintained.

Abstract: A method and a system for video noise reduction based on moving content detection are described. Aspects of a system for processing images may include circuitry within a chip that determines a motion metric that indicates an amount of motion between a current video picture and at least one of the following: at least one preceding video picture and at least one subsequent video picture. The motion metric may be computed from a maximum value derived by summing, over a plurality of corresponding pixels that are located within a region around a reference pixel in a current video picture, differences in values of the plurality of corresponding pixels. The circuitry within the chip may also compute a blending factor that has a nonlinear relationship to the motion metric. The circuitry within the chip may adjust at least one pixel in the current video picture based on the computed blending factor.

Abstract: A method for interoperability of a network interface protocol with an Internet interface protocol begins by receiving a scan channel request of a plurality of channels that are in accordance with the network interface protocol. The method then continues by determining whether an Internet packet is being received via one of the plurality of channels when the channel scan request is received (i.e., is a higher layer protocol supporting a current transmission). If so, the method continues by scanning at least one channel of the plurality of channels, but does not scan all of the plurality of channels at one time. The method continues after the scanning by tuning to the channel supporting the higher layer protocol communication to transmit at least one outbound Internet packet. The method then continues by scanning at least another channel of the plurality of channels.

Abstract: Aspects of a method and system for a linear regulator with high bandwidth, PSRR, and a wide range of output current are provided. A method for isolating voltages in a circuit may comprise applying a reference voltage to an isolation resistor based on a supply voltage. An internal voltage at a reference point may be determined based on the applied reference voltage, and a maximum and/or minimum voltage may be determined based on the internal voltage. A plurality of output transistor devices may be controlled based on either the maximum voltage or minimum voltage. The reference voltage may be modified based on controlling the plurality of output transistor devices. By turning ON and OFF the output transistor devices, a much wider operating range is facilitated.

Abstract: Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the carriers to form a wideband signal. The wideband signal can then be intensity modulated on a laser and coupled to a fiber optic channel. A receiver may then receive the laser signal from the fiber optic channel and convert it into an electrical signal. Multi-carrier modulation may be applied to existing fiber channels, which may be of lower quality. Existing fiber channels may have characteristics which prevent or restrict the transmission of data using intensity modulation at certain frequencies. An adaptive multi-carrier modulation transmitter may characterize an existing fiber optic channel and ascertain the overall characteristics of the channel. The transmitter and receiver can then be configured to use various bandwidths and various modulations in order to match the transfer characteristic of the fiber channel.

Abstract: A radio frequency (RF) transmitter includes a digital radio processor and a baseband processor. A complex analog-to-digital converter (ADC) within the radio processor provides an analog interface to the baseband processor to receive an analog complex modulated baseband signal and convert the analog complex modulated baseband signal to a digital complex modulated baseband signal. A demodulator within the radio processor demodulates the digital complex modulated baseband signal to recreate the original transmit digital data as a demodulated digital signal. The demodulated digital signal is processed by a digital processor in the radio processor to mitigate the effects of various imperfections in the radio processor circuitry.

Abstract: A method and apparatus for reducing instruction dependencies in extended SSA form instructions includes examining a first instruction of a worklist. The worklist contains instructions in the extended SSA form that have a source, a previous link and a write mask and further produce an output. The method and apparatus further includes examining at least one second instruction of the worklist, where the at least one second instruction is a source of the first instruction. Lastly, the method and apparatus includes translating the plurality of instructions in the worklist into a second plurality of instructions in the extended SSA form where the second plurality of instructions contains less instruction dependencies such as previous links.