Abstract: A single chip radio transceiver includes circuitry that enables detection of radar signals to enable the radio transceiver to halt communications in overlapping communication bands to avoid interference with the radar transmitting the radar pulses. The radio transceiver is operable to evaluate a number of most and second most common pulse interval values to determine whether a traditional radar signal is present. The radio transceiver also is operable to FM demodulate an incoming signal to determine whether a non-traditional radar signal, such as a bin-5 radar signal, is present. After. FM demodulation, the signal is averaged wherein a substantially large value is produced for non-traditional radar signals and a value approximately equal to zero is produced for a communication signal that is not FM modulated with a continuously increasing frequency signal. Gain control is used to limit incoming signal magnitude to a specified range of magnitudes.

Abstract: A baseband processing module of a wireless terminal includes a Turbo decoding module. The Turbo decoding module decodes a Turbo code word to produce one or more Media Access Control (MAC) packet(s) carried by the turbo decode word. Each MAC packet includes a MAC packet header and the MAC packet payload, which carries one or more Radio Link Control (RLC) Packet Data Units (PDUs). The Turbo decoding module decodes the MAC packet header to determine boundaries of the PDUs carried in the MAC packet payload. The Turbo decoding module decodes RLC PDU headers and RLC PDU payloads of the RLC PDUs. The Turbo decoding module writes the decoded MAC packet header, the decoded RLC PDU headers, and the decoded RLC PDU payloads to memory in a word-aligned format. The Turbo decoding module may also operate in various other Turbo decoding modes.

Abstract: A controller includes a combining module that generates a total control signal for the drive device of a disk drive by combining a feedback control signal and a feedforward control signal. A feedback control module generates the feedback control signal in response to at least one state of the drive device. A feedforward control module generates the feedforward control signal based on a smoothing function and a feedforward control function. The smoothing function is determined by evaluating a plurality of candidate smoothing functions by determining a smoothness factor associated with the control signal that results from each of the plurality of candidate smoothing functions, and selecting the smoothing function as one of the plurality of candidate smoothing functions, based on the smoothness factor.

Abstract: Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in integrated circuit (IC) packages is described. A die-up or die-down package includes first and second caps defining a cavity, an IC die, and a leadframe. The leadframe includes a centrally located die attach pad, a plurality of leads, and a plurality of tie bars that couple the die attach pad to the leads. The IC die is mounted to the die attach pad. Planar rim portions of the first and second caps that surround the cavity are coupled to the leadframe. The first and second caps and the leadframe form an enclosure structure that substantially encloses the IC die, and shields EMI emanating from and radiating towards the IC die. The enclosure structure also dissipates heat generated by the IC die during operation.

Abstract: A system and method that completely removes the host CPU of an IP gateway/set-top video server from the data path of handling of network packet headers, as required by protocol layers such as UDP, IP, or Ethernet, or of payloads during video streaming. Accordingly, an ordinary set-top server is made operable to support simultaneous high definition video streams or additional such data streams.

Abstract: An antenna structure includes first and second antennas. The first antenna has a first geometry corresponding to a first frequency. The second antenna has a second geometry corresponding to a second frequency. The second antenna is proximal to the first antenna and utilizes electrical-magnetic properties of the first antenna to transceive signals at the second frequency.

Abstract: Provided is a method for transferring data from one clock domain within a synchronizer to another domain within the synchronizer. The method includes determining system clock parameters within the synchronizer and analyzing a first domain clock signal based upon the system clock parameters. Next, a second domain clock signal is analyzed based upon the first domain clock signal and the system clock parameters. A determination is made as to when to transfer data from a first clock domain to a second clock domain in accordance with the analysis of the first and second domain clock signals, and an enable signal is provided to affect the data transfer from the first domain to the second clock domain.

Abstract: Systems and methods of coding progressive content with isolated fields for conversion to interlaced display are provided. Some systems and methods may find use in, for example, digital video compression systems and methods. Film material may be encoded as video material with an intended field polarity and an explicit 3:2 pull-down operation for interlaced display (e.g., a 30-frames-per-second display).

Abstract: A power efficient and reduced electromagnetic interference (EMI) emissions transmitter for unshielded twisted pair (UTP) data communication applications. Transmit data is processed by a digital filter. The digital filter output data is converted to a current-mode analog waveform by a digital-to-analog converter (DAC). The digital filter is integrated with the DAC binaiy decoder in a memory device such as a ROM with time multiplexed output. DAC line driver cells are adaptively configurable to operate in either a class-A or class-B mode depending on the desired operational modality. A discrete-time analog filter is integrated with the DAC line driver to provide additional EMI emissions suppression. An adaptive electronic transmission signal cancellation circuit separates transmit data from receive data in a bidirectional communication system operating in full duplex mode.

Abstract: A system and method for preprocessing a bitstream of compressed video data is presented herein. The bitstream of compressed video data can include, for example, a bitstream in accordance with the MPEG AVC standard. The bitstream is received and modified by a preprocessor to facilitate multi-row decoding. The modifications to the bitstream can include identification of starting points of macroblock rows with row headers. Additionally, multi-row decoding is further facilitated by generation of decode descriptors which indicate the starting row positions in the modified bit stream. Additionally, the modified bit stream can be formatted in accordance with a simpler coding scheme to simplify decompression.

Abstract: A network component for processing a packet can include a rules table configured to have a plurality of entries, and sets of first storage units within each one of the plurality of entries. The sets of first storage units are configured to store sets of range checking parameters with respect to the packet. The sets of range checking parameters can identify a plurality of packet field values and a plurality of range values. In addition, the network component can include an action implementation unit configured to implement at least one first action with respect to the packet when at least one of the plurality of packet field values falls within a corresponding pair of range values for one of the plurality of entries.

Abstract: A radio frequency integrated circuit (RFIC) includes a digital to analog converter, an analog to digital converter, and a radio module. The digital to analog converter (DAC) is operably coupled to convert outbound symbols into outbound baseband signals, wherein the digital to analog converter is fabricated within a DAC portion of a substrate of the RFIC. The analog to digital converter (ADC) is operably coupled to convert inbound baseband signals into inbound symbols, wherein the analog to digital converter is fabricated within an ADC portion of the substrate. The radio module is operably coupled to convert the outbound baseband signals into outbound radio frequency (RF) signals and to convert inbound RF signals into the inbound baseband signals. The radio module is fabricated within a radio portion of the substrate, wherein the DAC portion of the substrate is physically between the ADC portion and the radio portion of the substrate.

Abstract: Systems and methods that provide receiver-aided set-up request routing are provided. In one embodiment, an incoming packet is received and parsed. A probability is determined that a particular software layer is likely to be a software layer to which the incoming packet is to be connected as a function of information from at least a portion of the parsed packet. The software layer with the highest determined probability is selected.

Abstract: Low voltage swing pad driver and receiver. A transmitter portion and a receiver portion are implemented within various devices that communicate using low voltage swing pads communicatively coupled via a trace. The transmitter portion of one device generates a current signal that is pushed/pulled to a low voltage swing pad and is then passed across the trace to another low voltage swing pad. The transmitter portion includes a current driver that outputs the current signal to the low voltage swing pads, and the receiver portion includes a trans-impedance amplifier that transforms the received current signal into a voltage signal. The low voltage swing pad driver and receiver generates a relatively low voltage swing when compared to CMOS full-scale voltage swings thereby significantly reducing the possibility of introducing any noise and/or distortion of data that is communicated via the interface.

Abstract: Provided is an amplifier including a system for controlling output stage quiescent current. The amplifier includes a driving stage including first pmos and nmos transistors coupled together, and an output stage connected to the driving stage. The output stage includes second pmos and nmos transistors coupled together. The amplifier also includes a quiescent control stage connected to the driving stage and including third pmos and nmos transistors coupled together, fourth pmos coupled to third pmos and 4th nmos coupled to 3rd nmos. A topology of the coupled third pmos and nmos transistors substantially matches a topology of the coupled first pmos and nmos transistors, and 4th pmos and nmos match to 2nd pmos and nmos.

Abstract: Automatically detecting types of external FLASH devices is provided, and may comprise communicating one or more read memory device ID commands corresponding to at least one supported memory device to at least one memory device. Data received in response to this communication may be utilized to determine whether the received data identifies the memory device as one of the plurality of supported memory devices. The supported memory devices may be serial FLASH memory devices. Each read memory device ID command may be manufacturer specific, or may be specific to a group of the supported memory devices. The communicating of read memory device ID commands and determining whether the memory device is a supported memory device may be repeated if the memory device is not identified as one of the supported memory devices. There may be a limit to the number of times this is repeated.

Abstract: Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow.

Abstract: A phase based system and method for determining signal consistency (e.g., in a video signal processing system). Various aspects of the present invention may, for example, comprise receiving a first and second signal, each of which comprises a respective first sub-signal. A receiving module may, for example, effect such receiving. The first and second signals may be synchronized according to, at least in part, aspects of their respective first sub-signals. A signal synchronization module may, for example, effect such synchronization. Phase difference between respective sub-signals of the first and second synchronized signals may be determined (e.g., using sample-wise multiplication). Multiplication and accumulator modules may, for example, effect such a determination. A signal may be generated that is indicative of signal consistency based, at least in part, on the determination of phase difference between the respective sub-signals. An output module may, for example, effect such a signal generation.

Abstract: Systems and methods that provide graphics using a graphical engine are provided. In one example, a system may provide layered graphics in a video environment. The system may include a bus, a graphical engine and a graphical pipeline. The graphical engine may be coupled to the bus and may be adapted to composite a plurality of graphical layers into a composite graphical layer. The graphical engine may include a memory that stores the composite graphical layer. The graphical pipeline may be coupled to the bus and may be adapted to transport the composite graphical layer.

Abstract: Characterizing channel response in a single upstream burst using redundant information from training tones (TTs). The invention is operable to utilize inserted TTs, contained within a transmitted data frame, to provide for an improved estimate of a communication channel's actual response and an improved estimate of the noise of the communication channel. The invention determines a maximum allowable delay spread of the many communication paths within a multi-path communication channel. Using the redundant TTs information then a portion of the finite impulse response of the communication channel, within the time domain, may be zeroed, thereby providing a much improved channel estimate and noise estimate. Using the redundant TTs, less noise is introduced onto the data tones (DTs) within a data frame. The present invention is also able to identify those portions of the TTs that are attributable to the actual channel and those that are attributable to the channel's noise.