Abstract: A computer apparatus for receiving a removable communication card such as a radio card or a modem card. A radio or modem is self-contained inside a housing of the communication card and has an electrical interface for communicating information to and from the computer apparatus. The computer apparatus receives the communication card such that it engages the electrical interface. These contacts automatically connect the communication card to an appropriate antenna, telephone or telephone line. A radio communication card is connected to the appropriate antenna for the type and frequency of the radio. A modem card is connected to a standard telephone line, a cellular phone, or an antenna for a cellular phone if the cellular phone is also disposed within the housing of the modem communication card. Additionally, a switching matrix can be used to connect one set of contacts on a radio card or a modem card to one or more of a plurality of antennas and telephone lines.

Abstract: “Multiple approaches are presented herein to perform CFO correction within CDMA systems having multiple users. Any communication receiver may be adapted to perform the CFO correction in this manner CDM. One approach assumes a diagonal CFO matrix to decouple the different codes' soft symbol decisions, and each soft symbol decision is independently corrected to obtain hard decisions. Another approach employs direct CFO matrix inversion and multiplies it by a despread soft symbol decision vector to obtain corrected soft symbol decisions. Another approach first performs a single-user correction on the despread soft symbol decisions so, which are then sliced to obtain initial hard decisions. In the next step of this particular approach the initial hard decisions are multiplied by the CFO coefficients to obtain an estimate for the undesired ICI, which is then subtracted from the despread soft symbol decisions to obtain cleaner soft symbol decisions, which then can undergo slicing.

Abstract: An electrically and thermally enhanced die-up ball grid array (BGA) package is described. An integrated circuit (IC) package includes a first substrate, a second substrate, and a stiffener. A surface of the first substrate is attached to a first surface of the stiffener. A surface of the second substrate is attached to a second surface of the stiffener. An IC die may be attached to a second surface of the second substrate or to the second surface of the stiffener. Additional electronic devices may be attached to the second surface of the second substrate.

Abstract: There are various mobile communication standards such as GSM, EDGE, and W-CDMA. For a GSM or EDGE system, a receiver must be configured to work with an IF signal with a center frequency and bandwidth of 200 KHz. For WCDMA system, the same receiver must be configured to work with an IF signal with a center frequency of 600 KHz to 1000 KHz and band width of 2000 KHz. Accordingly, a configurable frequency IF filter with the capability to operate with multiple standards is provided.

Abstract: Methods, systems, and apparatuses for integrated circuit (IC) package vertical interconnection are described herein. In an aspect of the invention, an IC package includes an IC die with contact pads. The IC package also includes interconnect members which are coupled to the die at the contact pads. An encapsulating material encapsulates the IC die and the interconnect members such that a contact surface of each interconnect member is accessible at a surface of the encapsulating material. A second IC package is coupled to the first IC package through the plurality of interconnect members of the first IC package. In an example, solder balls attached to a bottom of the second IC package are coupled to the contact surfaces of the interconnect members to couple the first IC package and the second IC package.

Abstract: A single integrated circuit is provided to enable the distribution of voice, video, and/or data services throughout a multimedia distribution network, such as a cable communications network. The single integrated circuit supports both digital and analog television services (e.g., PVR, pay-for-view, EPG, e-commerce, etc.) and computer data services (e.g., telephony, Internet browsing, facsimile, messaging, videoconferencing, etc.). In an embodiment, the single integrated circuit includes three components that constitute a DOCSIS™ compliant cable modem, namely an inband demodulator, an upstream burst modulator, a media access controller, and a microprocessor. In an embodiment, a digital out-of-band demodulator is also included. In another embodiment, the single integrated circuit integrates front-end and backend set-top box functionality in addition to DOCSIS™ cable modem functionality.

Abstract: A clock signal regeneration system and method to adjust the phase of a frequency-locked clock signal is provided. The system includes a numerically controlled oscillator, a clock source, and an adder. In one embodiment, additional components are included in the system to ensure that underflow or overflow of the numerically controlled oscillator is prevented. In another embodiment, additional components are included to ensure that output pulses from the numerically controlled oscillator do not occur within a minimum time interval. The method includes deriving a phase adjustment factor, adding the phase adjustment factor to a frequency control word, providing the modified frequency control word to a numerically controlled oscillator and generating a phase shifted, frequency-locked output signal.

Abstract: An integrated circuit includes receive circuits for receiving packets, transmit circuits for transmitting packets, a packet DMA circuit for communicating packets to and from a memory controller, and a switch for selectively coupling the receive circuits to transmit circuits. The integrated circuit may flexibly merge and split the packet streams to provide for various packet processing/packet routing functions to be applied to different packets within the packet streams. An apparatus may include two or more of the integrated circuits, which may communicate packets between respective receive and transmit circuits.

Abstract: A physical layer device (PLD) includes a first serializer-deserializer (SERDES) device and a second SERDES device. Each SERDES device includes an analog portion with a serial port that is configured to communicate serial data with various network devices, and a digital portion that is configured to communicate parallel data with other various network devices. The PLD includes a first signal path that is configured to route serial data signals between the analog portions of the SERDES devices, bypassing the digital portions of the SERDES devices. Therefore, the SERDES devices can directly communicate serial data without performing parallel data conversion. A second signal path is configured to route recovered clock and data signals between the analog portions of the SERDES devices, but still bypassing the digital portions of the SERDES devices. The recovered clock and data signals are then regenerated before being transmitted over a network device.

Abstract: Methods and apparatuses for improved integrated circuit (IC) packages are described herein. In an aspect, an IC device package includes an IC die having a contact pad, where the contact pad is located on a hotspot of the IC die. The hotspot is thermally coupled to a thermal interconnect member. In an aspect, the package is encapsulated in a mold compound. In a further aspect, a heat spreader is attached to the mold compound, and is thermally coupled to the thermal interconnect member. In another aspect, a thermal interconnect member thermally is coupled between the heat spreader and the substrate.

Abstract: A shorted resistive block formed in line with at least one trace of a plurality of a top metal layer includes a plurality of resistors with a removable shorting link coupled across the resistive block. The resistive block comprises one of a plurality of series coupled shorted resistors and a shorted plurality of parallel coupled resistors. If harmonic interference needs to be reduced, a short is removed and the resistive block is operably coupled to parasitic capacitance thereby creating an R-C filter. The real performance is re-evaluated after removing the short. If the re-evaluation determines a desired R-C filter value should be increased, the resistance of the resistive block is increased by opening a shorting link. In the series configured resistive block, resistance is increased by removing a short across a resistor. In the parallel configuration, the resistance is increased by cutting a removable link coupled in series with each resistor.

Abstract: A radio receiver includes a low noise amplifier, intermediate frequency mixing stage, complex bandpass filter, a single analog to digital converter, a 1st digital mixing module, and a 2nd digital mixing module. The low noise amplifier is operably coupled to amplify a modulated radio frequency (RF) signal to produce an amplified modulated RF signal. The intermediate frequency mixing stage is operably coupled to mix the amplified modulated RF signal with a local oscillation to produce a modulated IF signal. The complex bandpass filter filters an I and Q component of the modulated IF signal to produce a filtered IF signal. The single analog to digital converter is operably coupled to convert the filtered IF signal into a digital IF signal. The 1st and 2nd mixing modules each receive the digital IF signal and mix the digital IF signal with an in-phase and quadrature digital local oscillation to produce a 1st baseband signal component and a 2nd baseband signal component.

Abstract: A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port interface, wherein the second data port interface supports a plurality of data ports for transmitting and receiving data at a second data rate, along with a third data port interface for transmitting and receiving data at a third data rate. A CPU interface is provided and configured to communicate with a CPU. The switch includes a first, second and third internal memory communicating with the first, second and third data port interface. A first and second memory management unit for communicating data and to control access to and from the second internal memory, are also provided. A communication channel is provided for communicating data and messaging information.

Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.

Abstract: Described herein is a method and system for sampling rate conversion. A clamped cubic spline interpolator (CCSI) may be utilized to interpolate or decimate a source signal to provide samples at times based on a sink rate. The source clock and sink clock may be driven by independent oscillators, and may therefore drift independently. A rate tracking algorithm may monitor the relative drift and adjust the conversion of the source signal to track the sink rate.

Abstract: A method for in-place, lightweight Ack packet promotion in a wireless network environment is provided. The method includes receiving a new Ack packet via a wireless network; searching through a transmit queue for an old Ack packet that corresponds to the new Ack packet; and replacing the data in a number field, a checksum field, a window size field, and a timestamp options field of the old Ack packet with data in a number field, a checksum field, a window size field, and a timestamp options field of the new Ack packet.

Abstract: Systems and techniques for receiving a satellite signal wherein the signal is demodulated and iterative decoded. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes a wireless interface unit, a processing unit, an input/output unit, and a power management unit. The wireless interface unit wirelessly interfaces with the wirelessly enabled host using a communication interface protocol. The power management unit couples to the wireless interface unit, the processing unit, and the input/output unit. The wireless interface unit supports paging operations in which the wireless interface device is able to receive a page during a wirelessly enabled host in a page scanning period that corresponds to a duration of the page hopping sequence of the host.

Abstract: A servo field preamble detector includes an upsampling module that generates a plurality of upsampled read samples by upsampling a read signal by an upsampling factor. An interpolation filter module generates a plurality of interpolated read samples from the plurality of upsampled read samples. A peak detection module identifies a plurality of peak samples from the plurality of interpolated read samples. A magnitude estimation module generates a magnitude estimation signal from the plurality of peak samples. A comparison module compares the magnitude estimation signal to a magnitude threshold and asserts a servo preamble detection signal when the magnitude estimation signal compares favorably to the magnitude threshold.

Abstract: An IP network includes a central entity and at least one customer premises equipment (CPE) device. The central entity generates a program clock reference (PCR) clock and provides audio-visual packets to a CPE based on the PCR clock. The CPE sets a first clock based on the PCR clock for decoding operations. The CPE sets a second clock that is independent from the first clock for audio and video output operations. For example, the CPE can process the audio-visual packets using the second clock.