Abstract: In a semiconductor device, it is preferable to suppress a variation in characteristics of a temperature sensor. The semiconductor device is provided that includes a semiconductor substrate having a first conductivity type drift region, a transistor section provided in the semiconductor substrate, a diode section provided in the semiconductor substrate, a second conductivity type well region exposed at an upper surface of the semiconductor substrate, a temperature sensing unit that is adjacent to the diode section in top view and is provided above the well region, and an upper lifetime control region that is provided in the diode section, at the upper surface side of the semiconductor substrate, and in a region not overlapping with the temperature sensing unit in top view.

Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.

Abstract: A semiconductor device includes: a semiconductor substrate; a first insulating film provided on one surface of the semiconductor substrate; a first resistance layer including polysilicon provided on the first insulating film; a second insulating film provided on the first resistance layer; a second resistance layer including polysilicon provided on the second insulating film so as to overlap with the first resistance layer; a third insulating film provided on the second resistance layer; a first electrode provided over the third insulating film and electrically connected to the second resistance layer; and a second electrode electrically connected to the first resistance layer, wherein the first resistance layer and the second resistance layer each include a body part and a first contact part having a higher impurity concentration than the body part, and the respective first contact parts are in contact with each other.

Abstract: A semiconductor device having a semiconductor chip and a control circuit. The semiconductor chip has a gate electrode pad connected to the gate of an output element and the gate of a current monitor element, a sense emitter electrode pad connected to the sense emitter of the current monitor element and to the anode of the temperature detection diode via a current limiting element, and a cathode electrode pad that is connected to the cathode of the temperature detection diode, the cathode being grounded without being connected to the emitter of the output element. In a temperature detection mode, the control circuit receives a temperature detection voltage via the sense emitter electrode pad and detects the temperature state of the output element. In a current detection mode, the control circuit receives a sense current via the sense emitter electrode pad and detects the current state of the output element.

Abstract: The present invention is directed to provide a semiconductor device capable of protecting a switching element even though having a capacitor connected to a control signal input terminal of the switching element. Semiconductor device includes an IGBT including a gate configured to be input a gate signal and a current detection terminal used to detect at least one of overcurrent or short-circuit current, a gate capacitor arranged between the gate and a reference potential terminal, the gate capacitor being disconnected from the gate as needed, and a disconnection unit configured to disconnect a connection between the gate capacitor and the gate when a detection current being a current output from the current detection terminal is equal to or larger than a first current set on a basis of a minimum current causing oscillation in a loop circuit formed by including the IGBT and the gate capacitor.

Abstract: A semiconductor module includes: a semiconductor device; a bonding layer that is arranged on the semiconductor device, contains nickel or copper, and is electrically connected to the semiconductor device; a solder portion containing gold, disposed on the bonding layer; and a protective layer disposed directly on the bonding layer, covering an outer peripheral edge of the bonding layer.

Abstract: A semiconductor module, including a cooler having first and second flow passages respectively formed on first and second sides of the semiconductor module that are opposite to each other, and a third flow passage connecting the first and second flow passages. The semiconductor module further includes a laminated substrate disposed on the cooler and having first to third circuit boards, a first sensing chip having a sensing function for detecting a temperature and a first non-sensing chip not having the sensing function, disposed on the first circuit board side by side along the third flow passage, and a second sensing chip having the sensing function and a second non-sensing chip not having the sensing function, disposed on the third circuit board side by side along the third flow passage. The first and second sensing chips are respectively disposed on the second side and the first side of the semiconductor module.

Abstract: Provided is a semiconductor device including a semiconductor substrate; a hydrogen donor that is provide inside the semiconductor substrate in a depth direction, has a doping concentration that is higher than a doping concentration of a dopant of the semiconductor substrate, has a doping concentration distribution peak at a first position that is a predetermined distance in the depth direction of the semiconductor substrate away from one main surface of the semiconductor substrate, and has a tail of the doping concentration distribution where the doping concentration is lower than at the peak, farther on the one main surface side than where the first position is located; and a crystalline defect region having a crystalline defect density center peak at a position shallower than the first position, in the depth direction of the semiconductor substrate.

Abstract: A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 ?m. The temperature of a heat treatment which is performed in order to change a proton into a donor and to recover a crystal defect after the proton implantation is equal to or higher than 400° C. In a carrier concentration distribution of the n-type buffer layer, a width from the peak position of carrier concentration to an anode is more than a width from the peak position to a cathode.

Abstract: A silicon carbide semiconductor device includes silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a first semiconductor region of the first conductivity type, a trench, a gate insulating film, a gate electrode, and an interlayer insulating film. The first semiconductor layer and the second semiconductor layer constitute a first-conductivity-type semiconductor layer and in a deep region of the first-conductivity-type semiconductor layer at least 1 ?m from an interface with the third semiconductor layer, a maximum value of a concentration of aluminum is less than 3.0×1013/cm3. In the deep region of the first-conductivity-type semiconductor layer, a maximum value of a concentration of boron is less than 1.0×1014/cm3.

Abstract: Provided is a method of manufacturing a semiconductor device that can lead a surface of sinter paste to be flattened before depositing a power semiconductor chip so as to achieve high-density packaging. The manufacturing method applies sinter paste having a surface provided with a projection to a main surface of a conductive plate, dries the sinter paste, flattens the surface of the sinter paste by applying a pressure to the sinter paste so as to squash the projection on the surface of the sinter paste, deposits a semiconductor chip on the main surface of the conductive plate with the sinter paste interposed, and sinters the sinter paste by heating and pressure application to form a bonding layer so as to bond the conductive plate and the semiconductor chip together via the bonding layer.

Abstract: A semiconductor device includes a first input conductive plate on which a plurality of first semiconductor chips arranged in a first direction, a first output conductive plate extending in the first direction and being provided adjacent to the first input conductive plate, a case having first to fourth side walls for accommodating the first input conductive plate and the first output conductive plate, first main current wiring members, each of which connects one of the first output electrodes to a front surface of the first output conductive plate, a first detection terminal disposed in the first side wall, and a first detection wiring member connecting the front surface of the first output conductive plate to the first detection terminal. The first output conductive plate is disposed closer to the first side wall than is the first input conductive plate.

Abstract: A semiconductor apparatus includes an insulating substrate having a circuit board electrically connected to a semiconductor device, and a terminal member having a main terminal and a connection terminal bonded to the circuit board. The connection terminal has at least one distal end portion bonded to the circuit board, a main body portion that rises from the at least one distal end portion and extends toward the main terminal, and a coupling portion having a conductive property and being coupled to the main body portion. The main body portion has a main body coupling portion to which the coupling portion is coupled. A cross-sectional area of the coupling portion perpendicular to a direction in which a current flows in the coupling portion is larger than a cross-sectional area of a main body coupling portion perpendicular to a direction in which a current flows in the main body coupling portion.

Abstract: A manufacturing method of a semiconductor device includes sealing a metal plate on which a semiconductor chip and a control IC are mounted by injecting molding resin raw material into a cavity from an inlet, filling the cavity with the molding resin raw material, and discharging excessive molding resin raw material from an outlet. In the case of the semiconductor device manufactured in this way, at least, generation of voids is reduced in an area around the semiconductor chip and the control IC. Thus, occurrence of an electrical discharge in the semiconductor device is reduced, and deterioration of the reliability of the semiconductor device is prevented.

Abstract: A semiconductor module including first and second transistors coupled in parallel to a first line receiving a power supply voltage, a driver circuit configured to apply, to a second line, a first voltage to turn on the first and second transistors in response to an input signal, a first resistor having two ends respectively coupled to the second line and a control electrode of the second transistor, a second resistor having two end respectively coupled to one of the two ends of the first resistor and a control electrode of the first transistor, a third resistor coupled to the second transistor, a third transistor coupled to one of the two ends of the second resistor, and a terminal coupled to the first to third transistors, the third resistor, and a load, such that the load receives a current from the first transistor.

Abstract: A semiconductor device includes pads arrayed between a region where a transistor portion or a diode portion is disposed and a first end side on an upper surface of a semiconductor substrate, and a gate runner portion that transfers a gate voltage to the transistor portion. The gate runner portion has a first gate runner disposed passing between the first end side of the semiconductor substrate and at least one of the pads in the top view, and a second gate runner disposed passing between at least one of the pads and the transistor portion in the top view. The transistor portion is also disposed in the inter-pad regions, the gate trench portion disposed in the inter-pad regions is connected to the first gate runner, and the gate trench portion arranged so as to face the second gate runner is connected to the second gate runner.

Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate; a transistor portion including an emitter region on the top of the semiconductor substrate; a diode portion including a cathode region on the bottom of the semiconductor substrate and a second conductivity type overlap region in a region other than the cathode region and arranged alongside to the transistor portion a preset arrangement direction on the top of the semiconductor substrate; and an interlayer dielectric film provided between the semiconductor substrate and an emitter electrode and including a contact hole for connecting the emitter electrode and the diode portion. The overlap region is provided to have a first length between the end of the emitter region and the end of the cathode region and a second length, which is shorter than the first length, between the end of the contact hole and the end of the cathode region.

Abstract: Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Abstract: A semiconductor device is provided, including: a semiconductor substrate; a first-conductivity-type drift region provided in the semiconductor substrate; a trench portion provided from an upper surface of the semiconductor substrate to an inside of the semiconductor substrate, and extending in a predetermined extending direction in a plane of the upper surface of the semiconductor substrate; a mesa portion provided in contact with the trench portion in an array direction orthogonal to the extending direction; a second-conductivity-type base region provided in the mesa portion above the drift region and in contact with the trench portion; and a second-conductivity-type floating region provided in the mesa portion below the base region, in contact with the trench portion, and provided in at least a part of the mesa portion in the array direction.

Abstract: A semiconductor module includes a multilayer substrate having a main wiring layer formed therein, a main current flowing in the main wiring layer when the semiconductor device is turned on, a first and second semiconductor elements, each of which has a top electrode on a top surface thereof and a bottom electrode on a bottom surface thereof, and is disposed on a top surface of the main wiring layer to which the bottom electrode is conductively connected, a metal plate having an end portion, a bottom surface of the end portion being conductively connected to the top electrode of the first semiconductor element, and a control board including an insulating plate disposed on the top surface of the end portion and a control wiring layer disposed on a top surface of the insulating plate for controlling turning on and off of the first and second semiconductor elements.