Abstract: A semiconductor module includes: a mounting substrate including a mounting surface; a semiconductor element disposed on the mounting surface; a housing for the semiconductor element; a lid fixed to the housing and facing the mounting surface; an insulating sealing material disposed in a space inside the housing and sealing the semiconductor element; and a first adsorbent disposed between the lid and the insulating sealing material and is swollen by adsorption.

Abstract: A semiconductor device comprising a semiconductor substrate having upper and lower surfaces and a hydrogen containing region containing hydrogen and helium is provided. The carrier concentration distribution of the hydrogen containing region has: a first local maximum point; a second local maximum point closest to the first local maximum point among local maximum points positioned between the first local maximum point and the upper surface; a first intermediate point of the local minimum between the first and second local maximum points; and a second intermediate point closest to the second local maximum point among local minimum points or flat points where the carrier concentration remains constant positioned between the second local maximum point and the upper surface. A highest point of a helium concentration peak is positioned between the first and second local maximum points. The carrier concentration is lower at the first intermediate point than the second intermediate point.

Abstract: A solder material having a good thermal-cycle fatigue property and wettability. The solder material contains not less than 5.0% by mass and not more than 8.0% by mass Sb, not less than 3.0% by mass and not more than 5.0% by mass Ag, and the balance of Sn and incidental impurities. Also, a semiconductor device may include a joining layer between a semiconductor element and a substrate electrode or a lead frame, the joining layer being obtained by melting this solder material.

Abstract: A semiconductor device including a semiconductor chip, an insulating circuit board having a circuit pattern formed on an insulating plate, a case including a frame part having an opening that is substantially rectangular in a plan view of the semiconductor device, inner wall surfaces of the frame part at the opening forming a storage part to store the insulating circuit board, and a printed circuit board which has a flat plate shape and which protrudes from one of the inner wall surfaces of the frame part toward the storage part. The semiconductor device further includes a sealing material filled in the storage part, to thereby seal the semiconductor chip and the printed circuit board. A front surface of the sealing material forms a sealing surface, and in a thickness direction of the semiconductor chip, the sealing surface is higher around the printed circuit board than around the semiconductor chip.

Abstract: A semiconductor device is preferably excellent in characteristics such as a loss characteristic. Provided is a semiconductor device including a semiconductor substrate, including an upper-surface electrode provided on an upper surface of the semiconductor substrate; an lower-surface electrode provided on a lower surface of the semiconductor substrate; a transistor portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; a first diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; and a second diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode, wherein the first diode portion and the second diode portion have different resistivities in a depth direction of the semiconductor substrate.

Abstract: A semiconductor device includes, as a semiconductor region in which semiconductor layers are formed, an active region through which current flows and an edge termination structure region outside the active region and in which an edge termination structure is formed. The semiconductor device includes as the semiconductor layers: a drift layer of a first conductivity type and a base layer of a second conductivity type, in contact with the edge termination region; and includes an interlayer insulating film provided on the semiconductor region, on a side thereof where the base layer is formed. The edge termination region has a first semiconductor layer of the second conductivity type, continuous from the base layer and having an outer peripheral end not in contact with the interlayer insulating film, and a second semiconductor layer of the first conductivity type, in contact with the first semiconductor layer and forming a first PN junction therewith.

Abstract: An object of the present invention is to provide a power converter capable of reducing inductance and preventing a manufacturing process from becoming complicated.

Abstract: A power converter includes a case including an outlet with an outlet opening in a principal surface thereof, and a wiring member having, as an external connection portion, a portion that extends out from the outlet opening and is bent at the outlet opening toward the principal surface. The external connection portion of the wiring member has a first surface facing the principal surface and includes a spacer provided on the first surface at a position adjacent to the outlet opening. The spacer is sandwiched between the first surface of the drawn-out portion and the principal surface of the case.

Abstract: A method of manufacturing a semiconductor device having first and second main surfaces opposite to each other. The method includes: forming a first electrode at the first main surface of the semiconductor wafer; applying a first tape to the second main surface of the semiconductor wafer; forming roughness at a portion of a surface of the first tape; applying a second tape to an outer peripheral portion of the semiconductor wafer, so as to cover the portion of the surface of the first tape, with the roughness formed thereon, at the second main surface of the semiconductor wafer, to cover a portion of the first main surface of the semiconductor wafer, and to cover a side surface of the semiconductor wafer; heating the semiconductor wafer after the first and second tapes are applied; and subsequently forming a plated film at the surface of the first electrode by a plating treatment.

Abstract: A semiconductor device includes: an insulated circuit substrate; a semiconductor chip provided on the insulated circuit substrate; a first external connection terminal provided on the insulated circuit substrate; a relay terminal provided on the insulated circuit substrate; a printed circuit board arranged over the semiconductor chip and connected to the first external connection terminal and the relay terminal; and a first snubber circuit provided on the printed circuit board and having one end connected to the first external connection terminal via the printed circuit board and another end connected to the relay terminal via the printed circuit board.

Abstract: A semiconductor device in which delamination between a casing including polyphenylene sulfide with an inorganic filler and a sealing material can be suppressed. A semiconductor device including a casing 16 including an inorganic filler in a matrix including polyphenylene sulfide; a semiconductor element 11 mounted on a laminated substrate 12; and a sealing material 20 sealing the semiconductor element, wherein the inorganic filler is exposed from the matrix on a surface F of the casing 16 facing the sealing material.

Abstract: An abnormal input control circuit includes at least one of a first, a second or a third detection circuit. The first detection circuit detects, as a first detection result, a noise superimposed on an input signal. The second detection circuit detects, as a second detection result, whether a pulse width of the input signal is less than or equal to a determined pulse width. The third detection circuit detects, as a third detection result, a mismatch between a level of the input signal and an operation of the switching element. An alarm and protection circuit includes an alarm signal output function and/or a drive adjustment function. Based on the first detection result, second detection result and/or the third detection result, the alarm and protection circuit outputs an alarm signal to outside by the alarm signal output function, and/or adjusts driving of the switching element by the drive adjustment function.

Abstract: A frame body includes reinforcing portions. The reinforcing portions are each provided in the region formed by a side frame and one of a pair of attachment frames in plan view. Each reinforcing portion is in contact with the side frame, the one of the pair of attachment frames, and the corner at which the side frame and one of the pair of attachment frames are joined.

Abstract: A semiconductor module, including a converter circuit configured to generate an alternating-current (AC) voltage from a direct-current (DC) voltage input thereto, by receiving a first potential that is positive, a second potential that is negative, and a third potential lower than the first potential and higher than the second potential. The converter circuit includes a plurality of parallel connection structures, each parallel connection structure including an insulated gate bipolar transistors (IGBT) and a diode device connected in parallel. At least one of the parallel connection structures includes a reverse conducting IGBT.

Abstract: A semiconductor device includes: a substrate of a first conductivity type; a first diffusion layer of a second conductivity type provided in an upper part of the substrate; a conductive layer embedded in a trench provided in an upper part of the first diffusion layer via an insulating film, the conductive layer forming a capacitive element together with the first diffusion layer and the insulating film; and a second diffusion layer of the first conductivity type provided in an upper part of the first diffusion layer so as to be shallower than the trench and to constitute a resistive element, wherein at least a part of the trench and at least a part of the second diffusion layer are alternately arranged side by side in a plan view.

Abstract: An integrated circuit, including: a first current source; a second current source provided in parallel to the first current source; a first resistor with one end coupled to an output of the first current source; a first bipolar transistor that is diode-connected and is coupled to the other end of the first resistor; a second bipolar transistor that is diode-connected and is coupled to an output of the second current source; a second resistor coupled to the second bipolar transistor; and an output circuit configured to output a voltage based on a first voltage outputted from the first current source and a second voltage outputted from the second current source.

Abstract: An object of the present invention is to provide a power converter capable of preventing upsizing of a chip on which a switching element is formed and detecting the temperature in a switching operation of the switching element. A power converter includes: an IGBT connected between an IGBT connected to the positive electrode side of a variable power supply and the negative electrode side of the variable power supply; a temperature detection resistor element connected to a gate to which a gate signal for controlling the switching operation of the IGBT is input and detecting the temperature of the IGBT; and a detector detecting the temperature level of the IGBT based on the voltage of the gate.

Abstract: A semiconductor device has a semiconductor base substrate, a first electrode disposed on the surface of the semiconductor base substrate, a protective film covering an end portion of the first electrode, and a second electrode disposed on the first electrode, in an opening of the protective film. The protective film has an end portion where the protective film and the second electrode overlap. In a plan view of the semiconductor device, the end portion has a convex portion with a first radius of curvature and a concave portion with a second radius of curvature. The convex portion protrudes in a direction away from the opening, and the convex portion is recessed toward the opening. The first radius of curvature is larger than the second radius of curvature.

Abstract: First and second buffer regions and an n?-type drift region are sequentially formed by epitaxial growth on an n+-type starting substrate. An impurity concentration of the first buffer region is higher than that of the n?-type drift region and lower than that of the n+-type starting substrate. An impurity concentration of the second buffer region is higher than that of the first buffer region and continuously increases by a first impurity concentration gradient from a first gradient changing point toward the n?-type drift region to a second gradient changing point toward the first buffer region; continuously decreases by a second impurity concentration gradient from the first gradient changing point to a first interface; and continuously decreases by a third impurity concentration gradient from the second gradient changing point to a second interface. The second impurity concentration gradient is lower than the third impurity concentration gradient.

Abstract: A sensor device for measuring a physical quantity. The sensor device includes a sensor element having a semiconductor chip, a first terminal electrically connected to the sensor element, and a housing portion having a terminal, which is a second terminal and is electrically connected to the first terminal. The second terminal has a through-hole formed therein, the through-hole having a first end and a second end opposite to each other, an inner surface of the through hole at the first end being an R-surface that is a curved surface with a radius R. The first terminal is housed in the housing portion, and has one end thereof inserted in the through-hole from the first end of the through-hole.