Patents Assigned to Fuji Electric Holdings Co., Ltd.
  • Publication number: 20070030881
    Abstract: A data transmission method superimposes a spread code onto data in order to synthesize a first signal. The method changes the switching frequency of a switching power supply based on the first signal, transmitting the second signal to a plurality of semiconductor apparatuses (satellite apparatuses) via an output line of the switching power supply. The method changes the DC output voltage level of the second signal on the output line of the switching power supply wherein a satellite apparatus may use the second signal for controlling and instructing the satellite apparatuses to make the satellite apparatus shift, for example, from the stopped state or the sand-by mode to the normal operation mode so that the satellite apparatus may receive the first signal.
    Type: Application
    Filed: July 25, 2006
    Publication date: February 8, 2007
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Haruhiko Nishio
  • Patent number: 7170699
    Abstract: A master disk has an aspect ratio of a width of a groove to a depth thereof to facilitate embedding of a soft magnetic film in the groove for stabilizing magnetic printability. The master disk has at least two differently shaped grooves, in each of which the width of the groove is equal to the width in the sector direction of a servo pattern and the depth is varied. A servo pattern has a width equal to a width of the groove in the sector direction, with the depth of the groove being proportional to the servo pattern width. At least two depths of grooves are provided for embedding magnetic materials on a substrate of the master disk. The depth of the groove for embedding the soft magnetic film is made shallow in a region where the pattern width of the servo pattern is narrow and made deep in a region where the pattern width is wide.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: January 30, 2007
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Hiroyuki Yoshimura
  • Publication number: 20070015333
    Abstract: A method of manufacturing a semiconductor device is disclosed that includes the treating the surface of a SiC semiconductor substrate prior to forming a gate oxide film on the SiC semiconductor substrate in order to etch the SiC semiconductor substrate by several nm to 0.1 ?m with hydrogen in a reaction furnace. The treating is conducted a reduced pressure in the furnace, at a temperature of 1500° C. or higher. The manufacturing method facilitates the removal of particles and oxide residues remaining on the trench inner wall after trench etching in the manufacturing process for manufacturing a SiC semiconductor device having a fine trench-type MOS gate structure.
    Type: Application
    Filed: June 13, 2006
    Publication date: January 18, 2007
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Daisuke Kishimoto, Takeshi Tawara, Takashi Tsuji, Shunsuke Izumi
  • Publication number: 20070001936
    Abstract: An organic EL display device and method of forming and driving the same is matrix-driven by using a two-terminal nonlinear element. A display device having a substrate and first stripe electrodes, second stripe electrodes disposed crosswise to the first stripe electrodes, and a plurality of pixels disposed overlappingly between the first and second stripe electrodes on the substrate. Each pixel is provided with a switching element including a two-terminal nonlinear element connected electrically to the first stripe electrodes, a light-emitting portion connected electrically to the switching element and the second stripe electrodes, and a capacitor portion containing an organic dielectric material as a dielectric layer, connected electrically to the switching element and the second stripe electrodes in parallel with the light-emitting portion.
    Type: Application
    Filed: August 12, 2004
    Publication date: January 4, 2007
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Haruo Kawakami, Hisato Kato, Keisuke Yamashiro
  • Publication number: 20070001251
    Abstract: A spin injection magnetization reversal element includes a ferromagnetic fixed layer, an isolation layer and a ferromagnetic free layer. The area of contact between the ferromagnetic fixed layer and the isolation layer is larger than an area of contact between the ferromagnetic free layer and the isolation layer. The ferromagnetic fixed layer may be divided into ferromagnetic first fixed layer and ferromagnetic second fixed layer, and the isolation layer may be divided into first isolation layer and second isolation layer. The ferromagnetic first fixed layer may be arranged on one of opposed principal surfaces of the ferromagnetic free layer with the first isolation layer in between, and the ferromagnetic second fixed layer may be arranged on the other of the opposed principal surfaces of the ferromagnetic free layer with the second isolation layer in between. The element holds recorded magnetization and can reverse magnetization with a small current density.
    Type: Application
    Filed: June 27, 2006
    Publication date: January 4, 2007
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventor: Akira Saito
  • Publication number: 20060284155
    Abstract: A switching device in which an organic bistable material layer containing an organic bistable compound having two types of stable resistance against an applied voltage is provided between at least two electrodes. In the switching device, a first electrode layer, an electric charge injection suppressing layer, an organic bistable material layer and a second electrode layer are sequentially formed on a substrate as respective thin films, in which the electric charge injection suppressing layer contains an electrically conductive layer which allows an electric charge injection amount from the first electrode layer to the organic bistable material layer to be small compared with that in a case in which the electric charge is directly injected from the first electrode layer to the organic bistable material layer without providing the electric charge injection suppressing layer.
    Type: Application
    Filed: May 30, 2006
    Publication date: December 21, 2006
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Haruo Kawakami, Hisato Kato, Keisuke Yamashiro, Kyoko Kato
  • Patent number: 7141517
    Abstract: A method and an apparatus for repairing short circuits between electrodes of a multi-color organic light-emitting display device. A multi-color organic light-emitting display device having a color-converting filter section is provided. Then a short-circuited part between electrodes in the device is eliminated by irradiating the short-circuited part with a laser beam. The laser irradiation is carried out from the side of the device on which the color-converting filter section is not present. The method is carried out in an environment in which the moisture content is below a certain threshold value such as a vacuum or a dry nitrogen atmosphere.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Koji Kawaguchi, Makoto Kobayashi, Kenya Sakurai
  • Publication number: 20060256487
    Abstract: A semiconductor superjunction device has a superjunction structure formed in a drift region of the device. The superjunction structure has alternately arranged n-type regions and p-type semiconductor regions layered parallel with the drift direction of carriers, permitting current flow when turned ON and depleting when turned OFF. It also includes a first intrinsic semiconductor region between the n-type and p-type regions. The first intrinsic semiconductor region and the n-type and p-type regions sandwiching the first intrinsic semiconductor region forming a unit. A plurality of units are repetitively arranged to form a repetitively arranged structure. The value of mobility of one of electrons in the n-type region or holes in the p-type region is equal to or less than half the value of mobility of corresponding to one of electrons or holes in the first intrinsic semiconductor region.
    Type: Application
    Filed: March 8, 2006
    Publication date: November 16, 2006
    Applicant: FUJI ELECTRIC HOLDING CO., LTD.
    Inventors: Daisuke Kishimoto, Susumu Iwamoto, Katsunori Ueno
  • Publication number: 20060258055
    Abstract: A wiring board has a circuit pattern that includes metal foil attached to an insulating layer, and a built-up circuit pattern disposed on top of the metal foil circuit pattern. The built-up circuit pattern is an increased thickness laminate of cold spray processed metal material. Even when a power semiconductor is mounted on the built-up circuit pattern, the heat that is generated by losses therein can be diffused by the built-up circuit pattern. The wiring board has excellent heat dissipation, can be manufactured by a small number of process steps, and is of low cost.
    Type: Application
    Filed: February 22, 2006
    Publication date: November 16, 2006
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Kenji Okamoto
  • Publication number: 20060252243
    Abstract: An epitaxial film deposition system includes a reactor, a susceptor, a wafer heating unit, a reactant gas supply orifice, and an aperture for venting the reactant gas. The reactant gas is supplied to a reactor region between the susceptor and a graphite plate so as to circulate in layered flow in a direction along the reactor inner wall in the planar direction of a mounted SiC wafer. The temperature of the wafer is controlled by a high frequency coil and halogen lamps based on temperatures detected by a pyrometer. By circulating the reactant gas over the surface of the stationary wafer, it is possible to form, under various process conditions, an SiC epitaxial film having good film quality and good uniformity of film thickness, without providing any wafer rotation mechanism.
    Type: Application
    Filed: April 6, 2006
    Publication date: November 9, 2006
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Daisuke Kishimoto, Takeshi Tawara, Shunsuke Izumi
  • Publication number: 20060249797
    Abstract: On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips.
    Type: Application
    Filed: March 27, 2006
    Publication date: November 9, 2006
    Applicant: FUJI ELECTRIC HOLDING CO., LTD.
    Inventors: Haruo Nakazawa, Kazuo Shimoyama, Manabu Takei
  • Publication number: 20060244006
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Application
    Filed: June 23, 2006
    Publication date: November 2, 2006
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Publication number: 20060238191
    Abstract: A spin injection magnetic domain wall displacement wall displacement device has a plurality of spin injection magnetic domain wall displacement elements. Each element includes a magnetic domain wall displacement layer having a magnetic domain wall, a first magnetic layer group having at least one ferromagnetic layer, and a second magnetic layer group having at least one ferromagnetic layer. The first magnetic layer group is disposed at one end or side of the magnetic domain wall displacement layer and the second magnetic layer group disposed at the other end or side thereof. The magnetic domain wall in the magnetic domain wall displacement layer is displaced by flowing electrons between the first magnetic layer group and the second magnetic layer group.
    Type: Application
    Filed: April 4, 2006
    Publication date: October 26, 2006
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD
    Inventor: Akira SAITO
  • Publication number: 20060237808
    Abstract: A spin injection magnetic domain wall displacement device has a plurality of spin injection magnetic domain wall displacement elements. Each element includes a magnetic domain wall displacement layer having a magnetic domain wall, and a first, second, and third magnetic layer groups each having a ferromagnetic layer. The first, second, and third magnetic layer groups are disposed in the order on the same side of the magnetic domain wall displacement layer. The magnetic domain wall is displaceable by flowing electrons between the first and third magnetic layer groups. The position of the magnetic domain wall in the magnetic domain wall displacement layer is detectable based on the difference in the electrical resistance across the second and first or third magnetic layer groups. The magnetic domain wall displacement layer is in antiferromagnetic coupling with the first magnetic layer group, and in antiferromagnetic or ferromagnetic coupling with the third magnetic layer group.
    Type: Application
    Filed: April 20, 2006
    Publication date: October 26, 2006
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Akira SAITO
  • Patent number: 7126294
    Abstract: A photovoltaic inverter control method includes steps of monitoring a variation in output voltage of a solar battery by a power and voltage monitoring circuit (51) and, when the variation occurs, accelerating or decelerating an electric motor (3) to maximize the output voltage of the solar battery (1), whereby the electric motor for driving, for example, a pump and a fan by the solar battery as a power source can be driven by a photovoltaic inverter always at the maximum power point of the solar battery.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: October 24, 2006
    Assignees: Ebara Corporation, Fuji Electric Holdings Co., Ltd.
    Inventors: Masahiro Minami, Hiroaki Ichikawa, Masahito Kawai, Yukio Murai, Kaoru Nakajima
  • Patent number: 7119409
    Abstract: In the case of a top emission structure color organic EL display in which are bonded together a substrate having thin film transistors formed thereon and a transparent substrate having color-converting filters formed thereon, an overcoat layer for adjusting the gap between the substrates and an overcoat layer for relieving stress are formed between the substrates without providing a space between the overcoat layers and the EL device, whereby there can be provided an organic EL display having high reliability, with the occurrence of voids that would have an adverse effect on the display performance being prevented, and the occurrence of thermal and mechanical stress being suppressed.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: October 10, 2006
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Yukinori Kawamura, Kenya Sakurai
  • Patent number: 7112865
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: September 26, 2006
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Publication number: 20060207645
    Abstract: A method of manufacturing a solar cell module with a plurality of solar cell submodules includes temporarily fixing an adhesive resin layer on the power generation layer of a solar cell to protect the power generation layer. The solar cell is then divided into the plurality of solar cell submodules. The adjacent solar cells are connected by lead-out electrodes with connection wiring. Another layer of adhesive resin is provided only on a surface opposite to the power generation layer of the solar cell submodules and, together with the adhesive resin on the surface of the power generation layer, melts and adheres to a protective member or a support member. The method reduces both the materials and effort required for production, and decreases manufacturing costs, while preventing poor adhesion of wiring material and surface material.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 21, 2006
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Takehito Wada
  • Patent number: 7109551
    Abstract: A semiconductor structure with device trench and a semiconductor device in the device trench, that enables realization of high integration, lowered on-resistance, reduction in switching losses and a high operation speed in a semiconductor device provided with a lateral IGBT, and that prevents malfunctions such as latchup when IGBTs or an IGBT and CMOS devices are integrated together. The structure includes an SOI substrate having a supporting substrate, an oxide film and a p?-semiconductor layer. An island-like element-forming region is isolated by a trench isolation region from surroundings. The trench isolation region includes an isolation trench with an insulation film on its inner wall. The device trench is formed in the element-forming region. A gate electrode is formed with a gate insulator film in the device trench. A collector region and an emitter region outside are provided respectively on the bottom and the outside of the device trench.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: September 19, 2006
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Akio Sugi, Naoto Fujishima
  • Publication number: 20060202196
    Abstract: A thin film field effect transistor is disclosed that includes a gate electrode, a gate insulator film the on gate electrode, and a first organic electronic material film containing a first organic electronic material on the gate insulator film. A source electrode and a drain electrode are spaced apart from each other on the first organic electronic material film. The first organic electronic material film includes a portion between the source electrode and the drain electrode that is in contact with the gate insulator film. This portion provides a current path. The current is controlled by the potential of the gate electrode. There is a second organic electronic material film that is in contact with the surface of first organic electronic material film opposite to the portion that provides the current path. The second organic electronic material film contains a second organic electronic material and an electron acceptor or an electron donor.
    Type: Application
    Filed: January 20, 2006
    Publication date: September 14, 2006
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Haruo Kawakami, Hisato Kato, Takahiko Maeda, Nobuyuki Sekine