Patents Assigned to Fuji Electric Holdings Co., Ltd.
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Patent number: 7307330Abstract: A reverse blocking semiconductor device that shows no adverse effect of an isolation region on reverse recovery peak current, that has a breakdown withstanding structure exhibiting satisfactory soft recovery, that suppresses aggravation of reverse leakage current, which essentially accompanies a conventional reverse blocking IGBT, and that retains satisfactorily low on-state voltage is disclosed. The device includes a MOS gate structure formed on a n? drift layer, the MOS gate structure including a p+ base layer formed in a front surface region of the drift layer, an n+ emitter region formed in a surface region of the base layer, a gate insulation film covering a surface area of the base layer between the emitter region and the drift layer, and a gate electrode formed on the gate insulation film. An emitter electrode is in contact with both the emitter region and the base layer of the MOS gate structure.Type: GrantFiled: April 4, 2006Date of Patent: December 11, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventors: Michio Nemoto, Manabu Takei, Tatsuya Naito
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Publication number: 20070281192Abstract: A fuel cell power generation system has a condensing heat exchanger with a decarbonation device for removing carbon dioxide dissolved in condensed water including an inclined plate which has an upper side with an upper surface and a lower side with a lower surface. The inclined plate is made of a porous material, and is configured so that, by circulating air for decarbonation from the lower side toward the upper side of the inclined plate and simultaneously flowing the condensed water down from the upper side toward the lower side of the inclined plate, the condensed water comes into contact with the air for decarbonation on both the upper and lower surfaces of the inclined plate while flowing down along the inclined plate.Type: ApplicationFiled: May 31, 2007Publication date: December 6, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventor: Norio Sasaki
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Publication number: 20070281462Abstract: A method for manufacturing a silicon carbide (SiC) semiconductor device is disclosed that uses dry etching with the use of high-density inductive coupled plasma (ICP). The method employs a first dry etching and a sequential second dry etching under conditions that differ from those used in the first dry etching. The dry etch process allows a trench to be deeply etched to a depth of more than 3 ?m in a SiC laminated semiconductor substrate and allows the bottom of the trench to be flat without forming a convexo-concave shape having an acute angle which has an influence on characteristics of a breakdown voltage due to electric field concentration being caused in the bottom.Type: ApplicationFiled: June 4, 2007Publication date: December 6, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTDInventor: Yasuyuki Kawada
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Publication number: 20070275624Abstract: Manufacturing an organic EL display by: forming n types of color filter layers on a transparent substrate; forming a dye layer containing (n?1) types of color conversion dyes by a dry process; forming an organic EL device on the dye layer; and exposing the dye layer to dye-decomposing light from the side of the transparent substrate to form an m-th type color conversion layer at a position corresponding to an m-th type color filter layer; where n represents an integer from 2 to 6; m represents an integer from 1 to (n?1); each of the color filter layers transmits light in a different wavelength region; m-th type color conversion dye is decomposed by light cut by the m-th type color filter layer; and the m-th type color conversion layer emits light transmitted by the m-th type color filter layer after wavelength distribution conversion.Type: ApplicationFiled: December 14, 2006Publication date: November 29, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Koji Kawaguchi, Toshio Hama, Yutaka Terao
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Publication number: 20070262362Abstract: A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate electrode, a gate insulator film covering the surface of the gate electrode, a buffer region of one conductivity type in contact with the semiconductor substrate, a base region of the other conductivity type adjacent to the buffer region on the gate insulator film, and an emitter region of the one conductivity type adjacent to the base region on the side opposite to the buffer region. The semiconductor device and the method of manufacturing thereof can further improve the tradeoff between the on-voltage and the turn-off loss by increasing the amount of electrons injected from a cathode on the surface to increase an amount of carriers on the cathode side in a stable turned-on state of the device.Type: ApplicationFiled: July 20, 2007Publication date: November 15, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Setsuko WAKIMOTO, Manabu TAKEI, Shinji FUJIKAKE
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Patent number: 7294965Abstract: A color-conversion light-emitting device includes a color-conversion layer for converting a wavelength distribution of light, a light-emitting unit formed on the color-conversion layer and having a pair of transparent electrodes and an organic EL light-emitting layer disposed between the transparent electrodes, and a color filter layer formed on the light-emitting unit. The color-conversion light-emitting device may further include a reflective layer, a wavelength selection mirror, a second color-conversion layer, or a passivation layer.Type: GrantFiled: December 11, 2003Date of Patent: November 13, 2007Assignee: Fuji Electric Holding Co., Ltd.Inventors: Makoto Kobayashi, Koji Kawaguchi
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Patent number: 7294439Abstract: A color-converting-function-possessing color filter and a method for its manufacture are disclosed. A simplified manufacturing process is provided that makes possible highly detailed patterning. The method of manufacturing the color-converting filter comprises a step of forming color filter layers on a transparent substrate, a step of forming a colorant layer containing a color-converting colorant on the color filter layers, and a step of exposing the colorant layer via the transparent substrate and the color filter layers using colorant-decomposing light, thus forming color-converting layers in positions corresponding to the color filter layers. In usage, a layered body consists of a transparent substrate, color filter layers and a colorant layer as a color-converting-function-possessing filter.Type: GrantFiled: August 31, 2004Date of Patent: November 13, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventors: Koji Kawaguchi, Makoto Kobayashi, Toshio Hama, Kenya Sakurai
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Publication number: 20070243722Abstract: A method of manufacturing a device on a silicon carbide substrate is disclosed. The device includes an oxide layer which has silicon oxide as a main component on the silicon carbide semiconductor substrate. The method includes depositing and oxide layer on a surface of the silicon carbide semiconductor substrate; raising a temperature of the oxide layer in a non-oxidizing atmosphere to a temperature bringing the oxide layer into a liquefied state; and then rapidly cooling the oxide layer down to a temperature equal to or less than 1140° C. to form the oxide layer including silicon oxide as a main component. The silicon carbide semiconductor device has improved channel mobility to lower on-resistance by decreasing an interface state density at an interface between the oxide insulator film that has silicon oxide as its main component and the silicon carbide semiconductor substrate.Type: ApplicationFiled: April 18, 2007Publication date: October 18, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTDInventors: Shun-ichi NAKAMURA, Yoshiyuki YONEZAWA
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Publication number: 20070235755Abstract: A semiconductor device and method of manufacturing the same includes an n?-single crystal silicon substrate, with an oxide film selectively formed thereon. On the oxide film, gate polysilicon is formed. The surface of the gate polysilicon is covered with a gate oxide film whose surface is covered with a cathode film doped in an n-type with an impurity concentration higher than that of the substrate as an n?-drift layer. In the cathode film, a section in contact with the substrate becomes an n+-buffer region with a high impurity concentration, next to which a p-base region is formed. Next to the p-base region, an n+-source region is formed. On the cathode film, an interlayer insulator film is selectively formed on which an emitter electrode is formed. A semiconductor device such as an IGBT is obtained with a high rate of acceptable products, an excellent on-voltage to turn-off loss tradeoff and an excellent on-voltage to breakdown voltage tradeoff.Type: ApplicationFiled: June 14, 2007Publication date: October 11, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventor: Manabu TAKEI
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Patent number: 7276778Abstract: A semiconductor system includes a self arc-extinguishing device, and an IGBT that works as a thyristor when a current between a first terminal and a second terminal connected to a second well electrode is small, and as a bipolar transistor when that current is large, and automatically switches between them according to the magnitude of the current. The IGBT is formed with a first conductivity-type semiconductor substrate. On a surface layer of the substrate is a second conductivity-type well region to which a first well electrode is connected. A first conductivity-type emitter region, to which an emitter electrode is connected, is disposed on a surface layer in the well region. A control electrode is disposed through an insulating film partially covering the well and emitter regions. A second conductivity-type well layer, to which the second well electrode is connected, is disposed on a back surface side of the substrate.Type: GrantFiled: June 30, 2005Date of Patent: October 2, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventor: Koh Yoshikawa
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Publication number: 20070224769Abstract: A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate electrode, a gate insulator film covering the surface of the gate electrode, a buffer region of one conductivity type in contact with the semiconductor substrate, a base region of the other conductivity type adjacent to the buffer region on the gate insulator film, and an emitter region of the one conductivity type adjacent to the base region on the side opposite to the buffer region. The semiconductor device and the method of manufacturing thereof can further improve the tradeoff between the on-voltage and the turn-off loss by increasing the amount of electrons injected from a cathode on the surface to increase an amount of carriers on the cathode side in a stable turned-on state of the device.Type: ApplicationFiled: May 29, 2007Publication date: September 27, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Setsuko Wakimoto, Manabu Takei, Shinji Fujikake
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Patent number: 7271536Abstract: An organic EL panel is discloses that includes a substrate and a segment display section provided on the substrate. The segment display section includes an organic EL light emitting section and plural kinds of color modulating sections. The organic EL light emitting section has a single reflective electrode, an organic EL layer, a shadow mask having a plurality of openings, and a single transparent electrode. The plural kinds of color modulating sections are arranged adjacent to the substrate, and each of the plural kinds of color modulating sections is divided into a plurality of subsections. Each of the plural kinds of color modulating sections can be composed of either a color filter layer or a laminated structure of a color filter layer and a color conversion layer. Emitting color of the segment display section can be adjusted by the positions and number of the openings arranged in the shadow mask.Type: GrantFiled: January 23, 2007Date of Patent: September 18, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventor: Hiroshi Kimura
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Publication number: 20070210316Abstract: A semiconductor device and a manufacturing method thereof uses a semiconductor substrate of silicon carbide. On one principal surface side of the substrate, at its central section, a layer of silicon carbide or gallium nitride as a semiconductor layer having the thickness at least necessary for breakdown voltage blocking is epitaxially grown or formed from part of the substrate. A recess is formed in the other principal surface side of substrate at a position facing the central section. A supporting section surrounds the bottom of the recess and provides the side face of the recess. The recess is formed by processing such as dry etching. The semiconductor device, even though the semiconductor substrate is made thinner for the realization of small on-resistance, can maintain the strength of the semiconductor substrate capable of reducing occurrence of a wafer cracking during the manufacturing process.Type: ApplicationFiled: March 8, 2007Publication date: September 13, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Yoshiyuki YONEZAWA, Daisuke KISHIMOTO
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Publication number: 20070207597Abstract: An active region in a semiconductor device is made up of a parallel p-n layer including a first p-semiconductor layer and a first n-semiconductor with the widths and total amounts of impurities being equal to each other to provide a structure in which charges are balanced. A section parallel to stripes in the parallel p-n layer in an inactive region is made up of a second parallel p-n layer including a second p-semiconductor layer, with its width larger than that of the first p-semiconductor layer, and a second n-semiconductor layer with its width smaller than that of the first n-semiconductor layer. The total amount of impurities in the second p-semiconductor layer is made larger than that in the second n-semiconductor layer to provide a structure in which charges are made unbalanced.Type: ApplicationFiled: May 8, 2007Publication date: September 6, 2007Applicant: Fuji Electric Holdings Co., Ltd.Inventors: Kouta Takahashi, Susumu Iwamoto
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Patent number: 7262100Abstract: A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate electrode, a gate insulator film covering the surface of the gate electrode, a buffer region of one conductivity type in contact with the semiconductor substrate, a base region of the other conductivity type adjacent to the buffer region on the gate insulator film, and an emitter region of the one conductivity type adjacent to the base region on the side opposite to the buffer region. The semiconductor device and the method of manufacturing thereof can further improve the tradeoff between the on-voltage and the turn-off loss by increasing the amount of electrons injected from a cathode on the surface to increase an amount of carriers on the cathode side in a stable turned-on state of the device.Type: GrantFiled: September 2, 2005Date of Patent: August 28, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventors: Setsuko Wakimoto, Manabu Takei, Shinji Fujikake
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Patent number: 7262478Abstract: A semiconductor device and method of manufacturing the same includes an n?-single crystal silicon substrate, with an oxide film selectively formed thereon. On the oxide film, gate polysilicon is formed. The surface of the gate polysilicon is covered with a gate oxide film whose surface is covered with a cathode film doped in an n-type with an impurity concentration higher than that of the substrate as an n?-drift layer. In the cathode film, a section in contact with the substrate becomes an n+-buffer region with a high impurity concentration, next to which a p-base region is formed. Next to the p-base region, an n+-source region is formed. On the cathode film, an interlayer insulator film is selectively formed on which an emitter electrode is formed. A semiconductor device such as an IGBT is obtained with a high rate of acceptable products, an excellent on-voltage to turn-off loss tradeoff and an excellent on-voltage to breakdown voltage tradeoff.Type: GrantFiled: September 2, 2005Date of Patent: August 28, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventor: Manabu Takei
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Patent number: 7262459Abstract: An active region in a semiconductor device is made up of a parallel p-n layer including a first p-semiconductor layer and a first n-semiconductor with the widths and total amounts of impurities being equal to each other to provide a structure in which charges are balanced. A section parallel to stripes in the parallel p-n layer in an inactive region is made up of a second parallel p-n layer including a second p-semiconductor layer, with its width larger than that of the first p-semiconductor layer, and a second n-semiconductor layer with its width smaller than that of the first n-semiconductor layer. The total amount of impurities in the second p-semiconductor layer is made larger than that in the second n-semiconductor layer to provide a structure in which charges are made unbalanced.Type: GrantFiled: February 9, 2005Date of Patent: August 28, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventors: Kouta Takahashi, Susumu Iwamoto
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Publication number: 20070197017Abstract: The present invention provides a manufacturing method of a semiconductor module which enables the joining at a low temperature within a short time and can obtain more reliable joining portions by performing the joining without using a solder joining medium.Type: ApplicationFiled: March 2, 2004Publication date: August 23, 2007Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Kozo Fujimoto, Hirohiko Watanabe, Kazutaka Ikemi, Keiichi Matsumura, Masayoshi Shimoda, Katsumi Taniguchi, Tomoaki Goto
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Publication number: 20070187695Abstract: A semiconductor device and a method of forming thereof has a base body has a field stopping layer, a drift layer, a current spreading layer, a body region, and a source contact region layered in the order on a substrate. A trench that reaches the field stopping layer or the substrate is provided. A gate electrode is provided in the upper half section in the trench. In a section deeper than the position of the gate electrode in the trench, an insulator is buried that has a normal value of insulation breakdown electric field strength equal to or greater than the value of the insulation breakdown electric field strength of the semiconductor material of the base body. This inhibits short circuit between a gate and a drain due to insulation breakdown of an insulator film at the bottom of the trench to realize a high breakdown voltage in a semiconductor device using a semiconductor material such as SiC.Type: ApplicationFiled: January 17, 2007Publication date: August 16, 2007Applicant: C/O FUJI ELECTRIC HOLDINGS CO., LTD.Inventors: Shun-ichi NAKAMURA, Yoshiyuki YONEZAWA
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Patent number: 7256431Abstract: An insulating substrate includes a metal base as a base member, an insulating layer which is a room temperature, aerosol deposited shock solidification film formed on the metal base, and a circuit pattern which is a cold sprayed thermal spray coating formed on the insulating layer. A semiconductor device incorporates the insulating substrate, and thereby has improved heat radiation characteristics.Type: GrantFiled: November 22, 2005Date of Patent: August 14, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventor: Kenji Okamoto