Patents Assigned to Fuji Electric Holdings Co., Ltd.
  • Publication number: 20090039342
    Abstract: Such a thin film transistor and a process for producing the same are provided that is capable of preventing the FET characteristics from being deteriorated with a short channel length.
    Type: Application
    Filed: August 24, 2006
    Publication date: February 12, 2009
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Takahiko Maeda, Haruo Kawakami, Hisato Kato, Nobuyuki Sekine, Kyoko Kato
  • Publication number: 20090043032
    Abstract: Disclosed is a reactive flame retardant which provides a resin with excellent flame retardance even when it is added in a small amount while being prevented from bleedout. Also disclosed is a flame-retardant resin processed article obtained by using such a reactive flame retardant. An organophosphorus compound represented by the general formula (I) below, wherein at least one or more of X1-X3 represent a group containing phosphorus and having a terminal unsaturated group, is used as a reactive flame retardant which is reactive with resins. A flame-retardant resin processed article can be obtained by solidifying the resin composition containing the organophosphorus compound and then reacting it through heating or application of radiation.
    Type: Application
    Filed: February 16, 2006
    Publication date: February 12, 2009
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Toshiyuki Kanno, Yoshinobu Sugata, Hironori Yanase, Kiyotaka Shigehara
  • Patent number: 7476138
    Abstract: A method of manufacturing a plurality of organic EL displays, by sealing and cutting an organic EL substrate, controlling the adhesion width and cutting the glass substrate without extending the cutting position. An organic EL substrate, and a sealing glass substrate with recesses opposing each laminate of the organic EL substrate, have adhesion regions surrounding each recess, and adhesion escape grooves having a substantially equal depth surrounding each adhesion region. The two substrates are laminated together with an adhesive. The sealing glass substrate is cut at a position outside and within a distance of [(a length equal to a thickness of the sealing glass substrate)?(a length equal to a depth of the adhesive escape groove)] of the inner side-wall of the adhesive escape groove. The organic EL substrate is cut at a position outside the inner side-wall of the adhesive escape groove.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: January 13, 2009
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Hideyo Nakamura
  • Patent number: 7477015
    Abstract: A sealing glass substrate that allows control of adhesion width and ready cutting of the glass substrate without extending the cutting position in a process of manufacturing organic EL displays by sealing and cutting an organic EL substrate containing one or more organic EL (electroluminescent) display parts. The sealing glass substrate seals an organic EL substrate that includes one or more organic EL laminates. The sealing glass substrate is formed of a glass plate and includes one or more recesses each opposing one of the organic EL laminates. An adhesion region surrounds each recess, and an adhesion escape groove surrounds each adhesion region. The recesses and adhesion escape grooves are of substantially equal depth.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: January 13, 2009
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Hideyo Nakamura
  • Publication number: 20090008675
    Abstract: To enable driving at a high withstand voltage and a large current, increase latchup immunity, and reduce ON resistance per unit area in an IGBT, a trench constituted by an upper stage trench and a lower stage trench is formed over an entire wafer surface between an n+ emitter region and a p+ collector region, and the trench is filled with a trench-filling insulating film. Thus, a drift region for supporting the withstand voltage is folded in the depth direction of the wafer, thereby lengthening the effective drift length. An emitter-side field plate is buried in the trench-filling insulating film to block a lateral electric field generated on the emitter side of the trench-filling insulating film, and as a result, an electric field generated at a PN junction between an n? drift region and a p base region is reduced.
    Type: Application
    Filed: April 13, 2008
    Publication date: January 8, 2009
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Hong-fei Lu
  • Patent number: 7474014
    Abstract: A data transmission method superimposes a spread code onto data in order to synthesize a first signal. The method changes the switching frequency of a switching power supply based on the first signal, transmitting the second signal to a plurality of semiconductor apparatuses (satellite apparatuses) via an output line of the switching power supply. The method changes the DC output voltage level of the second signal on the output line of the switching power supply wherein a satellite apparatus may use the second signal for controlling and instructing the satellite apparatuses to make the satellite apparatus shift, for example, from the stopped state or the sand-by mode to the normal operation mode so that the satellite apparatus may receive the first signal.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: January 6, 2009
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Haruhiko Nishio
  • Publication number: 20080291137
    Abstract: A driver device is provided for an organic EL passive matrix device that achieves reduction in power consumption and suppression of uneven luminance at a low cost. The driver device includes a column driver, a first row driver, a second row driver, a memory, and a power supply/control signal input. An anode of each organic EL element of the organic EL passive matrix device is connected to an output of the column driver, and cathodes in a row are connected together to an input of the row driver. In the driver device, the column driver is disposed in the vicinity of one peripheral side of the IC, and each of the row drivers is disposed in the vicinity of one of the two peripheral sides adjacent to the peripheral side at which the column driver is disposed. These three drivers are packaged on a single integrated chip (IC) chip.
    Type: Application
    Filed: May 22, 2008
    Publication date: November 27, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Nobuhiko TSUJI
  • Patent number: 7456570
    Abstract: An organic EL display includes an organic EL device comprising lower electrodes, upper electrodes and an organic EL layer therebetween, and color-converting filter layers that absorb light emitted from the organic EL device and carry out color conversion, a layer having a color filter function of transmitting only the color of the light emitted from the organic EL device is provided between the color-converting filter layers and the organic EL device, whereby there is provided an organic EL display that has good display quality, with a high contrast ratio under illumination with a fluorescent lamp, sunlight or the like.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: November 25, 2008
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Yukinori Kawamura, Koji Kawaguchi, Kenya Sakurai
  • Patent number: 7452439
    Abstract: A vacuum lamination apparatus for performing a vacuum lamination process on a lamination material includes a base plate having two opposing sides for placing the lamination material; and evacuation members having an approximately triangular cross-section and fixed hermetically to the base plate at the two opposing sides. Each of the evacuation members has an evacuation port with a constant distance relative to the base plate. The vacuum lamination apparatus also includes end plates fixed hermetically to ends of each of the evacuation member, and a cover sheet placed on the base plate for covering the lamination material and the evacuation members to form a lamination space for performing the vacuum lamination process.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: November 18, 2008
    Assignee: Fuji Electric Holding Co., Ltd.
    Inventor: Yasuhiro Yokoyama
  • Publication number: 20080280412
    Abstract: Stress is exerted to the SiC crystal in the region, in which the carriers of a SiC semiconductor device flow, to change the crystal lattice intervals of the SiC crystal. Since the degeneration of the conduction bands in the bottoms thereof is dissolved, since the inter-band scattering is prevented from causing, and since the effective electron mass is reduced due to the crystal lattice interval change, the carrier mobility in the SiC crystal is improved, the resistance of the SiC crystal is reduced and, therefore, the on-resistance of the SiC semiconductor device is reduced.
    Type: Application
    Filed: July 21, 2008
    Publication date: November 13, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Takashi TSUJI
  • Publication number: 20080274268
    Abstract: A method of producing an organic EL device is provided that realizes excellent color reproducibility in the organic EL device as a result of the excellent transparency of the passivation layer. During formation of a passivation layer by a CVD method in the production of an organic EL device that is provided with the passivation layer, a layer in which the internal stress is compressive stress and a layer in which the internal stress is tensile stress are stacked by modulating a gas pressure while holding a gas composition ratio constant.
    Type: Application
    Filed: March 24, 2008
    Publication date: November 6, 2008
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventor: Shinji OGINO
  • Patent number: 7446889
    Abstract: A method of evaluating a thickness of a film during a polishing process includes the steps of irradiating light onto a surface of the film during the polishing process; obtaining a differential signal of reflection spectra at a polishing time t and a polishing time t??t with a time difference ?t from the polishing time t; and analyzing the differential signal to obtain a thickness d of the film at the polishing time t.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: November 4, 2008
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Shinji Fujikake
  • Patent number: 7446472
    Abstract: A transparent first substrate and a second substrate of an organic multicolor emission and display device are positioned opposite to each other with a predetermined clearance and sealed with a gap material that performs desiccating a surrounding atmosphere. The gap material advantageously has different void fractions between in an inner portion facing a sealed space within the device and in an outer portion facing an external atmosphere. Featuring the above structure, an organic multicolor emission and display device of color conversion system has been provided that maintains stable light emitting performance for a long period and exhibits excellent visibility angle characteristic.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: November 4, 2008
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Noriyuki Matsukaze
  • Publication number: 20080258211
    Abstract: In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying a high gate drive voltage. The lower half of a trench extending through a p-base region into an n-drift region is filled with a high-permittivity dielectric having a relative permittivity that is higher than that of a silicon oxide film, preferably a silicon nitride film, and an insulated gate structure including a gate insulator and a gate electrode is fabricated on the high-permittivity dielectric. The depth d2 of the deepest portion of the high-permittivity dielectric is designed to be deeper than the depth d1 of a depletion layer in the semiconductor region away from the high-permittivity dielectric.
    Type: Application
    Filed: January 31, 2008
    Publication date: October 23, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Akio SUGI, Tatsuji NAGAOKA, Hong-fei LU
  • Publication number: 20080230004
    Abstract: An apparatus for manufacturing a color conversion filter, having a color filter layer on a transparent substrate. A coloring matter layer containing color conversion coloring matter and an optical radical generating agent are formed on the substrate and the filter layer. The coloring matter layer is exposed to coloring matter decomposition light applied through the substrate and the filter layer. The coloring matter layer also is exposed to auxiliary ultraviolet light applied from the side of the coloring matter layer. This forms a color conversion layer at a position corresponding to the filter layer. The optical radical generating agent is heat vaporized. The color conversion coloring matter is decomposed by light whose wavelength is outside a range that the color filter layer transmits. The coloring matter decomposition light includes a wavelength component that decomposes the color conversion coloring matter.
    Type: Application
    Filed: April 17, 2008
    Publication date: September 25, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Koji Kawaguchi, Makoto Kobayashi, Kenya Sakurai
  • Publication number: 20080224214
    Abstract: The present invention provides an SOI device which has high breakdown voltage, wide stable operation range, good thermal dissipation, and high effective conductance and good frequency characteristics, and a method for fabricating the device. In a semiconductor device, a BOX region is formed on a part of a surface layer of a p substrate. The BOX region is formed around a point where a vertical line is dropped from the center of the gate structure portion, and isolates a drain region and an extended drain region from the p? substrate. The thickness of the drain region is in a 150 nm to 300 nm range, and the thickness of the BOX region is 150 nm or more.
    Type: Application
    Filed: February 15, 2008
    Publication date: September 18, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventor: Hong-fei LU
  • Publication number: 20080226814
    Abstract: A method for manufacturing a vapor-deposited film having a high-resolution pattern, without using a metal mask that makes it difficult to realize high resolution or an expensive laser scanning device. A patterned vapor-deposited film is manufactured by a method including: preparing a deposition panel containing a substrate, a plurality of heating elements, and a deposition material layer formed on the plurality of heating elements, the deposition material layer forming the outermost surface; disposing the deposition panel and a device substrate so that the deposition material layer faces the device substrate; and causing at least some of the plurality of heating elements to generate heat, selectively evaporating the deposition material layer that is positioned on the heating elements that have generated heat, and vapor depositing on a surface of the device substrate to form a vapor-deposited film.
    Type: Application
    Filed: January 17, 2008
    Publication date: September 18, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Yukinori Kawamura, Ryohei Makino, Koji Kawaguchi
  • Publication number: 20080224595
    Abstract: The present invention provides a high-efficiency organic EL device that can be fabricated by a simple process and that can prevent color shift arising from variations in film thickness. The organic EL light-emitting device includes a plurality of independent light-emitting elements that constitute first, second, and third emission color subpixels. The light-emitting elements constituting the first emission color subpixels and the second emission color subpixels have a semitransparent reflective layer between a transparent substrate and a transparent electrode, and this semitransparent reflective layer is configured so as to function with the reflective electrode as a resonator for the light of the emission colors. The light-emitting elements constituting the third emission color subpixels additionally have a color conversion layer between the transparent substrate and the transparent electrode.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 18, 2008
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Yuko Nakamata, Yukinori Kawamura, Toshio Hama, Koji Kawaguchi, Yutaka Terao
  • Publication number: 20080199748
    Abstract: A fuel cell power generation device prevents contamination of the cooling water of the fuel cell and maintains the pressure of the cooling water tank at the atmospheric pressure. The fuel cell power generation device includes a communicating pipe that connects the cooling water tank and the recovered water tank. The communicating pipe has a first blocking part and an open-to-atmosphere part located nearer to the cooling water tank than the first blocking part. An open-to-atmosphere device is located at a position higher than the first blocking part and couples the open-to-atmosphere part of the communicating pipe to atmospheric pressure.
    Type: Application
    Filed: December 11, 2007
    Publication date: August 21, 2008
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventor: Yoshihito Chida
  • Patent number: 7410873
    Abstract: A method of forming a semiconductor device uses an anneal technique to planarize and round corners of a trench formed in a substrate. The substrate is annealed under a normal pressure in an inert atmosphere, such as an atmosphere containing one of argon, helium, and neon, or an atmosphere of a gas mixture of hydrogen of 4% or less and one of argon, helium, and neon at a temperature of between 900° C. and 1050° C. for a time of between 30 seconds and 30 minutes to round the trench corners and planarize the trench side walls. Alternatively, after removing a mask for forming the trench, the substrate can be annealed in the inert atmosphere. This provides easy and inexpensive way of planarizing the trench side walls, as well as rounding of the trench corners. Moreover, by removing the mask for forming the trench before annealing enables the semiconductor device to have a highly reliable gate insulator film with good reproducibility.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: August 12, 2008
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Hitoshi Kuribayashi