Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: The present invention provides a manufacturing method of a semiconductor module which enables the joining at a low temperature within a short time and can obtain more reliable joining portions by performing the joining without using a solder joining medium.

Abstract: In a method of manufacturing a wiring board, a basic circuit pattern is formed on an insulating plate, and a metal layer is formed on the basic circuit pattern by cold spraying to thereby form a built-up circuit pattern on the basic circuit pattern.

Abstract: An active region in a semiconductor device is made up of a parallel p-n layer including a first p-semiconductor layer and a first n-semiconductor with the widths and total amounts of impurities being equal to each other to provide a structure in which charges are balanced. A section parallel to stripes in the parallel p-n layer in an inactive region is made up of a second parallel p-n layer including a second p-semiconductor layer, with its width larger than that of the first p-semiconductor layer, and a second n-semiconductor layer with its width smaller than that of the first n-semiconductor layer. The total amount of impurities in the second p-semiconductor layer is made larger than that in the second n-semiconductor layer to provide a structure in which charges are made unbalanced.

Abstract: A semiconductor device and a method of forming thereof has a base body has a field stopping layer, a drift layer, a current spreading layer, a body region, and a source contact region layered in the order on a substrate. A trench that reaches the field stopping layer or the substrate is provided. A gate electrode is provided in the upper half section in the trench. In a section deeper than the position of the gate electrode in the trench, an insulator is buried that has a normal value of insulation breakdown electric field strength equal to or greater than the value of the insulation breakdown electric field strength of the semiconductor material of the base body. This inhibits short circuit between a gate and a drain due to insulation breakdown of an insulator film at the bottom of the trench to realize a high breakdown voltage in a semiconductor device using a semiconductor material such as SiC. The sidewall surfaces of the trench located below the gate electrode is inclined to form a trapezoidal profile.

Abstract: A switching device is discloses that exhibits two stable resistance values to a voltage applied between electrodes. The switching device comprises thin films of a first electrode layer, an organic bistable material layer and a second electrode layer sequentially formed on a substrate, and the organic bistable material is a specified quinone compound.

Abstract: An organic EL light-emitting device includes a substrate, thin films having a reflecting function formed on the substrate, an organic EL light-emitting layer, and upper electrodes. The thin films having a reflecting function are formed from an amorphous alloy, whereby there can be provided an organic EL light-emitting device having reflective films that have all of a reflecting function, a function of shielding transistors from light, and an electrode function, and moreover have little surface unevenness.

Abstract: A reverse blocking semiconductor device that shows no adverse effect of an isolation region on reverse recovery peak current, that has a breakdown withstanding structure exhibiting satisfactory soft recovery, that suppresses aggravation of reverse leakage current, which essentially accompanies a conventional reverse blocking IGBT, and that retains satisfactorily low on-state voltage is disclosed. The device includes a MOS gate structure formed on a n? drift layer, the MOS gate structure including a p+ base layer formed in a front surface region of the drift layer, an n+ emitter region formed in a surface region of the base layer, a gate insulation film covering a surface area of the base layer between the emitter region and the drift layer, and a gate electrode formed on the gate insulation film. An emitter electrode is in contact with both the emitter region and the base layer of the MOS gate structure.

Abstract: A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device allows a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.

Abstract: A wiring board has a circuit pattern that includes metal foil attached to an insulating layer, and a built-up circuit pattern disposed on top of the metal foil circuit pattern. The built-up circuit pattern is an increased thickness laminate of cold spray processed metal material. Even when a power semiconductor is mounted on the built-up circuit pattern, the heat that is generated by losses therein can be diffused by the built-up circuit pattern. The wiring board has excellent heat dissipation, can be manufactured by a small number of process steps, and is of low cost.

Abstract: A switching device in which an organic bistable material layer containing an organic bistable compound having two types of stable resistance against an applied voltage is provided between at least two electrodes. In the switching device, a first electrode layer, an electric charge injection suppressing layer, an organic bistable material layer and a second electrode layer are sequentially formed on a substrate as respective thin films, in which the electric charge injection suppressing layer contains an electrically conductive layer which allows an electric charge injection amount from the first electrode layer to the organic bistable material layer to be small compared with that in a case in which the electric charge is directly injected from the first electrode layer to the organic bistable material layer without providing the electric charge injection suppressing layer.

Abstract: A method is disclosed for producing a top-emitting organic light emitting diode device containing a substrate having provided thereon at least a lower electrode, an organic layer containing a light-emission layer, and an upper transparent electrode. Also disclosed is the top-emitting organic light emitting diode device produced by the method. The method include the steps of first forming the organic layer, then forming a metallic thin layer capable of forming a transparent electroconductive oxide, and finally oxidizing the metallic thin layer on formation of the upper transparent electrode.

Abstract: In a semiconductor device having SiC vertical trench MOSFETs, it is aimed to prevent the generation of large scattering in the channel resistance without largely increasing the average value of channel resistance. A 4H-SiC substrate having a major face thereof that is generally a {0001} face and having an off angle ?. The trench is formed with the standard deviation ? in scattering of the angle formed by a trench side wall face and a substrate major face within a wafer face. By setting the designed value of the angle formed by the trench side wall face and the substrate major face at an any angle ranging from [(60 degrees)+2?] to [(90 degrees)?tan?1 (0.87×tan ?)?2?] in forming the trench in the SiC substrate, a semiconductor device in which the angle formed by the trench side wall face and the substrate major face is 60 degrees or more but not more than [(90 degrees)?tan?1 (0.87×tan ?)] can be obtained.

Abstract: A transparent electrically conductive film comprising one of In2O3—ZnO, In2O3—SnO2, ZnO, and SnO2 is provided on a surface of a metal electrode of an organic EL (electroluminescent) device on the light-emitting layer side, and the thickness of this transparent electrically conductive film is set such as to satisfy the following equation, where L is the optical distance from the organic light-emitting layer to the metal electrode, and ? is the emission wavelength, whereby light reflected by the metal electrode is made to undergo interference and thus strengthen itself in the device; as a result, there are provided an organic EL device and an organic EL panel using the same, according to which the external quantum efficiency can be improved with no accompanying deterioration in the brightness, and moreover the contrast can be improved: L=(2n+1)?/4 (n=0,1,2, . . . ).

Abstract: An active region in a semiconductor device is made up of a parallel p-n layer including a first p-semiconductor layer and a first n-semiconductor with the widths and total amounts of impurities being equal to each other to provide a structure in which charges are balanced. A section parallel to stripes in the parallel p-n layer in an inactive region is made up of a second parallel p-n layer including a second p-semiconductor layer, with its width larger than that of the first p-semiconductor layer, and a second n-semiconductor layer with its width smaller than that of the first n-semiconductor layer. The total amount of impurities in the second p-semiconductor layer is made larger than that in the second n-semiconductor layer to provide a structure in which charges are made unbalanced.

Abstract: A solder composition containing a lead-free SnZn alloy and a solder flux that contains at least an epoxy resin and an organic carboxylic acid. The organic carboxylic acid is dispersed in the solder composition as a solid at room temperature, and has a molecular weight of from 100 to 200 g/mol.

Abstract: An organic EL device is disclosed in which the amount of dopant added is easily controlled, and which is able to achieve stable light emission that does not depend on the current density of electrical current passing through the device. The organic electroluminescent device includes a first electrode, an organic electroluminescent layer having a hole injecting and transporting layer, an organic emissive layer and an electron injecting and transporting layer, and a second electrode. The organic emissive layer has an inner layer interposed between two outer layers. The outer layers contact the hole injecting and transporting layer and the electron injecting and transporting layer, respectively. The two outer layers are composed of a host material and a first fluorescent dopant, and the inner layer is composed of a host material, a first fluorescent dopant and a second fluorescent dopant. The first fluorescent dopant has a larger bandgap than the second fluorescent dopant.

Abstract: A spin injection magnetization reversal device is disclosed which inhibits an increase in resistance to enable multi-valued data recording. A ferromagnetic fixed layer and n groups each including a ferromagnetic free layer and an isolation layer are disclosed. The groups are disposed from the group including the first ferromagnetic free layer provided on the ferromagnetic fixed layer to the group including the n-th ferromagnetic free layer in the order. Each of the ferromagnetic free layers is preferably formed of one of a CoCrPt alloy, a CoCr alloy and a CoPt alloy with Pt or Cu concentration therein made monotonically decreased from the concentration in the first ferromagnetic free layer to that in the n-th ferromagnetic free layer.

Abstract: A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device and method for manufacturing the same allow a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.

Abstract: A method of patterning a color conversion layer for an organic EL device is provided together with a method of manufacturing a multiple color emitting organic EL display using the patterning method. The patterning method includes forming the color conversion layer on a base having an organic layer and patterning the color conversion layer by carrying out a thermal cycle nano imprint technique.