Patents Assigned to Fujitsu Microelectronics Limited
  • Publication number: 20100193851
    Abstract: Provided is a semiconductor device including a semiconductor substrate having transistors formed thereon, a first interlayer insulating film formed above the semiconductor substrate and the transistors, a ferroelectric capacitor formed above the first interlayer insulating film, a second interlayer insulating film formed above the first interlayer insulating film and the ferroelectric capacitor, a first metal wiring formed on the second interlayer insulating film, and a protection film formed on an upper surface of the wiring but not on a side surface of the wiring.
    Type: Application
    Filed: April 12, 2010
    Publication date: August 5, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Kouichi Nagai
  • Publication number: 20100194620
    Abstract: An A/D converter includes a plurality of comparators that performs sampling of a plurality of reference voltages and analog input signals during a sampling time, and compares each of the plurality of reference voltages with each of the plurality of analog signals during a comparison time. The A/D converter detects bubbles in thermometer codes obtained from output signals of the plurality of comparators and adjusts a ratio of the sampling time and the comparison time of the plurality of comparators so as to reduce the bubbles.
    Type: Application
    Filed: January 27, 2010
    Publication date: August 5, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Masashi KIJIMA
  • Publication number: 20100194352
    Abstract: A charging circuit includes a monitoring part configured to monitor a battery voltage applied to a battery and configured to output an overvoltage signal when the battery is in an overvoltage condition a protection part configured to electrically disconnect the battery from an adaptor when receiving the overvoltage signal, and a switch which, when the battery is electrically disconnected from the adaptor, switches a monitoring node for an adaptor voltage outputted from the adaptor, from a supply node of the battery voltage to a supply node of a system voltage, which is applied to a system electrically connected with the battery and the adaptor, based on the overvoltage signal to cause a control command for controlling the adaptor voltage based on the system voltage to be outputted.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 5, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Mayo KITANO, Masatoshi KOKUBUN
  • Publication number: 20100188542
    Abstract: An imaging device includes a pixel array that includes a plurality of pixels, a data read circuit that sequentially reads the data of a given line from the pixel array, a plurality of column analog-digital converters that perform analog-digital conversion on the data from the data read circuit, and a control signal generating circuit that generates a control signal to control the analog-digital conversion.
    Type: Application
    Filed: January 22, 2010
    Publication date: July 29, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Toshitaka MIZUGUCHI, Katsuyoshi Yamamoto
  • Publication number: 20100190327
    Abstract: A semiconductor device manufacturing method includes: forming a conductive film over a substrate; forming an assist pattern on the conductive film; forming a metal film to cover the conductive film and the assist pattern; etching back the metal film to form at least one side wall film on a side surface of the assist pattern; removing the assist pattern; forming at least one resist pattern to selectively expose a portion of the conductive film and a portion of the side wall film; performing etching using the resist pattern as a mask to remove the exposed portion of the side wall film; and etching the conductive film using the side wall film as a mask to form a gate electrode and a contact region electrically connected to the gate electrode.
    Type: Application
    Filed: January 21, 2010
    Publication date: July 29, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Yuji Setta
  • Publication number: 20100188907
    Abstract: A semiconductor device including a first switch coupled to a first power supply line, a second switch coupled to the first switch and to a second power supply line, and a storage part provided in a path which is between the second power supply line and the first switch, and having a high resistance state and a low resistance state, and wherein the first switch is turned on and the second switch is turned off when a resistance state of the storage part is in a high resistance state.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 29, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Kouji TSUNETOU
  • Publication number: 20100188277
    Abstract: A successive approximation A/D conversion circuit for simultaneously sampling N channels of analog signals and for A/D converting the sampled analog signals, includes: N capacitive main DACs; a resistive sub DAC; N comparators; and a successive approximation control circuit, wherein the successive approximation control circuit determines high-order bit values of A/D conversion results of the N channels of analog signals by controlling the N capacitive main DACs and the N comparators, and determines low-order bit values of the A/D conversion results of the N channels of analog signals by controlling the resistive sub DAC and the N comparators.
    Type: Application
    Filed: November 17, 2009
    Publication date: July 29, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Kenta ARUGA, Suguru TACHIBANA, Koji OKADA
  • Publication number: 20100191982
    Abstract: A device is provided which includes: a processor that outputs a command signal or an address signal and includes a bus module which inputs or outputs a data signal; and an encryption circuit that encrypts or decrypts the data signal in an encryption method using a common key and the address signal, wherein the processor and the encryption circuit are provided in a chip.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 29, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Seiji Goto
  • Publication number: 20100188922
    Abstract: A semiconductor storage device includes a plurality of memory macros including a plurality of memory cell arrays; a low-potential power supply boosting circuit coupling the low-potential power supply to the ground in a normal mode and coupling the low-potential power supply to a voltage higher than a ground voltage in a sleep mode; a virtual power control circuits including a plurality of switches which is turned on when switching from the sleep mode to the normal mode and is turned off when switching from the normal mode to the sleep mode; and a sleep cancellation detecting circuit outputting, when the mode control signal supplied to the plurality of switches in one of the plurality of memory macros indicates to switch form the sleep mode to the normal mode, the mode control signal to a subsequent memory macro subsequent to the one of the plurality of memory macros.
    Type: Application
    Filed: January 28, 2010
    Publication date: July 29, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Yasuhiro NAKAOKA
  • Patent number: 7765510
    Abstract: A wiring design device for an integrated circuit has been disclosed, which is capable of easily changing a via to a redundant via in a route for which search has been completed but which has been found to be changed after the design has advanced and of easily obtaining an optimum solution of a route even if the via is changed to the redundant via.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: July 27, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Ikuo Ohtsuka
  • Publication number: 20100184240
    Abstract: Disclosed is a method of manufacturing a semiconductor device, which comprises the steps of: forming a hydrogen diffusion preventing insulating film covering capacitors; forming a capacitor protecting insulating film on the hydrogen diffusion preventing insulating film; and forming a first insulating film on the capacitor protecting insulating film by a plasma CVD method where, while a high-frequency bias electric power is applied toward the semiconductor substrate, a plasma-generating high frequency electric power is applied to first deposition gas containing oxygen and silicon compound gas. In the method, a condition by which moisture content in the capacitor protecting insulating film becomes less than that in the first insulating film is adopted as a film deposition condition for the capacitor protecting insulating film.
    Type: Application
    Filed: March 25, 2010
    Publication date: July 22, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Kazutoshi IZUMI, Kouichi KOSEKO
  • Patent number: 7760125
    Abstract: An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: July 20, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
  • Patent number: 7760567
    Abstract: A first precharge circuit couples a bit line pair to a precharge voltage line in a standby period, and separates at least an access side of the bit line pair from the precharge voltage line in accordance with operation start of a word line driving circuit. A sense amplifier amplifies a voltage difference of a node pair after the operation start of the word line driving circuit. A switch circuit is provided between the bit line pair and the node pair. The switch circuit has coupled the access side of the bit line pair to an access side of the node pair at an instant of the operation start of the word line driving circuit, and has separated a non-access side of the bit line pair from a non-access side of the node pair at an instant of operation start of the sense amplifier.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 20, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Hiroyuki Kobayashi
  • Publication number: 20100180053
    Abstract: A direct memory access controller is provided, in which an internal storage section storing control setting information; and a control section loading the control setting information from an external storage section to the internal storage section when a transfer request signal does not belong to a first group, and not loading the control setting information from the external storage section to the internal storage section when the transfer request signal belongs to the first group; are included, and a data transfer by a direct memory access is performed in accordance with the control setting information within the internal storage section.
    Type: Application
    Filed: March 24, 2010
    Publication date: July 15, 2010
    Applicant: Fujitsu Microelectronics Limited
    Inventors: Koji Takenouchi, Seiji Suetake
  • Publication number: 20100178744
    Abstract: An insulating film having Hf and O is formed over a semiconductor substrate. A cap film having oxygen and titanium as constituent elements is formed over the insulating film. The insulating film and cap film are thermally treated in a nitrogen gas or noble gas to diffuse titanium in the cap film into the insulating film to form a gate insulating film. A gate electrode film is formed over the gate insulating film.
    Type: Application
    Filed: December 23, 2009
    Publication date: July 15, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Haruhiko Takahashi, Hiroshi Minakata, Naoyoshi Tamura
  • Patent number: 7754619
    Abstract: A method of forming a liquid coating on a substrate that reduces the amount of consumption of the coating liquid and achieves a more even distribution of the thickness of the liquid coating film. The method may include supplying a solvent to a surface of a substrate, starting a supply of a coating liquid to the surface of the substrate while rotating the substrate at a first rotation speed, stopping a rotation of the substrate by decelerating the rotation of the substrate at a deceleration larger than 30000 rpm/sec at a point of time when the supply of the coating liquid is stopped, and then rotating the substrate at a second rotation speed. Accordingly, the dispense amount of the coating liquid is reduced and the film thickness of the coating liquid is flatten.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: July 13, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tomoaki Muramatsu, Yuko Kaimoto, Ichiro Omata
  • Patent number: 7755125
    Abstract: A semiconductor device includes a ferroelectric capacitor formed above the lower interlevel insulating film covering a MOS transistor formed on a semiconductor substrate, including lamination of a lower electrode, an oxide ferroelectric film, a first upper electrode made of conductive oxide having a stoichiometric composition AOx1 and an actual composition AOx2, a second upper electrode made of conductive oxide having a stoichiometric composition BOy1 and an actual composition BOy2, where y2/y1>x2/x1, and a third upper electrode having a composition containing metal of the platinum group; and a multilayer wiring structure formed above the lower ferroelectric capacitor, and including interlevel insulating films and wirings. Abnormal growth and oxygen vacancies can be prevented which may occur when the upper electrode of the ferroelectric capacitor is made of a conductive oxide film having a low oxidation degree and a conductive oxide film having a high oxidation degree.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: July 13, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Wensheng Wang
  • Publication number: 20100173491
    Abstract: A method of forming an insulating layer on an conductive layer; forming a first mask layer and a second mask layer on the insulating layer; forming a resist layer on the second mask layer; patterning the resist layer; patterning the second mask layer by using the resist layer as a mask; etching the first mask layer halfway through its thickness by using the resist layer and the second mask layer as a mask; removing the resist layer; etching a remaining portion of the first mask layer using the second mask layer as a mask; forming an interconnect groove by etching the insulating layer using the first mask layer as a mask; and forming an electrically conductive material into the interconnect groove, thereby forming an interconnect layer connected to the conductive layer.
    Type: Application
    Filed: December 30, 2009
    Publication date: July 8, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Yoshihisa Iba
  • Publication number: 20100172413
    Abstract: A video decoder includes a storage unit that stores therein vector data; and a video generating unit that, when an input stream is abnormal, generates based on data before the input stream became abnormal and the vector data stored in the storage unit, an image that is an image displayed using the data before the input stream became abnormal and to which motion has been added.
    Type: Application
    Filed: March 15, 2010
    Publication date: July 8, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Sho NISHIKAWA
  • Publication number: 20100172267
    Abstract: A method for cooperative data transfer includes establishing a primary wireless connection with a primary access station. The primary wireless connection uses a primary synchronization channel that is transmitted during a first frame of a super frame. The super frame comprises a plurality of frames. The method also includes detecting a secondary synchronization channel generated by an alternate access station during a subsequent frame of the super frame. The method further includes determining whether the detected secondary synchronization channel has a signal strength greater than a threshold signal strength. The method additionally includes receiving permission to begin a cooperative data transfer operation with both the primary access station and the alternate access station.
    Type: Application
    Filed: October 23, 2009
    Publication date: July 8, 2010
    Applicants: Fujitsu Microelectronics Limited, Fujitsu Limited
    Inventors: Dorin Viorel, Masato Okuda, Kevin Power, Luciano Sarperi