Patents Assigned to Fujitsu
  • Patent number: 6169701
    Abstract: In the present invention, the gate electrodes of the bit line transfer gates for bit line pair selection that perform connection and isolation of the sense amplifiers and bit line pairs are put into floating condition during activation of the sense amplifier in the active period. Thus, a system is adopted according to which the potential of the bit line is driven to power source voltage Vcc or high voltage corresponding thereto by the sense amplifier in the active condition, the pre-charging potential of the bit line pair being made lower than half the power source voltage Vcc, for example ground potential Vss.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Satoshi Eto, Masato Matsumiya, Hideki Kanou
  • Patent number: 6169392
    Abstract: A DC—DC converter circuit for performing DC—DC conversion by switching an input voltage on and off achieves high conversion efficiency while, at the same time, making it possible to supply low voltages. The DC—DC converter circuit includes: a level shift circuit which generates a voltage that is lower than the input voltage by a predetermined voltage; a power supply generating circuit which generates a floating power supply having a magnitude equal to the difference between the input voltage and the output voltage of the level shift circuit; a capacitor which is charged up by the floating power supply generated by the power supply generating circuit; and a driver circuit which supplies the charged voltage of the capacitor as a driving voltage to the main switching device in accordance with the operation control signal.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventor: Seiya Kitagawa
  • Patent number: 6169630
    Abstract: An angular dispersive device acts as a virtually imaged phased array (VIPA) which receives an input light, and produces a spatially distinguishable output light in accordance with the wavelength of the input light. First, second and third lenses are arranged in order to focus the input light into the angular dispersive device. The characteristics of the first, second and third lenses are determined to provide an increased beam width in a top view of the output light produced by the angular dispersive device. The first lens collimates the input light in a side view and has no lens effect in a top view. The second lens receives the input light from the first lens, and focuses the input light in the side view and has no lens effect in the top view. The third lens receives the input light from the second lens, and collimates the input light in the top view and has no lens effect in the side view. The angular dispersive device has first and second surfaces.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: January 2, 2001
    Assignees: Fujitsu Limited, Avanex Corporation
    Inventors: Masataka Shirasaki, Simon Cao
  • Patent number: 6169305
    Abstract: The semiconductor device comprises an electrode 36 including a first conductive film 30 formed of an oxide film of a first metal, a second conductive film 32 formed on the first conductive film 30 and formed of the first metal, and a third conductive film 34 formed on the second conductive film 32 and containing a second metal different form the first metal. The second conductive film is sandwiched between the first conductive film and the third conductive film, whereby adhesion of the third conductive film can be improved, and the release of the third conductive film can be prevented.
    Type: Grant
    Filed: July 7, 1999
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Kazuaki Takai, Kazuaki Kondo
  • Patent number: 6168972
    Abstract: An encapsulation process for flip-chip bonding chips to a substrate encapsulates solder balls on the chip in a separate encapsulation process in which the chip is coated with encapsulation layer and then a portion of the encapsulation layer is removed to expose a portion of the solder balls.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Wen-chou Vincent Wang, Michael G. Peters, Dashun S. Zhou, Yasuhito Takahashi
  • Patent number: 6169675
    Abstract: A synchronous rectifying type DC-DC converter including an auxiliary winding, provided on a secondary side of a transformer, for supplying voltages assuming polarities opposite to each other to control terminals of a rectifying switch and of a fly wheel switch, and the rectifying switch and the fly wheel switch are so constructed as not to be turned ON/OFF by a voltage generated on a supply path of an electric current to a load from a secondary winding of the transformer. When connecting a plurality of DC-DC converters in parallel and operating these converters in parallel, an output of any one of the converters stops, and, even if outputs of the other DC-DC converters are inputted to the DC-DC converter concerned and the electric current flows into the current supply path, a voltage based on the above current is not applied to control terminals of the rectifying switch and of the fly wheel switch. The rectifying switch and the fly wheel switch are not therefore turned ON.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: January 2, 2001
    Assignees: Fujitsu Limited, Fujitsu Denso Ltd.
    Inventors: Hiroshi Shimamori, Shigeharu Yamashita, Kazutoshi Fuchigami
  • Patent number: 6168310
    Abstract: Pulsed laser beams are applied to an object to be measured. A first laser beam of a pulsed laser beam having a first wavelength which is oscillated immediately after the rise of the pulsed laser beam, and a second laser beam having a second wavelength which is oscillated thereafter are used. Based on a difference between an intensity of first interfered light of reflected light of the first laser beam or transmitted light thereof, and an intensity of reflected light of the second laser beam or transmitted light thereof, temperatures of the object to be measured, and whether the temperatures are on increase or on decrease are judged. The method and device can be realized by simple structures and can measure a direction of changes of the physical quantities.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Ryo Kurosaki, Jun Kikuchi, Haruhiko Serizawa, Shuzo Fujimura
  • Patent number: 6166872
    Abstract: A read signal from a head is amplified by a read amplifier disposed on a head actuator and is fed via a pair of read only transmission paths through an FPC to a control board. The read only transmission paths are provided with a compensation circuit consisting of an inductance and a resistor which are connected in parallel. The compensation circuit compensates for degradation of frequency characteristics of a read signal attributable to stray capacitance of the FPC and to stray capacitance on the control board side.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Uno, Nobuyuki Mitsunaga
  • Patent number: 6167493
    Abstract: A CPU performs read access to a plurality of resources. A plurality of buffers connect the plurality of resources to the CPU, respectively. The CPU causes one of the plurality of buffers connected to one of the plurality of resources to be in an active state so that the CPU can perform read access to the one of the plurality of resources via the one of the plurality of buffers, the one of the plurality of resources being given priority.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Hidetaka Ebeshu, Hirotoshi Okada, Hideaki Tomatsuri
  • Patent number: 6166871
    Abstract: A method for generating a reliable head position signal including track number validation. A head position signal is generated using two triangular signals PosN and PosQ having a phase difference of a 1/4 period, and a track number which is recorded on the medium. The track number is validated by comparing the relationship of the signs of the signals PosN, PosQ with the track number according to a predetermined rule. The track number may be a corrected if the track number was misread. Subsequently, a position signal generator demodulates the position signal on the basis of the absolute values of signals PosN, PosQ, the signs of the signals PosN, PosQ, and the track number. The accuracy of the head position signal is further improved using a conversion coefficient (position sensitivity factor) for correcting the amplitudes of the signals PosN and PosQ.
    Type: Grant
    Filed: July 28, 1997
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventor: Kazuhiko Takaishi
  • Patent number: 6167142
    Abstract: In an object movement simulation apparatus, a collision arithmetic unit performs arithmetic including a detection of two closest points in accordance with information representative of a plurality of objects. An image producing unit produces a three-dimensional image including a virtual object representative of a closest line coupling the two closest points to each other. The image producing unit produces the three-dimensional image, where a viewpoint is moved in a direction vertical to the closest line, looking at the viewpoint after a movement.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventor: Naoyuki Nozaki
  • Patent number: 6167440
    Abstract: A communication startup processing system has an introduction processor which, upon reception of a connection request from a user terminal through a communication path established via a network service provider using a public circuit, transfers destination information as to a user terminal to be connected to, to another user terminal. When information relative to a connection is transmitted from the other user terminal directly or through the introduction processor from the public circuit, a communication processor disconnects a circuit and starts a connection processor according control information included in the transmitted information, and connects again to a user terminal which has issued a connection request through the communication path based on the transmitted information.
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: December 26, 2000
    Assignees: Fujitsu Limited, TerraNet Product Inc.
    Inventor: Eiichi Hirai
  • Patent number: 6167548
    Abstract: A data error correcting method and apparatus reads two dimensional block data having row data and row error correcting codes and column data and column error correcting codes. In the block data, one column error correcting code is assigned to one column data group, and individual column data groups and individual column error correcting codes are alternately arranged. A control unit corrects errors in the block data on a row by row basis using the row error correcting codes and the row data. The control unit also corrects errors on a column by column basis, in parallel with the row errors, using the column error correcting codes and the column data. The control unit includes a compensation input data generator having a data adjustor and a Galois multiplier. The data adjustor computes a Compensation Galois constant for compensating the input order of the data.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventor: Kenichi Yamakura
  • Patent number: 6166971
    Abstract: A driver circuit transmits a signal to a receiver circuit through a signal transmission line. The driver circuit has an output driver, a front driver, and a level adjuster. The front driver drives the output driver, and the level adjuster adjusts the output level of the front driver. The output driver generates a signal whose level is variable in response to an output level of the front driver.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Hirotaka Tamura, Hideki Takauchi, Tsz-shing Cheung, Kohtaroh Gotoh
  • Patent number: 6166823
    Abstract: A printing apparatus and a printing method for the printing apparatus, along with a paper ejecting position control method and apparatus of the printing apparatus are provided wherein a print control unit is provided with an instruction evacuating area and a paper ejection evacuating area both for storing information associated with the ejecting position. The ejecting position is contained in an instruction provided to a printing portion based on offset information and contents stored in the instruction evacuating area. The contents of the paper ejection evacuating area are updated based on ejecting position contained in the instruction provided to the printing portion. The paper ejection evacuating area is updated based on the actual ejecting position, and the contents of the instruction evacuating area are updated based on the contents of the paper ejection evacuating area in a recovery after printing failure occurred, therefore, paper can always be ejected to the proper position.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Naoto Fujii, Hiroyo Teramoto
  • Patent number: 6165334
    Abstract: A dry etching apparatus comprises a reaction chamber having an inlet of an etching gas and an outlet of a product gas, a first electrode structure provided in the reaction chamber with a major surface adapted for supporting an object, a second electrode structure having a major surface that opposes the major surface of the first electrode structure with a parallel relationship, the second electrode structure having optical passage for passing an optical beam, the optical passage including a transparent window provided on a chamber wall of the reaction chamber, an aperture provided on the major surface of the second electrode structure in alignment with the window, and a void formed between the aperture and the window for freely passing a light beam between the window and the aperture, a cover member mounted detachable on the second electrode structure to cover the major surface thereof wherein the cover member having an aperture in alignment with the aperture on the major surface of the second electrode struc
    Type: Grant
    Filed: November 15, 1993
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventor: Koji Watanabe
  • Patent number: 6167018
    Abstract: An optical information storage apparatus is constructed to include a light source, a polarization beam splitter reflecting a light beam emitted from the light source and irradiating a reflected light beam on a recording surface of a recording medium, a first part for eliminating a coma aberration which is generated due to a light beam which is reflected by the recording surface and passes through the polarization beam splitter, a second part for eliminating an astigmatism which is generated by the polarization beam splitter and the first part, and a third part for generating an astigmatism.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Yasuaki Morimoto, Hideki Nishimoto, Hirataka Ukai
  • Patent number: 6167452
    Abstract: A mechanism enabling plural queues in a downstream telecommunications network element to be treated as a single, joint queue for purposes of connection-level flow control. A pointer in at least one queue descriptor points to a queue descriptor in which is maintained a set of shared, joint counters. Other flow control elements are maintained individually with respect to each queue descriptor. This mechanism enables flow control elements associated with a single transmitter queue to flow control plural connections terminating in plural queues associated with a single receiver processor.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: December 26, 2000
    Assignees: Fujitsu Network Communications, Inc., Fujitsu Limited
    Inventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser, Alan D. Sherman
  • Patent number: 6166973
    Abstract: The present invention is a memory device having a multiple-bit data pre-fetch function wherein the operation of a redundancy checking circuit for comparing addresses and redundant addresses and checking the coincidence or non-coincidence thereof is started with timing prior to performing the last data fetches. The address signals are supplied with the same timing as the supply of the write commands, wherefore it is not always necessary for the operation of comparing the address signals against the redundant addresses of the memory cells, where the switch to the redundant cell array was performed, to have to wait until all of the multiple-bit data to be fetched. Accordingly, with the present invention, the redundancy checking operation is started before all of the data are fetched. In the case of a 2-bit data pre-fetch, the redundancy checking operation is started after the first datum has been fetched, and before the second bit of data is fetched.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: December 26, 2000
    Assignee: Fujitsu, Limited
    Inventor: Naoharu Shinozaki
  • Patent number: 6167566
    Abstract: A variable retrieving unit refers to variable relation information and variable definition information held in an analysis result storing unit and retrieves variables which directly relate to a variable designated by a retrieval designating unit. A display unit displays a variable retrieval result by the variable retrieving unit in a form such that the variable retrieval result can be used for designation for re-retrieval by the retrieval designating unit.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Akihiko Matsuo, Keiko Kawabe, Minako Kimura, Kenji Nagahashi