Patents Assigned to Fujitsu
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Patent number: 6167121Abstract: A modem apparatus performs modulation and demodulation between a telephone circuit and a terminal apparatus. The modem apparatus includes a modem circuit, and a codec circuit performing conversion between an analog signal and a digital signal. Capacitors are provided between the modem circuit and the codec circuit, a signal supplied from the terminal apparatus and a signal supplied from the codec circuit being supplied to the modem circuit, and a signal supplied from the telephone circuit and a signal supplied from the modem circuit being supplied to the codec circuit.Type: GrantFiled: June 17, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventor: Yasuhiro Arai
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Patent number: 6166992Abstract: A semiconductor device includes a one-shot pulse generating circuit that generates a one-shot pulse having a predetermined pulse width at a rise or fall timing of a first clock signal, a cycle time measuring circuit that measures a cycle-time of the first clock signal from the one-shot pulse output from the one-shot pulse generating circuit, an internal clock generating circuit that generates a second clock signal based on the cycle time measured by the cycle time measuring circuit and the one-shot pulse output from the one-shot pulse generating circuit. The second clock signal has a cycle time identical to the first clock signal and has a rise or fall timing which is advanced by a specific time than that of the first clock signal, and the specific time is obtained by subtracting the cycle time of the first clock signal from a predetermined time, and a data output circuit that outputs data after a predetermined delay time from the rise or fall timing of the second clock signal.Type: GrantFiled: March 2, 2000Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Yoshihiro Takemae, Masao Taguchi, Yukinori Kodama, Makoto Yanagisawa, Takaaki Suzuki, Junji Ogawa, Atsushi Hatakeyama, Hirohiko Mochizuki, Hideaki Kawai
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Patent number: 6166964Abstract: A semiconductor memory, such as a multibit DRAM, has a multiple cell array banks, each having multiple cell arrays. Rows of sense amplifiers are located near each of the cell arrays and extend in a first direction. Multiple rows of transfer switches, also extending in the first direction, are located adjacent to each of the cell array banks. A first data bus, which extends in a second direction which is perpendicular to the first direction, connects the sense amplifiers with the transfer switches. Multiple data buffer rows extend in the first direction near the transfer switches. A second data bus, extending in the first direction, connects the transfer switches with the data buffers. A layout pitch is defined by a spacing between adjacent lines of the first data bus. The transfer switches are placed in accordance with the defined layout pitch and the data buffers are placed according to a layout pitch determined by multiplying the defined layout pitch by the number of cell array banks.Type: GrantFiled: April 9, 1999Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventor: Tadao Aikawa
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Patent number: 6165287Abstract: A ferromagnetic tunnel-junction magnetic sensor includes a first ferromagnetic layer, an insulation barrier layer formed on the first ferromagnetic layer and including therein a tunnel oxide film, and a second ferromagnetic layer formed on the insulation barrier layer, wherein the insulation barrier layer includes a metal layer carrying the tunnel oxide film thereon such that the tunnel oxide film is formed of an oxide of a metal element constituting the metal layer, and wherein the insulation barrier layer has a thickness of about 1.7 nm or less but larger than 1 molecular layer in terms of the oxide forming the tunnel oxide film.Type: GrantFiled: August 10, 1999Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Masashige Sato, Kazuo Kobayashi, Hideyuki Kikuchi
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Patent number: 6166875Abstract: A disk device includes a magnetic disk carrying servo information and rotatable about a rotational axis, a magnetic head for reading information from the magnetic disk, a positioning unit for positioning the magnetic head radially over the magnetic disk, and a control unit for controlling the positioning unit according to the servo information. The control unit separately measures a rotational frequency component of the magnetic disk and a high-order frequency component which has frequencies higher than the rotational frequency component, and thereafter controls the positioning unit so as to follow the rotational frequency component while eliminating the high-order frequency component. When the magnetic head is positioned along a circular pattern about the rotational axis of the magnetic disk, the magnetic head is prevented from vibrating while compensating for an eccentricity of the magnetic disk.Type: GrantFiled: April 27, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Takahisa Ueno, Kazuhiko Takaishi
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Patent number: 6164546Abstract: An optical read is capable of reading a bar code in a mounted state when an article carrying the bar code passes and of reading bar codes set in an array format on a menu sheet in a hand-held state. The optical reader comprises a light source, a scanner that is driven by a drive and scans light emanating from the light source, a plurality of reflection mirrors that reflect scanning light scanned by the scanner and create a scanning pattern composed of a plurality of scan trajectories, a read window through which scanning light reflected from the reflection mirrors is emitted, and a light receiver for receiving light reflected from a mark. The optical reader further comprises a mode changer (or control unit) for changing a plurality of operation modes among which one or ones of the plurality of scan trajectories to be validated for reading are different.Type: GrantFiled: January 8, 1999Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Toshimitsu Kumagai, Mitsuharu Ishii, Yuichirou Takashima, Hiroaki Katoh, Toshitaka Aoki
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Patent number: 6165819Abstract: A method of producing a semiconductor device includes a device body producing step, electrically coupling leads and a semiconductor chip, and producing a device body by encapsulating the semiconductor chip by a resin package so that portions of the leads are exposed from the resin package, a honing step, carrying out a honing process using a polishing solution at least with respect to a resin flash adhered on the portions of the leads exposed from the resin package, an etching step, removing an unwanted stacked layer structure formed on the leads by carrying out an etching process after the honing step, and a plating step, carrying out a plating process with respect to the leads after the etching step to form a plated layer made of a soft bonding material. The honing step removes a portion of the unwanted stacked layer structure in addition to the resin flash.Type: GrantFiled: December 7, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Masaaki Seki, Katsuhiro Hayashida, Mitsutaka Sato, Toshio Hamano
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Patent number: 6166433Abstract: The semiconductor device includes a semiconductor chip, an FPC tape for mounting the semiconductor chip thereto, a mold resin for protecting the semiconductor chip, and metal balls provided on the FPC tape for connecting the semiconductor chip to a circuit board. The mold resin has the glass transition temperature not lower than 200.degree. C., the coefficient of linear expansion in the range from 13 to 18 ppm/.degree. C., and Young's modulus in the range from 1500 to 3000 kg/mm.sup.2, whereby warpage of the semiconductor device is mitigated. The semiconductor device can also include a buffer layer. The semiconductor device can be manufactured by collectively molding a plurality of semiconductor chips mounted to the FPC tape and by cutting the molded article into individual semiconductor packages.Type: GrantFiled: December 24, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Akira Takashima, Hidehiko Akasaki, Haruo Kojima, Fumihiko Taniguchi, Kazunari Kosakai, Koji Honna, Toshihisa Higashiyama
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Patent number: 6166733Abstract: Intervals between a plurality of indexes are determined in accordance with the total number of data items and the number of data items corresponding to each of the plurality of indexes. The plurality of indexes are displayed at the intervals thus determined so that the user can readily know the number of data items associated with respective indexes and the distribution of the plurality of indexes.Type: GrantFiled: September 4, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventor: Tsutomu Yamada
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Patent number: 6167519Abstract: A secret information protection system in an information processing system according to the present invention enables prevention of access to secret information by an unauthorized person, and includes; a storage unit for storing secret information to be protected from an unauthorized person; an erasure instructing unit for generating an erasing instruction, and the erasure instructing unit preferably consisting of a switch unit operated by an authorized person or by a cover of the information processing system for generating an ON/OFF signal as the erasing instruction to erase the secret information from the storage unit; and an erasure unit operatively connected to the storage unit for erasing the secret information in accordance with the erasing instruction from the erasure instructing unit.Type: GrantFiled: May 23, 1995Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventor: Masayuki Sonobe
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Patent number: 6163957Abstract: Multilayer circuit lamination methods and circuit layer structures are disclosed which enable one to manufacture high-density multichip module boards and the like at lower cost, with higher yield, with higher signal densities, and with fewer processing steps.Type: GrantFiled: November 13, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Hunt Hang Jiang, Thomas Massingill, Mark Thomas McCormack, Michael Guang-Tzong Lee
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Patent number: 6167091Abstract: An image data encoding apparatus performs a two-step process to expand and compress digital image data. The apparatus includes a transform unit for performing orthogonal transform of the image data in a block-by-block manner and generating transform coefficient data. In the first step of the encoding step, a quantizer quantizes the transform coefficient data using a first quantization coefficient to generate first code data. A coefficient operation unit receives the first code data and computes a second quantization coefficient for determining an optimal compression rate of the image data. In the second step of the encoding process, the quantizer receives the second quantization coefficient and quantizes the transform coefficient data to generate second code data. The transform coefficient data is stored in a memory. By optimally compressing the image data, a high image data compression rate is achieved, which allows a greater number of compressed images to be stored.Type: GrantFiled: May 5, 1998Date of Patent: December 26, 2000Assignee: Fujitsu LimitedInventors: Masaki Okada, Tomohiro Fukuoka
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Patent number: 6163398Abstract: With a dispersion compensating fiber 1, a dispersion compensating fiber material having a dispersion characteristic which is opposite to a dispersion characteristic of an optical transmission path, is formed with a rare-earth element doped region limited to an output side predetermined range of the full length of the fiber, while an input side region 1n is not doped with a rare-earth element. Due to this construction, signal light is amplified inside the doped region 1d even with low power excitation light, so that insertion losses in the dispersion compensating fiber are compensated. Moreover, by providing the dispersion compensating fiber between two stage optical amplifying sections, the noise factor for the overall optical amplifying section is reduced.Type: GrantFiled: July 8, 1998Date of Patent: December 19, 2000Assignee: Fujitsu LimitedInventors: Shinya Inagaki, Keiko Takeda
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Patent number: 6162091Abstract: A connector includes a connector main body and a plurality of terminals, the connector main body being provided with hook parts which can be engaged to notch parts of a printed-circuit board so as to temporarily fix the connector to the printed-circuit board. The connector main body is provided with pins which move within a small region when the pins are forced to move, and, to achieve the temporarily fixed state, the pins are forced to move slightly so that the pins are fitted into openings provided in the printed-circuit board.Type: GrantFiled: February 4, 1999Date of Patent: December 19, 2000Assignee: Fujitsu Takamisawa Component LimitedInventors: Fumio Kurotori, Osamu Daikuhara, Hideo Miyazawa
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Patent number: 6163481Abstract: A wordline tracking structure for use in an array of Flash EEPROM memory cells is provided. The tracking structure serves to match reference and sector core wordline voltages across the entire chip regardless of sector location. The tracking structure includes a second VPXG conductor line operatively connected between sector wordlines of a "far" sector and a reference cell mini-array. The second VPXG conductor line has a substantially smaller time constant than in a first VPXG conductor line operatively connected between an output of a boosting circuit and the sector wordlines of the "far" sector. As a consequence, the reference wordline voltage associated with the reference cell mini-array will track closely the sector wordline voltage during the read operation regardless of the location of the selected sector.Type: GrantFiled: October 29, 1999Date of Patent: December 19, 2000Assignees: Advanced Micro Devices, Inc., Fujitsu LimitedInventors: Shigekasu Yamada, Colin S. Bill, Michael A. VanBuskirk
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Patent number: 6163425Abstract: In a magnetic reproduction apparatus having an MR head, electromigration occurs when a sense current is supplied to the MR head is suppressed, and the service life and reliability of the magnetic reproduction apparatus are improved. Information magnetically recorded on at least one recording medium is read by supplying a sense current to the MR head opposed to the record surface of the recording medium using a current supply circuit, and then decoded by a signal decoder. In the magnetic reproduction apparatus, an MR head information judgment circuit judges whether or not information to be read out from the recording medium by the MR head is needed. Only when the information to be read out by the MR head is needed, does a current supply control circuit allow the current supply circuit to supply the sense current to the MR head. The sense current can be controlled by turning on or off an on-off operation circuit.Type: GrantFiled: December 30, 1997Date of Patent: December 19, 2000Assignee: Fujitsu LimitedInventors: Hiroshi Isokawa, Yukio Abe
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Patent number: 6163443Abstract: An actuator assembly including an actuator arm, a suspension fixed to a front end portion of the actuator arm, and a head slider mounted on a front end portion of the suspension and having a magnetoresistive element. The suspension has a pair of first lead lines each of which has one end connected to the magnetoresistive element, and an easily removable short-circuit pattern for connecting the first lead lines with each other. The actuator assembly further includes a main FPC fixed at one end portion thereof to the actuator arm, and an interconnection FPC having a plurality of second lead lines for interconnecting the first lead lines and a wiring pattern of the main FPC. The interconnection FPC further has a plurality of ground lines for electrically connecting the second lead lines to the actuator arm. In using the actuator assembly in a magnetic disk drive, the short-circuit pattern is fused and each ground line is cut.Type: GrantFiled: September 22, 1998Date of Patent: December 19, 2000Assignee: Fujitsu LimitedInventors: Toshifumi Hatagami, Takayuki Bitoh
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Patent number: 6163832Abstract: A semiconductor device including a plurality of blocks, each individual block of the plurality of blocks being capable of carrying out different types of internal operations, one internal operation at a time, and each internal operation lasting one cycle. A control unit configured to successively select one individual block after another from said plurality of blocks during each cycle is provided. The device is further configured upon selection of one individual block by the control unit, to execute the different types of internal operations one after another in a predetermined order and carry out the different types of internal operations in the one individual selected block in a pipe-line operation.Type: GrantFiled: January 29, 1997Date of Patent: December 19, 2000Assignee: Fujitsu LimitedInventor: Yoshinori Okajima
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Patent number: 6163283Abstract: Coding circuitry (34), for use for example in selecting cells of a cell array in a digital-to-analog converter, produces first and second sets of thermometer-coded output signals in dependence upon a binary input signal. As the input signal increases progressively in value from a first value to a second value, the first-set output signals (COLA) are activated in a predetermined sequence and the second-set output signals (COLB) are deactivated in a predetermined sequence. As the input signal increases progressively in value from the second value to a third value, the first-set output signals are deactivated in a predetermined sequence and the second-set output signals are activated in a predetermined sequence.Such coding circuitry reduces the numbers of output signals that change in response to changes in the input-signal value.In another embodiment (FIG. 12) the coding circuitry includes respective row, column and depth decoders (58, 56, 54).Type: GrantFiled: January 8, 1999Date of Patent: December 19, 2000Assignee: Fujitsu Microelectronics Europe GmbHInventor: William George John Schofield
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Patent number: 6163219Abstract: An amplification circuit includes an amplifying unit to which a signal supplied via an AC coupling capacitor is input, the amplifying unit starting an amplifying operation for the input signal when a potential level at an input portion of the amplifying unit reaches an operating threshold level from a predetermined low level, and a feedback resistor circuit, provided in a feedback line through which electric charge is fed back to the input portion of the amplifying unit, in which feedback resistor circuit a resistance value is controllable by a control signal supplied from an outside thereof.Type: GrantFiled: April 28, 1999Date of Patent: December 19, 2000Assignee: Fujitsu LimitedInventor: Masami Kanasugi