Patents Assigned to Fujitsu
  • Patent number: 6160529
    Abstract: A method of driving a plasma display panel having plural, parallel sustain and scan electrodes, corresponding to respective display lines, and plural address electrodes in opposed relationship and electrically isolated with respect to the sustain and scan electrodes and intersecting same so as to form respective discharge cells at the intersections. The method produces an interlaced display by generating discharges in selected discharge cells, in odd and even fields, between respective, different sets of the sustain and scan electrodes. Each of the odd and even fields includes a reset period in which a reset discharges are produced in the discharge cells to establish a uniform charge distribution therein, an address period in which write discharges are produced in selected discharge cells in accordance with display data and a sustain discharge period in which sustain discharge pulses are produced in the written discharge cells to establish a glow discharge, for display during the respective periods.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Shigeharu Asao, Haruo Koizumi, Yoshikazu Kanazawa
  • Patent number: 6160741
    Abstract: An electrically erasable and writable non-volatile semiconductor memory device having a function of collectively erasing a plurality of memory blocks selected as erase object memory blocks is provided. A logic circuit and an output buffer circuit constitute an erase object memory block selection notifying circuit, which outputs an erase object memory block selection notifying signal indicating whether designated memory blocks have been selected as erase object memory blocks or not, in synchronization with an output enable signal supplied from the CPU. Thus, the erasing operation mode period in the non-volatile semiconductor memory device can be shortened.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Takayuki Ueyama, Takanobu Oda
  • Patent number: 6161010
    Abstract: A fault monitoring apparatus for a mobile communication system is capable of quickly detecting a fault and will prevent a radio wave level measurement test from being carried out unnecessarily. A call loss information collecting unit detects the numbers of outgoing and incoming calls and the numbers of base-station-disconnected calls in respective components of base stations, and accumulates and stores the detected numbers in corresponding memory areas of a call loss information table. A test region determining unit reads the accumulated numbers of outgoing and incoming calls and the accumulated numbers of base-station-disconnected calls from the call loss information table, and calculates call loss probabilities in the respective components. The test region determining unit also specifies a component of the base stations which is to be automatically tested for fault detection, based on the calculated call loss probabilities.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventor: Naoki Oguri
  • Patent number: 6159854
    Abstract: A process of growing a conductive layer on a substrate by a chemical reaction of a source gas on the substrate includes preparing a substrate having an area covered with a coating layer of a material different from a material of the substrate and an area not covered with the coating layer; supplying a first source gas onto the substrate and causing a chemical reaction of the first source gas to occur on the substrate only in the area not covered with the coating layer, thereby selectively growing a first conductive layer on the substrate only in the area not covered with the coating layer; terminating the supplying of the first source gas; and supplying a second source gas onto the substrate and causing a chemical reaction of the second source gas to occur on both of the first conductive layer and the coating layer, thereby unselective growing a second conductive layer of the same conductive material as the first conductive layer, on both of the first conductive layer and the coating layer.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Ohtsuka, Yasuo Matsumiya, Kuninori Kitahara
  • Patent number: 6160377
    Abstract: A battery charging device which charges a plurality of batteries includes a charging part which supplies a charging current, and a control part which controls the charging part so that the batteries are serially charged one by one and a supplemental charge to the batteries is then performed in parallel. The control part calculates a charged capacity for a first one of the batteries and thus determines a timing in which serial charge is switched to a second one of the batteries on the basis of the charged capacity.
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventor: Kenichi Fujii
  • Patent number: 6160294
    Abstract: A semiconductor device of the present invention includes an insulating layer covering a plurality of semiconductor elements formed in a semiconductor layer, an opening portion formed in the insulating layer respective conductive portions of the plurality of semiconductor elements in the insulating layer, and a conductive pattern formed in the opening portion for connecting respective conductive portions of the plurality of semiconductor elements.
    Type: Grant
    Filed: August 4, 1997
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventor: Koichi Hashimoto
  • Patent number: 6160417
    Abstract: An electronic system includes a plurality of electronic circuits each having a signal input and output function, a bus to which the plurality of electronic circuits are connected, first termination resistors connected to ends of the bus, and a termination voltage circuit having a first part generating a first voltage and a second part generating a second voltage. The sum of the first voltage and the second voltage is supplied, as a power supply voltage, to output circuits of the plurality of electronic circuits connected to the bus. The second voltage is supplied to the first termination resistors as a termination voltage.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventor: Masao Taguchi
  • Patent number: 6160659
    Abstract: An apparatus which receives an input light having a spectrum, and determines a momental wavelength of the spectrum. The apparatus includes a decoupling unit, a weighting unit and a computation unit. The decoupling unit decouples a portion of the received input light, to provide a first signal representing the input light with the portion decoupled therefrom, and a second signal representing the decoupled portion. The weighting unit weights the second signal. The computation unit determines the momental wavelength from the power of the first signal and the power of the weighted second signal. An optical amplifier is also provided which determines the momental wavelength of an amplified light, and controls a gain tilt parameter of the optical amplifier in accordance with the determined momental wavelength, to reduce gain tilt. An optical communication system is also provided which includes a plurality of such optical amplifiers sequentially arranged along an optical transmission line.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventor: Susumu Kinoshita
  • Patent number: 6159770
    Abstract: There is provided a method for fabricating semiconductor devices including resin packages sealing semiconductor elements and external connection terminals respectively resin projections formed on the resin packages and metallic film parts provided to the resin projections. The semiconductor elements are mounted to a lead frame having recess portions located in positions corresponding to positions of the resin projections, metallic film parts being provided in the recess portions. The semiconductor elements are electrically connected to the metallic film parts. The resin packages that seal the semiconductor elements and gate portions are integrally formed with the resin packages. The lead frame is etched so that the resin packages are separated from the lead frame together with the metallic layer parts. The resin packages are attached to an adhesive tape provided to a frame and being used as a carrier.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Masafumi Tetaka, Shinichiro Maki, Nobuo Ohyama, Seiichi Orimo, Hideharu Sakoda, Yoshiyuki Yoneda, Akihiro Shigeno, Ryoichi Yokoyama, Fumitoshi Fujisaki, Masao Fukunaga, Kazuto Tsuji, Terumi Kamifukumoto, Kenji Itasaka, Masanori Onodera
  • Patent number: 6160313
    Abstract: A semiconductor device includes an insulating substrate; a semiconductor chip mounted on a front surface of the insulating substrate and provided with electrode pads; bonding pads provided on the front surface of the insulating substrate and electrically connected to the semiconductor chip by means of wires; ball bumps provided on a back surface of the insulating substrate in rows in a grid-like manner; electrode patterns provided in rows on the front surface of the insulating substrate so as to correspond to positions of the ball bumps, respectively, the electrode patterns being connected to the ball bumps through holes formed in the insulating substrate; and interconnection patterns electrically connecting the bonding pads and the electrode patterns. The bonding pads may be provided in a plurality of rows, each of the rows being provided between one of neighboring pairs of rows of the electrode patterns.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Akira Takashima, Fumihiko Taniguchi, Toshihisa Higashiyama
  • Patent number: 6161117
    Abstract: A waveform pattern file storage section is used for specifying a waveform pattern of a control signal, and storing waveform pattern bit strings formed from bits each of which specifies 1 logical state (an NRZ waveform). A waveform input section reads out the waveform pattern bit string. A waveform recognition section recognizes 1 cycle waveform pattern consisting of 3 consecutive bits in the waveform pattern bit string that has been read out. As a result, if an RZ waveform pattern has been recognized, an RZ waveform is generated with respect to the RZ waveform section; if an NRZ waveform pattern is recognized, an NRZ waveform is generated with respect to the NRZ waveform section.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Maesaki, Hiroshi Teshigawara
  • Patent number: 6160676
    Abstract: A storage disk apparatus has a storage disk having servo information, a plurality of heads for reading information recorded on the storage disk, a plurality of first actuators for accurately positioning the heads with respect to the storage disk, a second actuator for coarsely positioning the heads with respect to the storage disk, and a control circuit for controlling the first actuators and the second actuator according to the servo information read by one of the heads. The control circuit supplies a drive current value depending on the servo information read by one of the heads to one of the first actuators to position the one of the heads, and also supplies the drive current value to the other first actuators to position the other heads. When one of the heads is positionally detected, all the first actuators, typically microactuators, are prevented from being vibrated and relatively displaced from the second actuator in a seek mode.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventor: Kazuhiko Takaishi
  • Patent number: 6159066
    Abstract: It is an object of the present invention to prevent deterioration of a transparent electrically-conductive film which forms display electrodes, so as to enhance the reliability of display electrodes. In an AC type plasma display panel including a plurality of display electrodes X & Y formed of a transparent electrically-conductive film or a multiple layer of a transparent electrically-conductive film plus a metal film a width of which is narrower therethan, and a dielectric layer to cover the display electrodes from the discharge space, the dielectric layer is formed by the use of a ZnO-containing glass material containing substantially none of lead. Moreover, the display electrodes are protected by coating the dielectric layer so far as the ends of display electrodes; and the coating is removed afterwards by etching, etc.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Masashi Amatsu, Shinji Kanagu, Masaaki Sasaka, Noriyuki Awaji, Kazumi Ebihara
  • Patent number: 6157704
    Abstract: A remote terminal in an access network where a plurality of exchange and subscriber telephone sets are connected, is provided with an incoming call prohibition control unit for transmitting an incoming call prohibition signal or an incoming call prohibition cancellation signal. The exchange is provided with an incoming call prohibition signal detector unit for receiving the incoming call prohibition signal and the incoming call prohibition cancellation signal, converting the incoming call prohibition signal and the incoming call prohibition cancellation signal to an incoming call prohibition command and an incoming call prohibition cancellation command, respectively, and outputting them to a monitor control unit. The signals from the incoming call prohibition control unit are transmitted to the incoming call prohibition signal detector unit through a transmission line (transmitting apparatus).
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventor: Yuzuru Ishioka
  • Patent number: 6157615
    Abstract: A method for controlling a test for an ATM exchange in which a number of test cell generating devices to be activated is limited in association with a load applied to a central processing device so that the test is preformed without occurrence of congestion. The test is performed by using test cells transmitted from a plurality of test cell generating devices provided in the exchange. A load applied to the central processing device is measured, and a number of test cell generating devices to be used is calculated so that the measured load is maintained below a previously set limit value. The test for the exchange is performed by concurrently using the calculated number of test cell generating devices.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Tsukasa Akagawa, Akio Matsuura, Yuko Tangiku, Kenichi Akita, Kenji Ogawa, Kengo Tsukushi
  • Patent number: 6157658
    Abstract: A pointer processing apparatus in an SDH transmission system used to serially conducting a pointer process on inputted multiplex data has an address generating unit for allocating an address to each channel of the multiplex data, a RAM for holding an information group obtained by a pointer extracting process and a pointer process, and RAM controlling unit for controlling a sequence of an operation to write-in/read-out the RAM to serially conduct the pointer process on the received multiplex data, thereby largely decreasing the circuit scale, the power consumption, the number of distributions and the like. A POH terminating operation process is conducted in a POH terminating operation process unit, and an obtained result of the POH terminating operation is stored in a storage area for a corresponding channel of a storage unit, whereby the POH terminating operation process can be conducted without separating a multiplex signal into channels.
    Type: Grant
    Filed: May 7, 1997
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Takeshi Toyoyama, Hiroshi Yoshida, Hideo Emoto, Hisayoshi Kuraya, Masanobu Edasawa
  • Patent number: 6157613
    Abstract: A congestion control system appropriately controls congestion of cells independently of the configuration of source and destination terminal units in, for example, an ATM switching unit, and shortens the time taken from the generation of congestion to the start of control. A buffer for switching the cells in a switch device adds to the cells transmitted through the switch device an EFCI for use in notifying the destination terminal unit of the congestion state of the cells. An output line device detects together with a VPI/VCI the EFCI added to the cell to be output from the switch device to the destination terminal unit. The output line device transmits to the switch device the VPI/VCI corresponding to the detected EFCI and an RM cell in which backward congestion indication is set.
    Type: Grant
    Filed: February 12, 1996
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Watanabe, Satoshi Kakuma
  • Patent number: 6157267
    Abstract: A variable frequency oscillator including an oscillation unit including a ring oscillator having multiple loops, and a frequency control unit controlling switching among the multiple loops in accordance with a control input indicative of an oscillation frequency and thus generating an oscillation signal having the oscillation frequency.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventor: Yasushi Kakimura
  • Patent number: 6157902
    Abstract: A disassembly route producing apparatus searches for a disassembly route for disassembling a product into its component parts. In one embodiment, the apparatus selects one of the parts to be disassembled, and determines the closest distance the selected part may approach the remaining parts as the selected part is being moved. The selected part is disassembled through a series of translations in predetermined directions and for predetermined distances. After each translation, the apparatus determines whether the selected part collided with any of the remaining parts. If a collision occurs, the apparatus changes the direction for the translations and resumes the search. A corresponding assembly route is determined by reversing the disassembly route.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Mitsunori Hirata, Yuichi Sato, Tsugito Maruyama
  • Patent number: D435095
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: December 12, 2000
    Assignee: Fujitsu General Limited
    Inventor: Satoshi Nanjo