Abstract: A multiple gate semiconductor device. The device includes at least two gates. The dopant distribution in the semiconductor body of the device varies from a low value near the surface of the body towards a higher value inside the body of the device.

Abstract: The invention is related to a method of plating of a metal layer on a substrate. The method is particularly preferred for the formation of metallization structures for integrated circuits.

Abstract: Test circuitry and test methods performing supply current measurement is presented. The test circuitry can be but is not limited to be on-chip. The supply current, also denoted test current, can be transient. The test circuitry and methods do not cause additional power supply voltage degradation. The test circuitry and methods provide detection capabilities for open defects, causing significant reduction of the transient supply current.

Abstract: A method of forming layers, in the same device material, with different thickness or layer height in a semiconductor device comprises forming device material layer or gate electrode layer disposable parts in selected regions of the device layer. The disposable parts can be formed by doping the selected regions to the desired depth d. The as-deposited thickness t of this device layer can be adjusted or modulated after the patterning of the individual devices by removing the disposable parts.

Abstract: A method and apparatus for dispensing a liquid on the surface of a localized zone of a substrate, for example for cleaning of etching purposes. Along with the liquid, a gaseous tensio-active substance is supplied, which is miscible with said liquid and when mixed with the liquid, reduces the surface tension of said liquid, thus containing the liquid in a local zone of the substrate surface.

Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.

Abstract: The present invention relates to methods for producing a patterned thin film on a substrate. The method comprises the spatially and possibly also temporally modulation of nucleation modes of film growth during the growth of patterned thin films. The nucleation modes are modulated between no or substantially no nucleation, 2D nucleation, and 3D nucleation. The modulation is obtained by adjusting the surface treatment spatially applied over regions of the substrate, the growth conditions for the thin film materials used, and/or the specific thin film materials used. The growth conditions typically comprise the substrate temperature and the deposition flux. The modulation allows for spatially varying the interaction between the substrate material and the thin film materials deposited.

Abstract: An electrostatic discharge (ESD) protection circuit for the protection of an electronic circuit from an ESD event. The electronic circuit, in operation, is provided with a supply voltage and a reference voltage (typically electrical ground) via voltage terminals and/or power supply buses. The protection circuit includes two bipolar transistors in series, where the transistors are coupled between the supply voltage terminal/bus and the reference voltage terminal/bus. The bases of the transistors are coupled via a connection including two resistors in series, where the connection point between the two resistors is coupled with the connection point between the two transistors.

Abstract: The invention is a method for determining at least two corrected color values for a pixel, said pixel being embedded in a configuration of pixels and having a color filter for filtering substantially one color type while obtaining a measurement on the pixel. The method comprises the steps of measuring at least one signal on said pixel; transforming the measured signal into a representation having at least a luminance and a chrominance part; and transforming said representation into a color space representation of said pixel, said pixel having at least two color values in said color space representation.

Abstract: A method for determining the presence of defects in a covering layer overlying an underlying layer in accordance with an embodiment of the invention comprises providing a substrate comprising the covering layer, where the covering layer is at least partially exposed. The covering layer is subjected to a first substance, such as a solvent, and then subjected to a light beam. An optical property of the covering layer is determined and compared with a threshold value. The presence of defects in the covering layer is determined by the difference of the optical property from the threshold value, where the optical property indicates a level of penetration of the first substance through the covering layer.

Abstract: The present invention is related to a method and apparatus for performing Atomic Force Microscopy. In the method of the invention, a force profile is defined, and a sample is scanned by the AFM probe in such a way that the force between the sample and the probe is changed according to said predefined profile. The invention is equally related to an apparatus with which to perform said method.

Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate; step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate, the dopant from said solids-based dopant source diffusing directly into said substrate to form a first diffusion region and, at the same time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate to form a second diffusion region in at least some areas of said substrate to form a second diffusion region in at least some areas of said substrate not covered by said pattern; and step 3) forming a metal contact pattern substantially in alignment with

Abstract: A method for programming a single bit nonvolatile memory cell integrated on a metal-dielectric-semiconductor technology chip. The memory cell comprises a semiconductor substrate including a source, a drain, and a channel in-between the source and the drain. The memory cell further comprises a control gate that comprises a gate electrode and a dielectric stack. The gate electrode is separated from the channel by the dielectric stack. Further, the dielectric stack comprises at least one charge storage dielectric layer. The method for programming the memory cell comprises applying electrical ground to the source, applying a first voltage having a first polarity to the drain, applying a second voltage of the first polarity to the control gate; and applying a third voltage having a second polarity opposite to the first polarity to the semiconductor substrate.

Abstract: This invention relates to Integrated Circuit (IC) processing and fabrication. A device and a method are provided for etching an opening in an insulating layer while depositing a barrier layer on the side walls of the opening without essentially depositing a barrier layer on the bottom of the opening.

Abstract: A method and an apparatus for removing a liquid, i.e. a wet processing liquid, from at least one surface of at least one substrate is disclosed. A liquid is supplied on a surface of substrate. Simultaneously or thereafter the liquid or the substrate is locally heated to thereby reduce the surface tension of said liquid. By doing so, at least locally a sharply defined liquid-ambient boundary is created. According to the invention, the substrate is subjected to a rotary movement at a speed to guide said liquid-ambient boundary over the surface of the substrate thereby removing said liquid from said surface.

Abstract: A thin-film opto-electronic device on a conductive silicon-containing substrate includes a sequence of layers. The layers include a layer of a porous medium preferably a porous silicon, on a substrate. The porous layer has both light diffusing and light reflecting properties. In addition, a non-porous layer is located on said porous silicon layer, with at least one first region and at least one second region being in said non-porous layer. The first region is of a first conductivity type acting as a light absorber and the second region has a conductivity of a second type, different from said first conductivity type. The sequence of layers is such that optical confinement is realised in the device.

Abstract: An organic field-effect transistor comprises source and drain electrodes formed separately from each other on a substrate, wherein the substrate comprises at least an organic semiconductor layer constituting a channel between the source and drain electrodes, an insulation layer underlying the organic semiconductor layer, and a gate electrode formed on the opposite side of the isolation layer. The organic semiconductor layer comprises hole and electron transporters, wherein the electron transporters comprise (6,6)-phenyl C61-butyric acid methyl ester (PCBM), and wherein the hole transporters comprise poly(2-methoxy-5-(3′,7′-dimethyloctyloxy)-1,4-phenylene-vinylene)(OC1C10-PPV) and/or poly(3-hexylthiophene) (P3HT).

Abstract: A method is presented in which an active element, e.g. a semiconductor device, is embedded in a passive circuitry formed on a low-cost substrate, having good dielectric properties. After forming the active element on a first substrate, the active elements are singulated and transferred to a second substrate. The active element is bonded to this second substrate and the portion of the first substrate, on which this active element is created, is removed selectively to the active element and the low-cost substrate. On this second substrate passive circuitry may be present or it can be formed after the attachment of the active element. The passive circuitry is interconnected to the active element or other components or dies present on the low-cost substrate.

Abstract: A method of texturing a surface of a substrate, includes providing a substrate, and distributing separate particles of an overlayer material in a substantially random pattern over at least a part of a surface of the substrate. The substantially random pattern of separate particles is used as a mask for a subsequent processing of the substrate.

Abstract: The present invention is related to a method and apparatus for performing a surface analysis of a sample by mass spectrometry. According to one aspect of the invention, the ions necessary for the spectrometry are produced by a probe beam, which is preferably an electron beam, in combination with a gas mixture comprising at least a reactive gas component. Due to the interaction of the probe beam with the reactive gas and the surface atoms, reactions take place between the surface atoms and the reactive gas molecules, resulting in volatile compounds being released from the surface. One or more laser beams cause the ionization of these compounds, after which the resulting ions are accelerated towards a mass spectrometer. The method and apparatus allow an accurate depth profiling of a test sample to be performed.