Abstract: An apparatus for reducing surge currents during startup of a voltage regulator is disclosed that includes circuitry for maintaining a voltage at an FB pin of the voltage regulator substantially equivalent to an output voltage of the voltage regulator.

Abstract: A power supply switching circuit arrangement is configured to provide a relatively smooth (low noise) power supply switch-over during the transition between active and quiescent modes. Complementary inputs of an operational amplifier are selective coupled to feedback paths to the amplifier and the power supply switching circuit arrangement, so as to bias a switching transistor during system active mode at a value that is just slightly below the turn-on voltage of the transistor. This means that turning on the switching transistor for the purpose of providing quiescent mode powering of the utility device requires only a small transition in control voltage from an active mode ‘almost turned-on’ level.

Abstract: A multi-level current pulse generator for driving the gates of a CMOS pair implemented using a low voltage process including a multi-level pulse translator, a current amplifier circuit, and a clamp circuit. The multi-level pulse translator generates a multi-level current pulse on at least one pulse node, each current pulse having a first large current pulse with short duration followed by at least one smaller current pulse of longer duration and operative to switch the CMOS pair with reduced average power dissipation. The current amplifier circuit amplifies the current pulses provided to the gates of the CMOS pair. The clamp circuit clamps gate voltage of the CMOS pair to prevent breakdown. In a tri-level case, a first current pulse charges and discharges gate capacitance, a second current pulse stabilizes gate voltage, and a third current pulse provides a holding current level.

Abstract: A communication system (20) includes a hub radio (22) that wirelessly communicates with any number of user radios (24). The hub radio (22) monitors signal quality measurements compiled from the communication signals (30?) transmitted from the various user radios (24) and based upon baseband quadrature constellation point error to estimate out-of-band signal energy for the communication signals (30?). The hub radio (22) formulates commands based upon these measurements that instruct the user radios (24) how to adjust their power amplifier linearizers (66) so that their power amplifiers (74) become better linearized to minimize spectral regrowth and insure compliance with a spectral template.

Abstract: A phase-modulated, double-ended, half-bridge topology-based DC-AC converter supplies AC power to a load, such as a cold cathode fluorescent lamp used to back-light a liquid crystal display. First and second converter stages generate respective first and second sinusoidal voltages having the same frequency and amplitude, but having a controlled phase difference therebetween. By employing a voltage controlled delay circuit to control the phase difference between the first and second sinusoidal voltages, the converter is able to vary the amplitude of the composite voltage differential produced across the opposite ends of the load.

Abstract: A phase-modulated, double-ended, full-bridge topology-based DC-AC converter supplies AC power to a load, such as a cold cathode fluorescent lamp used to back-light a liquid crystal display. First and second converter stages generate respective first and second sinusoidal voltages having the same frequency and amplitude, but having a controlled phase difference therebetween. By employing a voltage controlled delay circuit to control the phase difference between the first and second sinusoidal voltages, the converter is able to vary the amplitude of the composite voltage differential produced across the opposite ends of the load.

Abstract: A PWM system that minimizes output ripple of a multiphase DC-DC converter which converts N input voltages including at least one dissimilar input voltage. The PWM system includes PWM waveform logic that generates N PWM signals including a PWM signal for each of the N input voltages, and PWM control logic that optimizes relative phases of the N PWM signals based on voltage levels of the N input voltages. Various circuits and/or methods are contemplated for optimizing phase, including, for example, centering pulses for each PWM cycle, distributing pulses based on predetermined optimal phase angles, determining input voltage levels and selecting predetermined optimal phase angles, generating phase signals employing predetermined phase angles, measuring input voltages and calculating optimal phase angles, and using PLL logic or the like to measure and equalize off-times between PWM pulses.

Abstract: A CMOS-implemented transconductance amplifier has an input gain stage coupled to a CMOS output stage. The inverting input of the input gain stage is coupled to an input/output port to which an input voltage is coupled. The CMOS output stage has a first, transconductance CMOS transistor pair, whose source-drain paths are series-coupled between first and second outputs of the input stage. A second, transimpedance CMOS transistor pair have their source-drain paths series-coupled between first and second power supply terminals, and gate inputs coupled to outputs of the input stage. A third CMOS transistor pair is coupled in parallel with the second CMOS transistor pair to form a pair of current mirror stages. The current output is coupled to a common connection of the third CMOS pair.

Abstract: A tracking soft start circuit architecture contains a plurality of soft start circuits for generating a plurality of soft start voltages during startup for application to associated power supply terminals of a power supply system. The soft start circuits are interconnected in such a manner that prevents any soft start circuit from generating a soft start voltage waveform until all of the controlled power output devices have been brought to the same prescribed state of operation, that is, all power FET gates are precharged and their source voltages match each other.

Abstract: A monolithic 1.75 is mounted in a speaker cabinet 1.71 to drive the voice coil 1.74 of the speaker 1.70. The monolithic integrated circuit may be a class D amplifier 1.10, and is at least a half-bridge or full bridge power MOSFET device. Structures and process for forming the mos switching devices 2.20 of the bridge driver circuits are disclosed. Also disclosed is the N+ buried layer 4.14 of the QVDMOS transistors 4.43 of the bridge circuits.

Abstract: A distributed controller and DC voltage switch-driver system supplies AC power to a cold cathode fluorescent lamp of the type used to backlight a liquid crystal display. The system includes a local controller and lamp operation-monitoring subsystem, which generates two pairs of low voltage drive signals. These drive signals are distributed over low voltage wires to respective pairs of step-up transformer-driving switches installed at opposite ends of the lamp. The high voltage AC outputs of the two transformers have the same frequency, but opposite phase, to reduce the voltage ratings of the components that are installed at the opposite ends of the lamp. The use of low voltage connections from the local controller to driver circuitry at the far end of the lamp serves to reduce the cost of the components, and results in lower emitted noise and lower energy lost to capacitive coupling.

Abstract: The present invention relates to an integrated circuit having a sealed nitride layer. In one embodiment, a method of forming a sealing nitride layer overlaying a silicon oxide layer in a contact opening of an integrated circuit is disclosed. The method comprises, forming a second layer of nitride overlaying a first layer of nitride to form the sealing nitride layer. The second layer of nitride further overlays an exposed portion of a surface of a substrate in the contact opening and sidewalls of the contact opening. Using reactive ion etching (RIE etch) without a mask to remove a portion of the second nitride layer adjacent the surface of the substrate in the contact opening to expose a portion of the surface of the substrate in the contact opening without removing portions of the second nitride layer covering the sidewalls of the contact opening.

Abstract: A method of forming bipolar transistors by using the same mask to form the collector region in a substrate of an opposite conductivity type as to form the base in the collector region. More specifically, impurities of a first conductivity type are introduced into a region of a substrate of a second conductivity type through a first aperture in a first mask to form a collector region. Impurities of the second conductivity type are introduced in the collector through the first aperture in the first mask to form the base region. Impurities of the first conductivity type are then introduced into the base region through a second aperture in a second mask to form the emitter region. The minimum dimension of the first aperture of the first mask is selected for a desired collector to base breakdown voltage. This allows tuning of the breakdown voltage.

Abstract: A droop amplifier circuit for a DC-DC regulator including an amplifier, at least one first resistive device, a second resistive device, a third resistive device, and a first capacitive device. Each first resistive device is coupled between an output inductor (phase node or current sense node) and the amplifier's non-inverting input. The first capacitive device is coupled between the regulator output and the amplifier's output. The second resistive device is coupled between the regulator output and the amplifier's inverting input. The third resistive device is coupled between the amplifier's inverting input and output. A second capacitive device may be coupled between the regulator output and the amplifier's non-inverting input. A fourth resistive device may be coupled in parallel with the second capacitive device. A relatively small, simple and low performing amplifier is sufficient. Circuit area and power are reduced, and low input offset voltage is more easily achieved.

Abstract: Backside failure analysis of integrated circuits. In one embodiment, a method of preparing a device under test (DUT) for an image based diagnostic testing is disclosed. The method comprises removing a portion of the backside package of the DUT to allow for the implementation of an image based diagnostic test through the backside of the DUT. The functionality of DUT is destroyed by the removal of the portion of the backside package of the DUT. Further, restoring the functionality of the DUT with an interface carrier before an image based diagnostic test is conducted.

Abstract: A cascadable power regulator including a programmable delay unit and PWM control logic. The programmable delay unit initiates a delay period in response to a digital input signal and asserts a digital output signal upon expiration of the delay period. The PWM control logic controls a PWM cycle in response to the digital input signal and in response to an output control condition. The cascadable regulator uses digital signals to communicate between channels. Digital signals are not prone to the same kind of signal degradation or noise susceptibility as analog signals. Thus, the number of phases is not limited, the physical separation between the regulators is not limited, and the switching frequency is not as limited. There is no clock signal from a separate controller so that the controller is a relatively simple, low-cost device. Since there is no clock, a unique self-oscillating system is achieved using the cascadable regulator.

Abstract: A power supply circuit contains a plurality of DC-DC converter control loops that provide respectively different control signals. A plurality of output driver stages of given current drive capabilities have their inputs programmably connectable via a set of switches to control signals that may be generated by any of the converter control loops. The output of each output driver stage is externally selectively connectable to any of plural output voltage ports, so that each output voltage port is capable of supplying any of the respectively different output voltages associated with the voltage control signals generated by the DC-DC converter control loops, and has an output current capability that depends upon which output driver stages are coupled to it.

Abstract: A multi-stage, push-pull driven, resonant DC-AC converter ties the center-taps of primary windings of respective push-pull stages together, and drives each center-tap with a current source. Tying the center-taps of the primary windings of the respective DC-AC converters' transformers together forces the voltages at these locations to be the same, so as to achieve mutual resonant synchronization between the two stages. Connecting the center-taps to a current source provides the necessary power for each stage and allows for a variation in current between stages, as the center-tap voltages track one another. The tied-together center-tap voltage is monitored to obtain the zero voltage switching required for efficient operation of switching devices of each DC-AC converter stage.

Abstract: A bonded semiconductor-on-insulator substrate for an integrated circuit. The bonded semiconductor-on-insulator substrate includes a wafer, a handle wafer and an insulating bond layer. The wafer has a first layer of monocrystalline semiconductor material adjacent a first surface of the wafer. The wafer also has a second layer of undamaged by implantation monocrystalline semiconductor material adjacent a second surface of the wafer. The wafer further has a substantially planar intrinsic gettering zone of substantially pure semiconductor material and active gettering sites positioned between the first and second layers formed by implanting ions of the semiconductor material through the first layer of monocrystalline semiconductor material. The insulating bond layer bonds the handle wafer to the first surface of the wafer.

Abstract: A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.