Abstract: A method for the production of a planar structure is disclosed. The method comprises producing on a substrate a plurality of structures of substantially equal height, and there being a space in between the plurality of structures. The method further comprises providing a fill layer of electromagnetic radiation curable material substantially filling the space between the structures. The method further comprises illuminating a portion of the fill layer with electromagnetic radiation, hereby producing a exposed portion and an unexposed portion, the portions being separated by an interface substantially parallel with the first main surface of the substrate. The method further comprises removing the portion above the interface.

Abstract: A method of manufacturing a semiconductor device comprising a dual gate field effect transistor is disclosed, in which method a semiconductor body with a surface and of silicon is provided with a source region and a drain region of a first conductivity type and with a channel region of a second conductivity type, opposite to the first conductivity type, between the source region and the drain region and with a first gate region separated from the channel region by a first gate dielectric and situated on one side of the channel region and with a second gate region separated from the channel region by a second gate dielectric and situated on an opposite side of the channel region, and wherein both gate regions are formed within a trench formed in the semiconductor body.

Abstract: The present invention is related to a device comprising a substrate comprising a silicon substrate having a porous top layer, a second layer on said top layer, said second layer made of a material comprising Ge, and a further layer of a Group III-nitride material on the second layer. The present invention further is related to methods of production and to intermediate or template devices highly suitable for the epitaxial growth of a high quality Group III-nitride layer.

Abstract: A method is presented for determining an actual pulse position in a signal. This signal comprises a plurality of successive frames, wherein each frame has length L and contains one pulse with width W, a number of discrete possible pulse positions being considered within in each frame which is at least L/W. The method comprises the steps of a) sampling the signal at a sampling rate below L/W with a varying sampling phase such that the whole frame length L is covered, b) obtaining a set of samples with at least one at each of the possible pulse positions, c) correlating this set of samples with a set of one or more predetermined values and d) determining the actual pulse position from said correlation. The method provides a low-complex signal acquisition solution in a receiver and is particularly useful for low-complexity and low-power IR-UWB transceivers.

Abstract: A semiconductor device, fabricated by a method, having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate is disclosed. In one embodiment, the method includes i) forming, at least at the silicon region, a metal cluster layer from a first metal, such that, in the metal cluster layer, metal clusters alternate with sites where there are no metal clusters, the first metal being a non-siliciding metal at predetermined conditions, ii) depositing a metal layer of a second metal on top of the metal cluster layer, the second metal being a siliciding metal and iii) carrying out at least one heat treatment at the predetermined conditions on the second metal layer so as to form metal silicide through reaction of the second metal with the silicon region, wherein atoms of the first metal are displaced in a direction substantially perpendicular to the surface of the substrate.

Abstract: Electronic devices are disclosed that may be used for infrared radiation detection. An example electronic device includes a substrate, a transistor included in the substrate and a silicon-germanium (Si—Ge) structural layer coupled with the transistor. The structural layer has a stress in a predetermined range, where the predetermined range for the stress is selected prior to deposition of the structural layer. Also, the structural layer is deposited on the substrate subsequent to formation of the transistor such that deposition of the structural layer does not substantially adversely affect the operation of the transistor.

Abstract: Methods for the production of airgaps in semiconductor devices and devices produced using such methods are disclosed. An example semiconductor device includes a damascene stack formed using such methods. The damascene stack includes a patterned dielectric layer including an interconnect structure, where the dielectric layer is formed of a dielectric material including Si, C and O. The damascene stack also includes a converted portion of the dielectric layer, where the converted portion is adjacent to the at least one interconnect structure and has a lower carbon content than the dielectric material. The damascene stack also includes an airgap formed adjacent to the interconnect structure, the airgap being formed by removing at least part of the converted portion using an etch compound.

Abstract: A two-terminal organic light-emitting device structure is presented with low absorption losses and high current densities. Light generation and emission occur at a predetermined distance from any metallic contact, thereby reducing optical absorption losses. High current densities and thus high emitted light intensity are achieved by combining two types of conduction in one device: by combining space charge limited conduction and field-effect conduction or by combining ohmic conduction and field-effect conduction, thereby optimizing the current densities. This results in a very high local concentration of excitons and therefore a high light intensity, which can be important for applications such as organic lasers, and more in particular electrically pumped organic lasers.

Abstract: A method is disclosed for producing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET or MESFET devices, comprising two active layers, e.g. a GaN/AlGaN layer. The method produces an enhancement mode device of this type, i.e. a normally-off device, by providing a passivation layer on the AlGaN layer, etching a hole in the passivation layer and not in the layers underlying the passivation layer, and depositing the gate contact in the hole, while the source and drain are deposited directly on the passivation layer. The characteristics of the active layers and/or of the gate are chosen such that no two-dimensional electron gas layer is present underneath the gate, when a zero voltage is applied to the gate. A device with this behavior is also disclosed.

Abstract: One inventive aspect relates to a method of determining an estimate of system-level yield loss for an electronic system comprising individual components subject to manufacturing process variability leading to manufacturing defects. The method comprises obtaining a description of the composition of the electronic system in terms of which individual components are used. The method further comprises obtaining statistical properties of the performance of individual components of the electronic system with respect to first and second performance variables, e.g. energy consumption and delay, the statistical properties including correlation information of the first and second performance variables. The method further comprises obtaining information about execution of an application on the system, e.g. a number of accesses of a component by an application.

Abstract: A method is disclosed for relaxing strain in a multi-gate device, the method comprising providing a substrate with a strained material, patterning a plurality of fins in the strained material, defining a first region comprising at least one fin, defining a second region comprising at least one fin, providing a diffusion barrier layer on the first region, performing a hydrogen anneal such that the strain in the second region is relaxed.

Abstract: A method of determining IQ imbalance introduced on an RF multicarrier signal received via a channel on a direct conversion analog receiver is disclosed. In one embodiment, the method comprises i) receiving a training signal on the receiver, ii) demodulating the training signal on the receiver, iii) estimating a first frequency domain channel characteristic of the channel based on the demodulated training signal, iv) defining a predetermined relationship between a corrected frequency domain channel characteristic of the channel and the first channel characteristic, the predetermined relationship comprising at least one IQ imbalance parameter, and v) determining the at least one IQ imbalance parameter such that the corrected channel characteristic satisfies a channel constraint.

Abstract: The present invention provides a method and device for determining, in a non-destructive way, carrier concentration level and junction depth in a semiconductor substrate, independent from each other, during a single measurement.

Abstract: A technique is described for the preparation of polymers according to a process in which the starting compound of formula (I) is polymerized in the presence of a base in an organic solvent. No end chain controlling agents are required during the polymerisation to obtain soluble precursor polymers. The precursor polymer such obtained comprises structural units of the formula (II). In a next step, the precursor polymer (II) is subjected to a conversion reaction towards a soluble or insoluble conjugated polymer by thermal treatment. The arylene or heteroarylene polymer comprises structural units of the formula III. In this process the dithiocarbamate group acts as a leaving group and permits the formation of a precursor polymer of structural formula (II), which has an average molecular weight from 5000 to 1000000 Dalton and is soluble in common organic solvents. The precursor polymer with structural units of formula (II) is thermally converted to the conjugated polymer with structural formula (III).

Abstract: The present invention is related to a a device and corresponding methods for generating an oscillating signal. The device comprises a means for providing a current of spin polarised charge carriers, a magnetic, e.g. ferromagnetic, excitable layer adapted for receiving the generated current of spin polarised charge carriers thus generating an oscillating signal with a frequency and an integrated means for interacting with said magnetic, e.g. ferromagnetic, excitable layer such that a selection of said oscillation frequency is achieved. No external field needs to be applied to select or tune the frequency. Different types of integrated means can be used, such as e.g. means inducing mechanical stress in the magnetic, e.g. ferromagnetic, excitable layer, means inducing exchange bias interactions and means inducing magnetostatic interactions.

Abstract: A new MOSFET device is described comprising a metal gate electrode, a gate dielectric and an interfacial layer. The electrostatic potential at an interface between the gate electrode and the gate dielectric of a MOSFET device can be controlled by introducing one or more interfacial layer(s) of a dielectric material, at the monolayer(s) level (i.e., preferably two monolayers), between the gate electrode and the gate dielectric. A method for its manufacture is also provided and its applications.

Abstract: A signal generator for generating signals that are spaced ?/X rad apart, where X is an integer. The signal generator includes at least one delay cell with a delay that approximately corresponds to a phase shift ?/X rad for a given signal. The signal generator also includes at least one phase detection system receiving at least two signals with a phase difference of approximately ?/2 rad with respect to one another from said at least one delay cell and generating a feedback signal that is communicated to the at least one delay cell to adjust the phase relationship of the at least two signals. Such signal generators are used in radio frequency up-converters or down-converters.

Abstract: A semiconductor device is disclosed. The device has a first and second electrode formed in a semiconductor substrate. The first and second electrode are separated from each other by a semiconductor region. and the device also includes a third electrode for controlling conductivity of the semiconductor region. At least one of the first and second electrodes forms a rectifying contact with the semiconductor region. The rectifying contact has a potential barrier. The semiconductor region is uniformly doped, at least in a direction between the first and the second electrodes, to have a doping level higher than the doping level of the semiconductor substrate and so as to, in operation, induce an image-force mechanism for lowering the potential barrier of the at least one rectifying contact.

Abstract: Methods of forming semiconductor devices with a layered structure of thin and well defined layer of activated dopants, are disclosed. In a preferred method, a region in a semiconductor substrate is amorphized, after which the region is implanted with a first dopant at a first doping concentration. Then a solid phase epitaxy regrowth step is performed on a thin layer of desired thickness of the amorphized region, in order to activate the first dopant only in this thin layer. Subsequently, a second dopant is implanted in the remaining amorphous region at a second doping concentration. Subsequent annealing of the substrate activates the second dopant only in said remaining region, so a very abrupt transition between dopant characteristics of the thin layer with first dopant and the region with the second dopant is obtained.

Abstract: A slanted grating coupler for coupling a radiation beam between a waveguide lying substantially in a plane on a substrate and an optical element outside that plane is provided, whereby the slanted grating coupler has a good coupling efficiency for medium or low index contrast material systems. Furthermore, a method for manufacturing the slanted grating coupler is provided. The slanted grating coupler comprises a plurality of slanted slots extending through the waveguide core and being arranged successively in the propagation direction of the waveguide. In at least part of the coupling region, the size of the slanted slots in a lateral direction, being a direction within the waveguide plane and perpendicular to the propagation direction of the waveguide, is smaller than the lateral size of the waveguide core. Successive slots are displaced with respect to each other in the lateral direction.