Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.

Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.

Abstract: A semiconductor device includes a substrate, a plurality of active regions on the substrate, the active regions having recessed and elevated types and being alternatively in parallel with the substrate, respectively, and a plurality of first and second field insulating layers at field regions adjacent to the active regions, the first field insulating layer being parallel with the substrate and the second field insulating layer being perpendicular to the substrate.

Abstract: A semiconductor device and a method of fabricating the same are disclosed in the present invention. The semiconductor device includes a semiconductor substrate, first and second gate insulating layers on the semiconductor layer, the first and second insulating layer having different dielectric constants, and a gate electrode on the first and second gate insulating layers.

Abstract: A capacitor for a semiconductor device is disclosed with increased capacitance which is produced by a simplified manufacturing process. The capacitor has a storage node electrode structure formed on the semiconductor device having impurity regions from therein. The storage node electrode structure includes a buried layer formed in a storage node hole defined by the semiconductor device, the buried layer being in contact with at least one impurity region, a bottom layer formed on the buried layer and extending beyond the buried layer, a first cylindrical electrode having first walls upwardly extending from the bottom layer, and second cylindrical electrodes having second walls upwardly extending from the bottom layer and disposed on outer sides of the first cylindrical electrode.

Abstract: A semiconductor device and a method for manufacturing the same that forms a self-aligned contact hole between two gate lines. A substrate is provided that has a first gate line formed thereon. An insulator is formed on the first gate line and substrate. Then a portion of the insulator and a portion of the first gate line is selectively removed to split the first gate line into a second gate line and a third gate line and to concurrently expose the substrate. Thus, producing a self-aligned contact hole between the second and third gate lines.

Abstract: A pattern and method of a metal line package level test for a semiconductor device, which is capable of efficiently testing characteristic of a metal line. The metal line package level test pattern includes a metal line for test, a current applying pad which is connected to both ends of the metal line, for applying a current to the metal line, a voltage sensing pattern formed at both ends of the metal line, for sensing a voltage of the metal line, and a heater for varying the temperature of the current applying pad.

Abstract: A semiconductor device is disclosed, including: a semiconductor substrate; a gate electrode formed on the semiconductor substrate; a first gate insulating layer formed between the gate electrode and semiconductor substrate, and formed at a first region including one edge of the gate electrode; a second gate insulating layer formed between the gate electrode and semiconductor substrate, and formed at a second portion including the other edge of the gate electrode, the second gate insulating layer being thicker than the first gate insulating layer; a first impurity region formed in a predetermined portion of the semiconductor substrate, placed on both sides of the gate electrode; and a second impurity region formed in a predetermined portion of the semiconductor substrate, placed under the second gate insulating layer.

Abstract: A thin film transistor includes a substrate, a gate electrode formed on the substrate, and including opposing edge portions and a middle portion. An insulating film is formed on the surface of the gate electrode having a greater thickness on one of the gate edge portions. An active region is formed on the surface of the insulating film and the exposed substrate. The active region includes an off-set region, a channel region, a source region, and a drain region.

Abstract: Solid state image sensor having photodiode regions for converting optical image signal into an electrical signal and charge coupled device regions for transferring video charges generated in the photodiode regions in one direction, including first microlens layers spaced from one another and formed over the photodiode regions to be opposite thereto for focusing lights onto the photodiode regions, and second microlens layers formed of a material having a refractive index greater than the first microlens layers on an entire surface of the first microlens layers for focusing lights incident to edge portions of the first microlens layers and spaces between the first microlens layers onto the photodiode regions.

Abstract: A solid state image sensor device and a method of fabricating the same are disclosed in the present invention. A solid state image sensor device includes a semiconductor substrate, a well region in the semiconductor substrate, a horizontal charge transmission region in the well region, a plurality of insulating layers in the horizontal charge transmission region, a gate insulating layer on the entire surface including the insulating layers, a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, an interlayer insulating layer on the entire surface including the first polygates, and a plurality of second polygates on the interlayer insulating layer and overlapped with a portion of each first polygate.

Abstract: A thin film transistor is provided that includes a substrate, a gate electrode formed on the substrate, and a gate insulating layer formed all over the substrate including the gate electrode. A first semiconductor layer is formed on the gate insulating layer, and a second semiconductor layer is formed on the first semiconductor layer. Source and drain electrodes are separately etched together to expose a prescribed portion surface of the second semiconductor layer over the gate electrode. The source and drain electrodes adjacent to the prescribed portion of the second semiconductor layer are non-linearly inclined at their edges. A method of fabricating a thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode and the substrate, forming a first semiconductor layer on the gate insulating layer and forming a second semiconductor layer on the first semiconductor layer.

Abstract: A thin film transistor and a method for fabricating the same in which a self alignment method is used to form an offset area and source and drain electrodes are disclosed, the TFT including a substrate; a trench formed in the substrate; an active layer formed on the substrate and on the trench; a gate insulating film formed on the active layer; a gate electrtode formed on the gate insulating film on at least one side of the trench; a source region formed in the active layer on a bottom side of the trench; and drain regions formed in the active layer on the substrate to be isolated form the gate electrode.

Abstract: The present invention discloses a high voltage field effect transistor and fabricating the same. A high voltage field effect transistor includes a semiconductor substrate, a first conductivity type well in the semiconductor substrate, first and second conductivity type drift regions in the first conductivity type well, heavily doped impurity regions having first and second conductivity types in the first conductivity type drift region, a heavily doped second conductivity type impurity region in the second conductivity type drift region, and a lightly doped second conductivity type buffer layer in the second conductivity type drift region to surround the heavily doped second conductivity type impurity region.

Abstract: The present invention relates to a charge coupled device (CCD) and a driving method, and the driving method of the CCD includes the steps of: providing a CCD including a semiconductor substrate, a photodiode in the semiconductor substrate, a charge transfer channel in the semiconductor substrate, and a charge transferring element including a first, a second, a third and a fourth transferring electrode with a three-level structure over the semiconductor substrate, wherein the charge transferring element transfers electric charges from the photodiode to the charge transfer channel and from the charge transfer channel to a predetermined portion of the CCD, and wherein the first transferring electrode is located at a first level of the three-level structure, the second and the fourth transferring electrodes are located at a second level of the three-level structure and remain within a vertical domain of the first transferring electrode in a wire region, and the third transferring electrode is located at a third l

Abstract: A method of fabricating an SRAM cell having a first conductivity type substrate includes the steps of forming a well of a second conductivity type in the first conductivity type substrate, forming a first active region of a first access transistor and a second active region of a second access transistor in the well, the first and second active regions being in parallel with each other, forming a first trench in the first active region and a second trench in the second active region, wherein the first and second trenches extend into the substrate through the well, forming gate electrodes of the first and second access transistors on the active regions, forming gate electrodes of first and second drive transistors in the first and second trenches, respectively, implanting first conductivity type impurity ions into the active regions of the first and second access transistors, respectively, forming first and second load devices on the substrate, the first and second load devices electrically contacting first ter

Abstract: A semiconductor device is disclosed, including: a semiconductor substrate; a gate electrode formed on the semiconductor substrate; a first gate insulating layer formed between the gate electrode and semiconductor substrate, and formed at a first region including one edge of the gate electrode; a second gate insulating layer formed between the gate electrode and semiconductor substrate, and formed at a second portion including the other edge of the gate electrode, the second gate insulating layer being thicker than the first gate insulating layer; a first impurity region formed in a predetermined portion of the semiconductor substrate, placed on both sides of the gate electrode; and a second impurity region formed in a predetermined portion of the semiconductor substrate, placed under the second gate insulating layer.

Abstract: A solid state image sensor device and a method of fabricating the same are disclosed in the present invention. A solid state image sensor device includes a semiconductor substrate, a well region in the semiconductor substrate, a horizontal charge transmission region in the well region, a plurality of insulating layers in the horizontal charge transmission region, a gate insulating layer on the entire surface including the insulating layers, a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, an interlayer insulating layer on the entire surface including the first polygates, and a plurality of second polygates on the interlayer insulating layer and overlapped with a portion of each first polygate.

Abstract: A repairable CMOSFET includes an insulating substrate, a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type formed on the insulating substrate, defined as a center and two edges, and spaced apart from each other by a predetermined distance, a third semiconductor layer of a second conductivity type formed to have a predetermined length extending from the edges of the first semiconductor layer of a first conductivity type toward the second semiconductor layer of a second conductivity type, a fourth semiconductor layer of a first conductivity type formed to have a predetermined length extending from the edges of the second semiconductor layer of a second conductivity type to have symmetry to the third semiconductor layer of a second conductivity type, a insulating layer formed on the entire surfaces of the first, second, third, and fourth semiconductor layers, and a gate electrode formed between the centers of the first and second semiconductor l

Abstract: Solid state image sensor and method for fabricating the same, which can provide the same focal distances of lights incident to a photodiode through a microlens for improving a sensitivity of a CCD, the solid state image sensor including photodiode regions for generating video charges from incident lights, and charge coupled devices each formed between the photodiodes for transferring the video charges in one direction, wherein impurity ions are implanted in a portion of each of microlenses formed over, and one to one matched to the photodiode regions for varying a refractive index.