Abstract: An apparatus comprising a full system monitor. The monitor may be configured to monitor in real-time one or more (i) software variables down to change rates, (ii) hardware registers down to cycle rates, and (iii) firmware registers down to microcode fetch rates.

Abstract: A method of estimating crosstalk delay for an integrated circuit design flow includes steps of: (a) receiving an integrated circuit design; (b) selecting a list of blocks for which crosstalk delay is to be estimated from the integrated circuit design; (c) selecting one of a plurality of crosstalk delay estimation algorithms or no crosstalk delay estimation algorithm for each block in the list of blocks; (d) performing the selected one of the plurality of crosstalk delay estimation algorithms or no crosstalk delay estimation algorithm to estimate a delay for each block in the list of blocks; and (e) generating as output the estimated delay for each block in the list of blocks.

Abstract: Systems and methods for handling I/O requests from a host system to a storage system. A system includes an I/O module for processing I/O requests from a host system, a virtualized storage element, and a communication medium coupling the I/O module to the virtualized storage elements. The virtualized storage element includes a mapping table for translating virtual storage locations into physical storage locations and a plurality of physical storage locations. The virtualized storage element generates base virtual addresses using the mapping table to communicate the base virtual addresses to the I/O module. The I/O module generates specific virtual addresses using the base virtual addresses and using information derived from the I/O requests. The I/O module uses the specific virtual addresses in communication with the virtualized storage element to identify the physical storage locations in the virtualized storage element.

Abstract: Base platforms customizable into ICs are designed by identifying a plurality of macros for placement on the platform, each macro being defined in part by a plurality of elements that perform respective functions of the macro. Identical elements in a plurality of macros are identified, and a common element is placed on the platform for an identical element of at least two macros. All other elements of the macros are placed at locations on the platform relative to the common element as to satisfy macro placement rules for each macro. Identical elements can be identified by identifying similar elements in a plurality of macros, and creating a common element generic to the similar elements. The user designs a metalization layer to select macros and configure common elements to the selected macros.

Abstract: A multi-phase adaptive decision feedback equalizer minimizes post-cursor inter-symbol interference in a current data bit based on values of subsequent data bits in a data communication system. In one form, the receiver includes a plurality of modules each having a respective adaptive decision feedback equalizer. A processor responsive to output signals from each of the plurality of modules generates a plurality of coefficient values. The adaptive decision feedback equalizer has a plurality of taps receiving a respective output signal from one of the modules and a respective coefficient value to generate a respective correction signal. The correction signals are summed with the data signal and processed to recover the data. Pre-calculation of coefficients permits rapid selection of data. Multi-phase operation permits higher data frequencies.

Abstract: Methods and structure for customizable BIOS in a peripheral device adapter. The controller of a peripheral device adapter senses a selection indicative of a desired customized BIOS configuration. BIOS information is updated to reflect the desired customized selection. In one embodiment, customization may be by updating portions of a default BIOS configuration with updated information stored in a selected custom BIOS information element. In another embodiment, each custom BIOS information element may store an entire snapshot of BIOS information customized for a particular application. The selected custom BIOS information may then be copied to a BIOS memory or BIOS memory accesses may be mapped to the selected custom BIOS information element.

Abstract: A method of operating a circuit is disclosed. The method generally comprises the steps of (A) generating a particular policy of a plurality of policies by a lookup operation on a first transaction request received by the circuit, (B) generating a second transaction request for use by a memory external to the circuit based upon the first transaction request and the particular policy in response to a first cache signal of the first transaction request having a non-cacheable state and (C) searching a plurality of address tags for cache data cached within the circuit for a match with the first transaction request in response to the first cache signal having a cacheable state.

Abstract: The present invention is directed to a method and apparatus for making mask edge corrections using a gradient method for high density chip designs. The present invention uses a newly defined cost function.

Abstract: An apparatus and method for enhancing data availability by implementing inter-storage-unit communication in a data processing system. A Remote Volume Mirroring (RVM) system may be leveraged according to the present invention to provide volume failover by enhancing the functionality of the arrays, in a manner transparent to a host.

Abstract: A segment of audio/visual (A/V) content is extracted from the overall DVD content of a DVD program or disk. A DVD player with A/V segment extraction functionality receives commands from a user that identify start and stop points in the DVD content for the desired A/V segment and that specify each of the available DVD options or features which may be included in the extracted A/V segment. Relevant blocks of data within the DVD data structure of the DVD content are identified and new DVD-standard information for assembling a new complete DVD data structure containing only the extracted A/V segment and the available DVD options and features and additional non-DVD-standard information that can be played back on a conventional DVD player are added. The complete DVD data structure is assembled and either stored locally or sent to a remote destination device for remote playback, re-editing or other use.

Abstract: A decision function generator for a Viterbi decoder includes a compressor module for receiving arguments of a decision function and for evaluating functions of the arguments of the decision function, a memory module coupled to the compressor module for generating an intermediate function from the functions of the arguments, and a decompressor module coupled to the memory module for generating a sign value, an integer value, and a fractional value constituting a value of the decision function from the intermediate function.

Abstract: The invention provides a system and method for providing scalability in an integrated circuit (IC) having a package coupled to a die through package balls. The die includes a plurality of input/output (I/O) slots and a hardmac configured to implement a logic function. A patch board is included between the hardmac and the I/O slots, wherein the hardmac includes a plurality of attachment points. The hardmac is attached to the plurality of I/O slots through the patch board, wherein adjacent attachment points join to non-adjacent I/O slots through the patch board.

Abstract: Apparatus and methods that allow detection and authentication of multiple devices within a subscriber dwelling. A system is described generally comprising multiple devices, each adapted to receive a broadband signal and including a modem coupled to a telephone line. At least one of the devices is configured to receive entitlement information corresponding to the other devices via the broadband signal, and to use the entitlement information to periodically authenticate the other devices via the telephone line. Several methods are disclosed for detecting a device connected to a telephone line. A described method for authenticating a device connected to a telephone line includes receiving entitlement information corresponding to each of the devices via a broadband signal, and using the entitlement information to authenticate each of the devices via the telephone line.

Abstract: A method of cell placement and clock tree synthesis includes steps of: (a) identifying critical paths in an integrated circuit design; (b) partitioning the integrated circuit design into a timing group for each of the critical paths; (c) assigning each flip-flop in a critical path to a timing group corresponding to the critical path; (d) performing a cell placement to minimize a function of propagation delay and maximum distance between flip-flops within each timing group; and (e) constructing a clock sub-net for each timing group.

Abstract: An apparatus generally comprising a plurality of writeable registers, a control circuit, and a transmitter circuit. The writeable registers may be configured to store (i) a first burst value and (ii) a first gap value. The control circuit may be configured to generate an idle signal (i) in a transmit state for a first duration determined by the first burst value and (ii) in an idle state for a second duration determined by the first gap value in response to a first command signal. The transmitter circuit may be configured to (i) enable transmitting while the idle signal is in the transmit state and (ii) disable transmitting while the idle signal is in the idle state.

Abstract: A system for analyzing fabrication processes, such as analyzing device yield on a substrate. An input accesses fabrication information, where the fabrication information includes at least one of an dependent variable that is associated with substrate location information, and at least one independent variable that is associated with at least one of the fabrication processes. Desired portions of the substrate information are selected, based on at least one of the independent variable and the dependent variable. A substrate profile is produced, based on the desired portions of the fabrication information.

Abstract: The present invention is directed to fast flexible search and edit pipeline separation. A system suitable for providing a search may include a central controller and at least one search engine. The central controller is suitable for implementing search and edit operations. The at least one search engine is communicatively coupled to the central controller. The central controller performs parallel execution of a search operation and an edit operation through utilization of the at least one search engine.

Abstract: An apparatus comprising a shared memory and a multiprocessor logic circuit. The shared memory may be configured to store data. The multiprocessor logic circuit may comprise a plurality of processors and a message circuit. The message circuit may be configured to pass messages between the processors.

Abstract: A method of measuring the quality of a simulated aerial image includes receiving as input a mask pattern for a chip design, simulating an aerial image of the mask pattern, calculating an error area representative of a deviation between an ideal boundary of the chip design and a boundary of the simulated aerial image, calculating maximum and average end-of-line deviations between the ideal boundary of the chip design and the boundary of the simulated aerial image, and displaying a worst quality area in the simulated aerial image as a function of the error area and the maximum and average end-of-line deviations for visual inspection.

Abstract: Objects are placed in a rectangle and their coordinates of the objects and are adjusted to establish a substantially uniform density of objects in the rectangle. The evaluation of coordinates is performed by placing the wires between cells coordinates and adjusting the cell coordinates to connect the cells to the wires. The substantially uniform density is achieved by dividing the rectangle into first and second rectangles having equal free areas and into third and fourth rectangles having equal areas of objects. The coordinates of the objects are adjusted based on boundaries between the first and second rectangles and between the third and fourth rectangles.