Abstract: The present invention is directed to a system and method of installing additional devices to storage subsystems without disrupting the overall storage system. The present invention may utilize a storage controller which allows testing of devices while the devices are attached to the system by making the devices functionally transparent to the storage system. Further, the present invention may log and report problems discovered during the testing of devices.

Abstract: An over-voltage protected integrated circuit is provided, which includes a discharge node, an input-output pad, a signal trace, which is coupled to the input-output pad, and a pair of back-to-back diodes, which is coupled between the first signal trace and the discharge node.

Abstract: A bonding pad for an integrated circuit, having a conductive base layer. The conductive base layer has slots formed in it, where the slots extend completely through the conductive base layer. An insulating layer is disposed on top of the conductive base layer. The insulating layer protrudes into the slots of the conductive base layer. The insulating layer also includes a low k material. A conductive top layer is disposed on top of the insulating layer.

Abstract: A new relatively high-k gate dielectric gate material comprising calcium oxide will reduce leakage from the silicon substrate to the polysilicon gate, prevent boron penetration in p-channel devices, and reduce electron trapping in the dielectric. The surface of a silicon wafer is saturated with hydroxyl groups. A calcium halide, preferably calcium bromide, is heated to a temperature sufficient to achieve atomic layer deposition, and is transported to the silicon wafer. The calcium halide reacts with the hydroxyl groups. Water is added to carry away the resultant hydrogen halide. Gaseous calcium and water are then added to form a calcium oxide gate dielectric, until the desired thickness has been achieved. In an alternative embodiment of the method, the calcium halide is transported to the silicon wafer to react with the hydroxyl groups, followed by transport of gaseous water to the silicon wafer. These two steps are repeated until the desired thickness has been achieved.

Abstract: A process monitor circuit useful for integrated circuit designs to provide manufacturing process tests for SRAM circuit structures incorporated in an integrated circuit design. In one aspect of the invention, the process monitor cell includes a plurality of SRAM circuit cells chained together in a manner to permit testing of a desired range of SRAM transistor power and a desired range of associated propagation delays. The process monitor cell thereby provides an accurate estimate of the quality of the fabrication process used to generate other functional SRAM cells within the integrated circuit design.

Abstract: A deposition ring which has a cut out on its interior circumferential edge. The deposition ring is configured to contact an edge of an electrostatic chuck and shield at least a portion of the electrostatic chuck during a deposition process wherein material is deposited onto an item, such as a semiconductor wafer, which is disposed on the electrostatic chuck. The interior circumferential edge of the deposition ring includes a surface portion which is configured to engage the edge of the electrostatic chuck, and includes the cut out portion which is configured to be spaced away and not contact the edge of the electrostatic chuck during the deposition process. As such, the deposition ring does not tend to bind with the electrostatic chuck during the deposition process.

Abstract: Provided are methods and composition for forming an isolation structure on an integrated circuit substrate. A trench is etched in the integrated circuit substrate. A light barrier layer is then formed in the trench such that the light barrier layer at least partially fills the trench to create an isolation structure, the light barrier layer being adapted for absorbing laser light applied during laser thermal processing, thereby preventing damage to the integrated circuit substrate. For instance, the light barrier layer may be a conductive layer such as polysilicon. A dielectric layer is then formed over the isolation structure. The dielectric layer may be adapted for transferring heat generated by the laser thermal processing to the light barrier layer. For instance, the dielectric layer may be formed through oxidation of a top surface of the light barrier layer.

Abstract: An asynchronous up-down counter includes a plurality of counter blocks. Each of the counter blocks has a counter output, an up-down control output, and an up-down control input. A counter signal output from each of the counter blocks has at least two bits. The asynchronous up-down counter also includes a signal bus coupling the up-down control output of a first counter block counting lesser significant bits to the up-down control input of a second counter block counting more significant bits. An up-down control signal output from each of the counter blocks has at least two bits. The up-down control signal may include a first control signal enabling counting operation of the second counter block and a second control signal indicating counting-up and counting-down.

Abstract: A unique memory access system and method to handle memory access requests to a memory shared by multiple independent data access devices (“IDADs”). More particularly, the present invention relates to a method and system that allows IDADs to efficiently execute memory access requests without having to wait for the shared memory to be available. In addition, the IDADs do not have to be designed to observe the specific memory protocol. The memory access requests from the IDADs are accepted by access request logic which then queues the requests. Memory access logic then executes the requests from the queue when the shared memory is available. The memory access logic places data obtained from read requests in a read buffer for the IDADs to access when convenient.

Abstract: In the context of mirror modulation (56, 90, 104) extraction during track seek or jump modes of an optical disc reading device (12), such as a DVD ROM, a mirror averaged level (i.e. the dc level (52) of the RF envelope (34)) is held so that the mirror modulation (90) is seen as a swing below a set mirror rebias level (86) at an output of a mirror amplifier (72), as shown in FIG. 3. With the holding of the dc level (52) by a ground-referred capacitor (302) during seek operation of the device (12), a first input (nin) to the mirror amplifier varies with the mirror modulation, whereas a second input (pin) to the mirror amplifier (72) does not vary. This phenomenon enables the top level of a RFRP signal (82) to be defined by the mirror rebias level (86) and the mirror component swing (during seek operation) to be optimized and always to occur below the mirror rebias level (86).

Abstract: Entries are added or deleted on a search tree starting with a selected vertex on an identified level of the tree. If the level of the selected vertex is the bottom level the entry is inserted to or deleted from the selected vertex. If the level of the selected vertex is not the bottom level, the entries on the child vertices of the selected vertex are redistributed so that the child vertex having a maximal index contains a predetermined number of entries. If the level of the child vertex is the bottom level the entry is inserted to or deleted from the child vertex. Otherwise, the process repeats, using the child and grandchild vertices, until the correct level is reached.

Abstract: The present invention is directed to a system and method for eliminating race conditions in RAID controllers while utilizing a high bandwidth internal architecture for data flow. A remote memory controller of the present invention may ensure that an acknowledge signal is sent only after a memory operation has been actually completed. This may provide for remote direct memory access without coherency problems and data corruption problems while a high bandwidth data flow internal architecture is being utilized.

Abstract: An integrated circuit including an electrically conductive interconnect having a first barrier layer consisting essentially of a diamond film. A seed layer consisting essentially of copper is disposed adjacent the first barrier layer. A conductive layer consisting essentially of copper is disposed adjacent the seed layer.

Abstract: A method for performing backside Photon Emission Microscopy (PEM) on wafer-level failure analysis. The method provides that a die is located by applying reversed-biased voltage to wafer and the backside of the wafer is thereafter observed. The die of interest will illuminate brightly, because of the electron-hole recombination from the reverse-biased protection diode. Such a method is easy to perform and provides a low cost and time-saving way to accurately identify a die and acquire emission.

Abstract: A method for verifying a path coverage of a circuit design. The method generally comprises the steps of implementing a hardware description language to include a plurality of monitors for a plurality of nodes of the circuit design, monitoring the nodes of a programmable circuit implementing the circuit design in real-time to capture node data, and assessing the node data to determine the path coverage.

Abstract: An apparatus for reducing residual oxygen content from a processing chamber of an atmospheric reactor after the processing chamber of the atmospheric reactor has been exposed to an oxygen environment. The processing chamber of the atmospheric reactor has an inert gas purge, including an inert gas source, for reducing a residual oxygen level within the processing chamber of the atmospheric reactor at a rate of reduction. A venturi vacuum system is enabled by the inert gas source. The venturi vacuum system draws a vacuum on the processing chamber of the atmospheric reactor and supplements the inert gas purge, thereby accelerating the rate at which the residual oxygen level is reduced within the processing chamber of the atmospheric reactor. In this manner, the vacuum created by the venturi vacuum system increases the efficiency of the inert gas purge by reducing by some moderate degree the pressure within the processing chamber of the atmospheric reactor.

Abstract: A method for compressing/decompressing data, comprising the steps of translating a first representation of data to a second representation of the data and translating the second representation of the data to a third representation of the data.

Abstract: Data storage space in a data storage system is represented to the devices that access the data (e.g. “servers”) as a single virtual storage device containing logical volumes of data, even though the storage space is typically formed from several storage devices and possibly from arrays of storage devices containing multiple volumes of data. Therefore, the servers can issue the access requests through any available transfer path from the servers to the virtual storage device. However, I/O (input/output) devices control access between the servers and the devices that control access to the data (e.g. “array controllers”), so that the access requests from the servers are uniformly routed to the preferred array controllers independently of the transfer paths through which the servers issue the access requests.

Abstract: A system has a plurality of enclosures. Each enclosure has two enclosure services modules. Each enclosure services module has an IN port and an EXPANSION port. Each enclosure services module is able to determine the data rate of incoming data and check the validity of this data. If the data rate is other than what the enclosure services module is set for, the data rate of the enclosure services module is changed to that of the incoming data. In the system, there are a disk array controller having a first channel and a second channel. The first channel is formed in sequence from a disk array controller to a first enclosure services module of a first enclosure and between first enclosure services modules of successive enclosures to a last enclosure. The second channel is formed in reverse sequence from the disk array controller to the second enclosure services module of the last enclosure and between second enclosure services modules of successive enclosures to the first enclosure.

Abstract: The present invention provides a method of forming SiGe gate electrodes using a thin nucleation layer. A dielectric layer is formed on a semiconductor wafer and a thin silicon nucleation layer deposited on top of the dielectric layer. A SiGe conducting film is deposited on the patterned silicon layer. The ratio of germanium to silicon in the gaseous source mixture for the silicon and germanium layer is selected so that the SiGe conducting film deposits on the nucleation layer but fails to deposit on the dielectric.