Abstract: A multi-service antenna may comprise: a support structure, a reflector mounted to the support structure, a signal processing assembly mounted with the support structure, a first wire strung between the reflector and the support structure and/or the signal processing assembly, and circuitry for processing a first signal received as a result of electromagnetic radiation (e.g., terrestrial television and/or cellular signals) incident on the first wire. The circuitry for processing the first signal may be housed in the signal processing assembly. A second wire may also be strung between the reflector and the support structure and/or the signal processing assembly, and the circuitry may be operable to perform diversity processing of signals received via the two wires.

Abstract: Methods and systems for location determination and navigation using textual information may comprise capturing images of sources of textual information in the vicinity of a wireless communication device (WCD). Text may be extracted from the sources and a position of the WDC may be determined based on a comparison of the extracted text a stored database of textual information. An orientation of the text may be sensed and may be utilized with the extracted text and determined distances from the sources for the position determining. Locations of the sources and/or the captured images may be stored in the database. An instruction to capture images in a different orientation may be received when the positioning does not meet an accuracy requirement. A distance from the sources of textual information may be determined based on known optical properties of a camera in the WCD, such as focal length and/or and focus setting.

Abstract: To determine the level of frequency drift of a crystal oscillator as a result of a change in the its temperature, the temperature of the crystal oscillator is sensed and used together with previously stored data that includes a multitude of drift values of the frequency of the crystal oscillator each associated with a temperature of the crystal oscillator. Optionally, upon initialization of a GPS receiver in which the crystal oscillator is disposed, an initial temperature of the crystal oscillator is measured and a PLL is set to an initial frequency in association with the initial temperature. When acquisition fails in a region, the ppm region is changed. The temperature of the crystal oscillator is periodically measured and compared with the initial temperature, and the acquisition process is reset if there is a significant change in temperature. The GPS processor enters the tracking phase when acquisition is successful.

Abstract: Methods and systems are provided for generating correction estimates. Training signals may be injected into one or more particular spectral regions, and one or more correction estimation parameters may be determined based on the injecting of the training signals, where the one or more correction estimation parameters reduce distortion in at least the one or more particular spectral regions. The particular spectral regions may comprise originally-unoccupied spectral regions. The one or more correction estimation parameters may be applied during correcting of digital signals generated based on processing of received analog signals. The training signals may be generated, such as based on one or more pre-defined characteristics. The one or more correction estimation parameters may then be determined based on the one or more pre-defined characteristics of the training signals and/or changes thereto.

Abstract: An electronic receiver may generate a differential detection sequence based on a received symbol sequence and based on a m-symbol delayed version of the received symbol sequence, where m is an integer greater than 1. The particular differential detection sequence may be a result of an element-by-element multiplication of the particular received symbol sequence and the conjugate of an m-symbol delayed version of the particular received symbol sequence. The receiver may calculate differential decision metrics based on the differential detection sequence and based on a set of differential symbol sequences generated from the set of possible transmitted symbol sequences. The receiver may generate a decision as to which of a set of possible transmitted symbol sequences resulted in the received symbol sequence, where the decision is based on the differential decision metrics and the set of possible transmitted symbols sequences.

Abstract: A receiver includes a plurality of input paths for receiving and processing a plurality of input RF signals. The input paths isolate one or more portions of corresponding ones of the received input RF signals, and combine the isolated portions of the corresponding ones of the received input RF signals onto one or more output signals. A bandwidth of the isolated portions of the corresponding ones of the received input RF signals and a bandwidth of the output signals are variable. The isolated portions of the corresponding ones of the received plurality of input RF signals are extracted and utilized to generate the output signals. The portions of the corresponding ones of the received plurality of input RF signals may be mapped into one or more channel slots in the time domain. The channel slots may be assigned in the frequency domain to one or more frequency bins.

Abstract: Methods and systems for multi-path video and network channels may comprise a communication device comprising a wideband path (WB) and a narrowband path (NB). A video channel and a network channel may be received in the WB when the device is operating in a first stage. A video channel and a network channel may be received in the WB and the network channel may also be received in the NB when the device is operating in a second stage. The network channel may be received in the NB when the device is operating in a third stage. The reception of the network channel from both the WB and NB may enable a continuous reception of the network channel in a transition between the first and third stages. The WB may be operable to receive a plurality of channels and the NB may be operable to receive a single channel.

Abstract: A transmitting/receiving circuit includes, in part, at least one transceiver, and at least two receiving channels forming a diversity receiver. One of the receiving channels includes, in part, a saw filter, an amplifier, and a frequency converter. The other receiving channel includes, in part, an amplifier, a frequency converter, and a received signal strength indicator (RSSI) adapted to detect signals transmitted by the transceiver. The RSSI is optionally coupled to an input terminal of its associated amplifier. The receiver further includes, in part, at least one processor operative to combine signals processed through the first and second receiving channels using a weight the processor assigns to the signal received by the second receiving channel in accordance with a strength of the blocker signal that the RSSI detects. The second receiving channel optionally includes an RSSI.

Abstract: Circuitry of a hybrid fiber-coaxial network may comprise a first transceiver configured to connect the circuitry to an optical link, a second transceiver configured to connect the circuitry to an electrical link, a first processing path, a second processing path, and a switching circuit. In a first configuration, the switching circuit may couple the first transceiver to the second transceiver via the first processing path. In a second configuration, the switching circuit may couple the first transceiver to the second transceiver via the second processing path. The first transceiver may comprise a passive optical network (PON) transceiver and the second transceiver may comprise a data over coaxial service interface specification (DOCSIS) physical layer transceiver. The switching circuit may be configured based on the type of headend to which the circuitry is connected.

Abstract: A first device of a multimedia over coax alliance (MoCA) network may grant a second device of the MoCA network permission to enter a power-saving state. While the second device is in the power-saving mode, the first device may grant bandwidth to the second device during one or more predetermined timeslots. The bandwidth may be granted without a corresponding reservation request from the second device. While the second device is in the power-saving state, it may track time utilizing a clock that is synchronized to the system time of the MoCA network, and transmit during one or more of the predetermined timeslots without first transmitting a corresponding reservation request. The second device may utilize a first modulation profile when not operating in the power-saving state, and utilize a second modulation profile when operating in the power-saving state.

Abstract: An integrated circuit (IC) includes a demodulator for receiving encrypted information data and a hardware unit that enables conditional access to the information data. The hardware unit includes a processing unit, a RAM, a ROM, multiple non-volatile registers, and an interface unit for transferring an attribute to the demodulator. The non-volatile registers may include an IC identification and an encryption key. The ROM includes a boot code that causes the processing unit to fetch a code from an external memory and store the fetched code in the RAM. The fetched code may include a certificate that ensures the authenticity of the code. The fetched code may be encrypted and decrypted by the ROM using the IC identification and the encryption key. The demodulator includes a descrambler for decrypting the received information data using the attribute. The information data may include digital radio or television content.

Abstract: A low density parity check (LDPC) decoder integrated on a single semiconductor substrate may comprise one or more arrays of first-type memory cells and one or more arrays of second-type memory cells. The LDPC decoder may be configured to store intrinsic messages in the array of first-type cells and to store extrinsic messages in the array of second-type cells. The first-type cells may be a first one of: static random access memory (SRAM) cells, refreshed dynamic random access memory (DRAM) cells, non-refreshed DRAM cells configured as a FIFO, and non-refreshed DRAM cells not configured as a FIFO. The second-type cells may be a second one of: static random access memory (SRAM) cells, refreshed dynamic random access memory (DRAM) cells, non-refreshed DRAM cells configured as a FIFO, and non-refreshed DRAM cells not configured as a FIFO.

Abstract: A wideband receiver system comprises a mixer module, a wideband analog-to-digital converter (ADC) module, and digital circuitry. The mixer module is configured to downconvert a plurality of frequencies that comprises a plurality of desired television channels and a plurality of undesired television channels. The wideband ADC module is configured to digitize the swatch of frequencies comprising the plurality of desired television channels and the plurality of undesired television channels. The digital circuitry is configured to select the desired plurality of television channels from the digitized plurality of frequencies, and output the selected plurality of television channels to a demodulator as a digital datastream.

Abstract: Methods and systems for improved matching of on-chip capacitors may comprise a semiconductor die with an on-chip capacitor comprising one or more metal layers. The on-chip capacitor may comprise interdigitated electrically coupled metal fingers. The electrically coupled metal fingers may be arranged symmetrically in the semiconductor die to compensate for non-uniformities in the one or more metal layers. The metal fingers may be arranged with radial symmetry. Metal fingers in a first metal layer may be electrically coupled to metal fingers in a second metal layer. An orientation of metal fingers may be alternated when coupling metal fingers in a plurality of metal layers. The metal fingers may be coupled at the center or the outer edge of the on-chip capacitor. The on-chip capacitor may be configured in a plurality of symmetric sections wherein a boundary between each of the plurality of sections is configured in a zig-zag pattern.

Abstract: A microwave backhaul system may comprise a monolithic integrated circuit comprising an on-chip transceiver, digital baseband processing circuitry, and auxiliary interface circuitry. The on-chip transceiver may process a microwave signal from an antenna element to generate a first pair of quadrature baseband signals and convey the first pair of phase-quadrature baseband signals to the digital baseband processing circuitry. The auxiliary interface circuitry may receive one or more auxiliary signals from a source that is external to the monolithic integrated circuit and convey the one or more auxiliary signals to the digital baseband processing circuitry. The digital baseband processing circuitry may be operable to process signals to generate one or more second pairs of phase-quadrature digital baseband signals.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: Methods and systems for interference avoidance in a multi-protocol communication system may comprise receiving signals in a first communications protocol (FCP) in a first frequency range (FFR), configuring channel usage in a second communications protocol (SCP) in a second frequency range (SFR) based on the received signals to control interference from the SFR to the FFR. Signals may be communicated over coaxial cables based on the configuration of channel usage in the SCP in the SFR based on the received signals, such that aliased signals do not excessively degrade performance of the FCP. The FFR may comprise a cable or satellite television frequency range. The FCP may comprise data over cable service interface standard (DOCSIS). The SCP may comprise multimedia over coaxial alliance (MoCA) standard. The configuring channel usage in the SCP may comprise varying bit loading, power levels, or degree of modulation of signals transmitted over the SCP.

Abstract: A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.

Abstract: A system, such as a satellite reception assembly or customer premises gateway, may comprise an analog-to-digital converter operable to digitize a signal spanning an entire television spectrum (e.g., cable television spectrum or satellite television spectrum) comprising a plurality of television channels. The system may comprise a signal monitor operable to analyze a signal to determine a characteristic of the signal. The system may comprise a data processor operable to process a television channel to recover content carried on the television channel. The system may comprise a channelizer operable to select first and second portions of the signal, and concurrently output the first portion to the signal monitor and the second portion to the data processor.

Abstract: Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each of two input lines to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2x where x ranges from 0 to m?1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than VADC—fs/128 +VADC—fs/256+VADC—fs/512+VADC—fs/1024 when m equals 4 and where VADC—fs is the full-scale voltage of the ADC.