Patents Assigned to MEMC
  • Patent number: 6713370
    Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a bulk layer between front and back surface layers. The wafer is subjected to a heat-treatment in an atmosphere to form crystal lattice vacancies. A surface of the wafer is oxidized by heating in the presence of an oxygen-containing atmosphere to effect the vacancy concentration profile. The wafer is cooled at a rate which allows some, but not all, the crystal lattice vacancies to diffuse to the surfaces such that the concentration of vacancies in the bulk layer is greater than in the surface layers. The vacancy concentration profile shape is determined in part by the heat-treatment atmosphere, in part by the surface oxidation, and in part by the cooling rate.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: March 30, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Publication number: 20040055531
    Abstract: A heat shield assembly is disclosed for use in a crystal puller for growing a monocrystalline ingot from molten semiconductor source material. The heat shield assembly has a central opening sized and shaped for surrounding the ingot as the ingot is pulled from the molten source material. In one aspect, the heat shield assembly includes a multi-sectioned outer shield and a multi-sectioned inner shield. The sections of at least one of the inner and outer shields may be releasably connected to one another so that, in the event a section is damaged, the sections may be separated to allow replacement with an undamaged section. In another aspect the heat shield assembly includes an upper section and a lower section extending generally downward from the upper section toward the molten material. The lower section has a height equal to at least about 33% of a height of the heat shield assembly.
    Type: Application
    Filed: September 20, 2002
    Publication date: March 25, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Lee W. Ferry, Richard G. Schrenker, Hariprasad Sreedharamurthy
  • Patent number: 6709981
    Abstract: A method of manufacturing a semiconductor wafer includes providing an ingot of semiconductor material, slicing the wafer from the ingot, and processing the wafer to increase parallelism of the front surface and the back surface. A final polishing operation on at least the front surface is performed by positioning the wafer between a first pad and a second pad and obtaining motion of the front and back surfaces of the wafer relative to the first and second pads to maintain parallelism of the front and back surfaces and to produce a finish on at least the front surface of the wafer so that the front surface is prepared for integrated circuit fabrication. In another aspect, the wafer is rinsed by a rinsing fluid to increase hydrodynamic lubrication. Other methods are directed to conditioning the polishing pad and to handling wafers after polishing. An apparatus for polishing wafers is also included.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: March 23, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Alexis Grabbe, Mick Bjelopavlic, Ashley S. Hull, Michele L. Haler, Guoqiang (David) Zhang, Henry F. Erk, Yun-Biao Xin
  • Patent number: 6709511
    Abstract: The present invention relates to a process for the treatment of a Czochralski single crystal silicon wafer having at least a portion of which is vacancy dominated to dissolve existing oxygen clusters and precipitates, while preventing their formation upon a subsequent oxygen precipitation heat treatment. The process comprises (i) heat-treating the wafer in a rapid thermal annealer at a temperature of at least 1150° C. in an atmosphere having an oxygen concentration of at least 1000 ppma, or alternatively (ii) heat-treating the wafer in a rapid thermal annealer at a temperature of at least about 1150° C. and then controlling the rate of cooling from the maximum temperature achieved during the heat-treatment through a temperature range in which vacancies are relatively mobile in order to reduce the number density of vacancies in the single crystal silicon to a value such that oxygen precipitates will not form if the wafer is subsequently subjected to an oxygen precipitation heat-treatment.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: March 23, 2004
    Assignee: Memc Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Publication number: 20040038544
    Abstract: A method for polishing front and back surfaces of a semiconductor wafer includes the step of providing a polishing apparatus having a wafer carrier generally disposed between a first polishing pad and a second polishing pad. The first pad has a hardness significantly greater than a hardness of the second pad. The wafer is placed in the wafer carrier so that the front surface faces the first pad and so that the back surface faces the second pad. A polishing slurry is applied to at least one of the pads and the carrier, first pad and second pad are rotated. The front surface is brought into contact with the first pad and the back surface is brought into contact with the second pad for polishing the front and back surfaces of the wafer whereby less wafer material is removed from the back surface engaged by the second pad and the back surface has less gloss than the front surface after polishing so that the front surface and back surface are visually distinguishable.
    Type: Application
    Filed: April 22, 2003
    Publication date: February 26, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Guoqiang (David) Zhang, Henry Frank Erk, Tracy M. Ragan, Julie A. Kearns
  • Publication number: 20040025782
    Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process including growing a single crystal silicon ingot from molten silicon, and as part of the growth process, controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C., and (iii) a cooling rate of the crystal from a solidification temperature to about 1,050° C., in order to cause the formation of an axially symmetrical segment which is substantially free of agglomerated intrinsic point defects.
    Type: Application
    Filed: February 25, 2003
    Publication date: February 12, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 6689209
    Abstract: The present invention relates to a process for growing a single crystal silicon ingot which contains an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process comprises (i) forming a region within the constant diameter portion in which vacancies are the predominant intrinsic point defect; (ii) heating the lateral surface of the ingot to cause a thermally induced inward flux of silicon self interstitial atoms into the region from the heated surface which reduces the concentration of vacancies in the region; and (iii) maintaining the temperature of the region in excess of the temperature, TA, at which agglomeration of vacancy point defects into agglomerated defects occurs during the period of time between the formation of the region and the reduction of the concentration of vacancies in the region.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: February 10, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir Voronkov
  • Patent number: 6686260
    Abstract: A process for heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The process includes subjecting the wafer to a heat treatment to dissolve agglomerated vacancy defects, rapid thermally annealing the heat-treated wafer to cause the formation of crystal lattice vacancies throughout the wafer and controlling the cooling rate of the annealed wafer to allow some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a nonuniform vacancy concentration with the concentration of vacancies in the bulk of the wafer being greater than the concentration in the surface layer.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: February 3, 2004
    Assignee: MEMC Electronics Materials, Inc.
    Inventors: Robert J. Falster, Martin Jeffrey Binns, Harold W. Korb
  • Publication number: 20040003770
    Abstract: A process for producing silicon which is substantially free of agglomerated intrinsic point defects in an ingot having a vacancy dominated region. An ingot is grown generally in accordance with the Czochralski method. While intrinsic point defects diffuse from or are annihilated within the ingot, at least a portion of the ingot is maintained above a temperature TA at which intrinsic point defects agglomerate. The achievement of defect free silicon is thus substantially decoupled from process parameters, such as pull rate, and system parameters, such as axial temperature gradient in the ingot.
    Type: Application
    Filed: May 13, 2003
    Publication date: January 8, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Harold W. Korb
  • Patent number: 6666915
    Abstract: This invention is directed to a novel process for the preparation of a silicon wafer comprising a surface having an epitaxial layer deposited thereon. In one embodiment, an epitaxial layer is deposited onto a surface of a silicon wafer. The wafer is also heated to a temperature of at least about 1175° C. This heat treatment begins either during or after the epitaxial deposition. Following the heat treatment, the heated wafer is cooled for a period of time at a rate of at least about 10° C./sec while (a) the temperature of the wafer is greater than about 1000° C., and (b) the wafer is not in contact with a susceptor. In this process, the epitaxial deposition, heating, and cooling are conducted in the same reactor chamber.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: December 23, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Charles Chiun-Chieh Yang, Darrell D. Watkins, Jr.
  • Patent number: 6663709
    Abstract: A crystal puller and method for growing monocrystalline silicon ingots includes first and second electrical resistance heaters in the crystal puller in longitudinal, closely spaced relationship with each other to radiate heat toward the ingot as the ingot is pulled upward within the housing. In one embodiment, the first heater is powered when the ingot is pulled upward to a first axial position above the surface of the molten silicon and the second heater is powered when the ingot is pulled upward to a second axial position above the first axial position. In another embodiment the first and second heaters are powered until the ingot is separated from the molten silicon and then the heating power output of the first and second heaters is reduced to substantially increase the cooling rate at which the ingot is cooled. An adapter mounting the heaters may also be provided for adapting existing crystal pullers to incorporate the heaters.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: December 16, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Zheng Lu, Mohsen Banan, Ying Tao, Lee Ferry, Carl F. Cherko
  • Publication number: 20030221609
    Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The heat-treated wafer is then oxidized by heating in the presence of an oxygen-containing atmosphere in order to establish a vacancy concentration profile within the wafer. The oxidized wafer is then cooled from the temperature of said oxidizing heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.
    Type: Application
    Filed: June 13, 2003
    Publication date: December 4, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Patent number: 6652645
    Abstract: A process for controlling the amount of insoluble gas trapped by a silicon melt is disclosed. After a crucible is charged with polycrystalline silicon, a gas comprising at least about 10% of a gas having a high solubility in silicon is used as the purging gas for a period of time during melting. After the polycrystalline silicon charge has completely melted, the purge gas may be switched to a conventional argon purge. Utilizing a purge gas highly soluble in silicon for a period of time during the melting process reduces the amount of insoluble gases trapped in the charge and, hence, the amount of insoluble gases grown into the crystal that form defects on sliced wafers.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: November 25, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: John Davis Holder
  • Patent number: 6652646
    Abstract: A process for growing a single crystal silicon ingot having an axially symmetric region substantially free of agglomerated intrinsic point defects. The ingot is grown generally in accordance with the Czochralski method; however, the manner by which the ingot is cooled from the temperature of solidification to a temperature which is in excess of about 900° C. is controlled to allow for the diffusion of intrinsic point defects, such that agglomerated defects do not form in this axially symmetric region. Accordingly, the ratio v/G0 is allowed to vary axially within this region, due to changes in v or G0, between a minimum and maximum value by at least 5%.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: November 25, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir Voronkov, Paolo Mutti
  • Patent number: 6652650
    Abstract: A modified susceptor for use in an epitaxial deposition apparatus and process is disclosed. The modified susceptor has an inner annular ledge capable of supporting a semiconductor wafer and has a plurality of holes in the surface to allow cleaning gas utilized during an epitaxial deposition process to pass through the susceptor and contact substantially the entire back surface of the semiconductor wafer and remove a native oxide layer. Also, the plurality of holes on the susceptor allows dopant atoms out-diffused from the back surface during the epitaxial deposition process to be carried away from the front surface in an inert gas stream and into the exhaust such that autodoping of the front surface is minimized.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: November 25, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Charles Chiun-Chieh Yang, Robert W. Standley
  • Patent number: 6649883
    Abstract: A method for calibrating a semiconductor wafer drying apparatus including a heater and a vessel containing a solvent and capable of receiving semiconductor wafers comprises selecting a test heater temperature and a test processing time. A first set of wafers is placed in the vessel and the heater is operated at the test heater temperature so that a solvent vapor cloud is created in the vessel. The first set of wafers is monitored for substantial envelopment by the vapor cloud during the test processing time. Based on the monitoring step, at least one of the test heater temperature and the test processing time is adjusted to establish at least one operating parameter of an operating heater temperature parameter and an operating processing time parameter for processing successive sets of wafers so as to promote substantial vapor cloud envelopment of each set of wafers dried in the drying apparatus.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: November 18, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Yoshio Iwamoto, James C. Lenk, Philip Schmidt, Craig Spohr, Leslie G. Stanton
  • Publication number: 20030205191
    Abstract: Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated intrinsic point defects on the substrate surface upon which the epitaxial layer is deposited.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 6, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule ' Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
  • Patent number: 6638357
    Abstract: A method for revealing agglomerated intrinsic point defect. The method comprising coating a sample with a metal capable of decorating agglomerated intrinsic point defects, heat-treating the coated sample to decorate any agglomerated intrinsic point defects, cooling the sample, etching the surface of the cooled sample without delineating the decorated agglomerated intrinsic point defects and etching the etched surface with a delineating etchant to reveal the decorated intrinsic point defects.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: October 28, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule'Stagno, Robert J. Falster
  • Publication number: 20030196586
    Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.
    Type: Application
    Filed: May 6, 2003
    Publication date: October 23, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
  • Publication number: 20030196587
    Abstract: The present invention relates to a process for growing a single crystal silicon ingot, which contains an axially symmetric region having a predominant intrinsic point defect and which is substantially free of agglomerated intrinsic point defects in that region. The process comprising cooling the ingot from the temperature of solidification to a temperature of less than 800° C. and, as part of said cooling step, quench cooling a region of the constant diameter portion of the ingot having a predominant intrinsic point defect through the temperature of nucleation for the agglomerated intrinsic point defects for the intrinsic point defects which predominate in the region.
    Type: Application
    Filed: May 6, 2003
    Publication date: October 23, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Kirk D. McCallum, W. Brock Alexander, Mohsen Banan, Robert J. Falster, Joseph C. Holzer, Bayard K. Johnson, Chang Bum Kim, Steven L. Kimbel, Zheng Lu, Paolo Mutti, Vladimir V. Voronkov, Luciano Mule'Stagno, Jeffrey L. Libbert