Abstract: A system for facilitating transfer of a semiconductor wafer into or out of a wafer carrier of a polishing or lapping machine without contacting a face of the wafer. The system includes a wafer transport suitable for placement above the carrier, the transport having at least one open cavity with a size and shape suitable for registering alignment with an opening of the carrier. The cavity and opening together form a compartment adapted to receive and hold the wafer. A liquid delivery conduit having an outlet located above an abrading member of the machine is arranged to deliver a liquid to a position generally beneath the transport. A method for transferring the wafer to or from the machine includes delivering liquid beneath the wafer. The wafer thereby moves between a first position resting on the abrading member and a second position spaced above the abrading member where a tool may engage the edge of the wafer for holding the wafer without contacting the face of the wafer.

Abstract: A process for revealing agglomerated intrinsic point defects in a single crystal silicon sample. The process includes heat-treating the single crystal silicon sample, cooling the heat-treated sample and then coating a surface of the cooled sample with a composition containing a metal which is capable of decorating agglomerated intrinsic point defects. The coated sample is then heat-treated in an inert atmosphere at a temperature and for a time sufficient to diffuse the metal into the sample. A non-defect delineating etch is performed, followed by a defect delineating etch to reveal the decorated agglomerated intrinsic point defects.

Abstract: A process for the preparation of a silicon single ingot in accordance with the Czochralski method. The process for growing the single crystal silicon ingot comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C. to initially produce in the constant diameter portion of the ingot a series of predominant intrinsic point defects including vacancy dominated regions and silicon self interstitial dominated regions, alternating along the axis, and cooling the regions from the temperature of solidification at a rate which allows silicon self-interstitial atoms to diffuse radially to the lateral surface and to diffuse axially to vacancy dominated regions to reduce the concentration intrinsic point defects in each region.

Abstract: The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region in which vacancies are the predominant intrinsic point defect and which is substantially free of agglomerated vacancy intrinsic point defects, wherein the first axially symmetric region has a width which is at least about 50% of the length of the radius of the ingot, and a process for the preparation thereof.

Abstract: To provide a method for storing a carrier (3) for polishing a silicon wafer, which can store the carrier (3) in a manner to reduce scratches on the silicon wafer. The method includes storing a carrier (3) for use in polishing a silicon wafer completely immersed in a liquid. At least a substantial portion of the liquid is deionized water.

Abstract: A semiconductor wafer manufacturing process is disclosed wherein extremely flat, double side polished semiconductor wafers having enhanced gettering characteristics on the back surface are produced. The process includes creating an enhanced gettering layer on the back surface of a double side polished semiconductor wafer. A protective layer is subsequently grown on the enhanced gettering layer and the wafer is subsequently subjected to a second double side polishing operation. Finally, the protective layer is removed and the front surface final polished to produce an extremely flat semiconductor wafer having enhanced gettering characteristics on the back surface.

Abstract: A process for manufacturing polished-like first-grade semiconductor wafers is disclosed. The process greatly simplifies the amount of polishing required while producing high quality semiconductor wafers. After a semiconductor wafer is sliced from a single crystal ingot, lapped and ground, the wafer is subjected to a double side fine grinding operation, a micro-etching operation, and an annealing operation to significantly improve the quality of the front surface. To complete to process the semiconductor wafer is flash polished to impart a specular finish on the front surface. In accordance with the present invention the semiconductor wafers may also be produced having a denuded zone capable of internal gettering.

Abstract: A control method for use with a crystal puller for growing a monocrystalline semiconductor crystal from a melt according to the Czochralski process. The method includes defining an initial interval of time for observing growth of the crystal being pulled from the melt and determining diameter variations occurring during the interval. Based on the variations in the crystal diameter, the method defines a function r(t). By performing a best fit routine on the function r(t), the method deduces current values of crystal radius rf, meniscus height hf and growth rate Vgf at the end of the observation interval. The method also includes determining pull rate and heater power parameters as a function of the growth rate to control the crystal puller to minimize variations in both crystal diameter and growth rate during subsequent growth of the crystal.

Abstract: A modified process for chemical/mechanical polishing semiconductor wafers is provided. The process includes polishing a surface of the wafer, contacting the polished surface of the wafer with a surfactant, and drying the surface of the disengaged wafer for a sufficient period of time before contacting the surface of the wafer with a rinse media or subsequent process liquid. The process reduces defects, including etching stains, on the polished surface of the wafer.

Abstract: A process for heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a thermal anneal to dissolve agglomerated vacancy defects present in a stratum extending from the front surface toward the center of the wafer. The annealed wafer is then heat-treated to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon.

Abstract: A process for preparing strontium doped molten silicon for use in a single silicon crystal growing process is disclosed. Polysilicon is doped strontium and melted in a silica crucible. During melting and throughout the crystal growing process the strontium acts as a devitrification promoter and creates a layer of devitrified silica on the inside crucible surface in contact with the melt resulting in a lower level of contaminants in the melt and grown crystal.

Abstract: A process for controlling the amount of insoluble gas trapped by a silicon melt is disclosed. After a crucible is charged with polycrystalline silicon, a gas comprising at least about 10% of a gas having a high solubility in silicon is used as the purging gas for a period of time during melting. After the polycrystalline silicon charge has completely melted, the purge gas may be switched to a conventional argon purge. Utilizing a purge gas highly soluble in silicon for a period of time during the melting process reduces the amount of insoluble gases trapped in the charge and, hence, the amount of insoluble gases grown into the crystal that form defects on sliced wafers.

Abstract: The present invention relates to a process for the preparation of a silicon on insulator wafer. The process including implanting oxygen in a single crystal silicon wafer having an axially symmetric region in which there is a predominant intrinsic point defect which is substantially free of agglomerated intrinsic point defects. Additionally, the present invention relates to a silicon on insulator (“SOI”) structure in which the device layer and the handle wafer each have an axially symmetric region which is substantially free of agglomerated intrinsic point defects. Additionally, the present invention is directed to such a SOI structure in which the handle wafer is capable of forming an ideal, non-uniform depth distribution of oxygen precipitates upon being subjected to the heat treatment cycles of essentially any arbitrary electronic device manufacturing process.

Abstract: A method of fabricating a semiconductor wafer is disclosed. The method reduces the number of processing steps and produces a low cost semiconductor wafer having external gettering. The method includes slicing the wafer from a single silicon crystal ingot and etching the wafer to clean impurities and residue from slicing. Thereafter, the wafer is double side polished which creates damage on both the front and back surfaces. The damage on the front surface is then removed in a subsequent plasma assisted chemical etching step and touch polishing operation which significantly improves the flatness of the wafer. The damage on the back surface created by the double side polishing remains and getters defects from the front surface and bulk regions of the wafer.

Abstract: An apparatus and method are provided for forming a denuded zone and an epitaxial layer on a semiconductor wafer used in manufacturing electronic components. The denuded zone and epitaxial layer are formed in one chamber. The apparatus includes a plurality of upstanding pins immovably mounted on a susceptor and maintain a semiconductor wafer spaced from the susceptor during both application of the epitaxial layer and formation of the denuded zone. Fast cooling of the wafer is accomplished by having the wafer out of conductive heat transfer relation with the susceptor during cooling thereof.

Abstract: The present invention relates to a process for the treatment of Czochralski single crystal silicon wafers to dissolve existing oxygen clusters and precipitates, while preventing their formation upon a subsequent oxygen precipitation heat treatment. The process comprises (i) heat-treating the wafer in a rapid thermal annealer at a temperature of at least 1150° C. in an atmosphere having an oxygen concentration of at least 1000 ppma, or alternatively (ii) heat-treating the wafer in a rapid thermal annealer at a temperature of at least about 1150° C. and then controlling the rate of cooling from the maximum temperature achieved during the heat-treatment through a temperature range in which vacancies are relatively mobile in order to reduce the number density of vacancies in the single crystal silicon to a value such that oxygen precipitates will not form if the wafer is subsequently subjected to an oxygen precipitation heat-treatment.

Abstract: A system and method for tracking semiconductor wafers through processing operations performed at a plurality of stations. A reader reads information relating to and identifying the wafers from a tag mounted on a wafer carrier. The tag has a memory which includes a plurality of pages storing the information. A plurality of antennas are connected to the reader. The antennas each have a transmission range which defines a reader position and the reader and tag communicate by radio frequency signals via one of the antennas when the carrier is at the respective reader position. A host computer and reader communicate in accordance with an interface protocol by which the host computer commands the reader to read the stored information from one or more selected tag pages and the reader provides the stored information read from the selected tag pages to the host computer.

Abstract: A process for growing single crystal silicon ingots which are substantially free of agglomerated intrinsic point defects. An ingot is grown generally in accordance with the Czochralski method. No portion of the ingot cools to a temperature which is less than a temperature TA at which agglomeration of intrinsic point defects in the ingot occurs during the time the ingot is being grown. The achievement of defect free ingots is thus substantially decoupled from process parameters, such as pull rate, and system parameters, such as axial temperature gradient in the ingot.

Abstract: A process for preparing doped molten silicon for use in a single silicon crystal growing process is disclosed. Polysilicon is doped with barium and melted in a silica crucible containing less than about 0.5% gases insoluble in silicon. During melting and throughout the crystal growing process the barium acts as a devitrification promoter and creates a layer of devitrified silica on the inside crucible surface in contact with the melt resulting in a lower level of contaminants in the melt and grown crystal.

Abstract: A device for cleaning semiconductor wafers is provided. The device includes a carrier for holding wafers during the cleaning process. The carrier includes a frame with an open top and a plurality of carrier rods extending between opposite ends of the frame. The carrier rods have grooves that receive marginal edge portions of the wafers to retain them against movement in the carrier during cleaning and transportation. The grooves are structured to reduce the amount of contaminants remaining on the wafers after cleaning. The frame may be made substantially entirely of a polymeric material.